From a836e5c16ea7df38646c46f2e9ffc6163ab05f06 Mon Sep 17 00:00:00 2001 From: Marcel Enguehard Date: Mon, 29 May 2017 13:13:32 +0200 Subject: Misc bug fixes *IP assignment *Node is a key attribute *Up-to-date packages *Trailing whitespaces ... Change-Id: Id8e2a5f7b2c4506f326b3c4bc991fa65f53fca5c Signed-off-by: Marcel Enguehard --- vicn/core/scheduling_algebra.py | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'vicn/core/scheduling_algebra.py') diff --git a/vicn/core/scheduling_algebra.py b/vicn/core/scheduling_algebra.py index 207856c0..368ac243 100644 --- a/vicn/core/scheduling_algebra.py +++ b/vicn/core/scheduling_algebra.py @@ -16,19 +16,19 @@ # limitations under the License. # -def SchedulingAlgebra(cls, concurrent_mixin=object, composition_mixin=object, +def SchedulingAlgebra(cls, concurrent_mixin=object, composition_mixin=object, sequential_mixin=object): # allow_none = True class BaseElement(cls): def __default__(cls, *elements): - elts = [e for e in elements + elts = [e for e in elements if e is not None and not isinstance(e, Empty)] if len(elts) == 0: # The first is always Empty assert len(elements) != 0 return elements[0] elif len(elts) == 1: - return elts[0] + return elts[0] return cls(*elts) def __concurrent__(*elements): -- cgit 1.2.3-korg