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-rw-r--r--docs/report/testpmd_performance_tests/overview.rst5
1 files changed, 3 insertions, 2 deletions
diff --git a/docs/report/testpmd_performance_tests/overview.rst b/docs/report/testpmd_performance_tests/overview.rst
index 2182a00cd8..78d214808a 100644
--- a/docs/report/testpmd_performance_tests/overview.rst
+++ b/docs/report/testpmd_performance_tests/overview.rst
@@ -42,7 +42,8 @@ tested NIC models include:
#. 2port40GE VIC1385 Cisco.
#. 2port40GE XL710 Intel.
-For detailed LF FD.io test bed specification and physical topology please refer to `LF FDio CSIT testbed wiki page <https://wiki.fd.io/view/CSIT/CSIT_LF_testbed>`_.
+For detailed LF FD.io test bed specification and physical topology please refer
+to `LF FDio CSIT testbed wiki page <https://wiki.fd.io/view/CSIT/CSIT_LF_testbed>`_.
Performance Tests Coverage
--------------------------
@@ -150,4 +151,4 @@ Reported latency values are measured using following methodology:
- TRex setup introduces an always-on error of about 2*2usec per latency flow -
additonal Tx/Rx interface latency induced by TRex SW writing and reading
packet timestamps on CPU cores without HW acceleration on NICs closer to the
- interface line. \ No newline at end of file
+ interface line.