From 43480e631defcb2fa40cc35e48ee40ce31b1dd68 Mon Sep 17 00:00:00 2001 From: Tibor Frank Date: Mon, 16 Jul 2018 15:32:57 +0200 Subject: CSIT-1196: Add hsw/skx and 2n/3n to the report structure Change-Id: I3a0cc2792b931798e466250e30bc30ad8a32b84e Signed-off-by: Tibor Frank --- .../packet_latency_graphs/ipsec.rst | 53 ++++++++++++++-------- 1 file changed, 34 insertions(+), 19 deletions(-) (limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst') diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst index 0c8f3de767..76759ac5e3 100644 --- a/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst +++ b/docs/report/vpp_performance_tests/packet_latency_graphs/ipsec.rst @@ -1,5 +1,5 @@ -IPSec Crypto HW: IP4 Routed-Forwarding -====================================== +IPSec IPv4 Routing +================== This section includes summary graphs of VPP Phy-to-Phy packet latency with IPSec encryption used in combination with IPv4 routed-forwarding, @@ -10,43 +10,58 @@ for VPP running in multiple configurations of VPP worker thread(s), a.k.a. VPP data plane thread(s), and their physical CPU core(s) placement. -VPP packet latency in 1t1c setup (1thread, 1core) is presented in the graph -below. +CSIT source code for the test cases used for plots can be found in +`CSIT git repository `_. + +3n-hsw-xl710 +~~~~~~~~~~~~ + +64b-1t1c-base_and_scale +----------------------- + +.. raw:: html + +
+ +:index:`Latency: ipsec-3n-hsw-xl710-64b-1t1c-base_and_scale-ndr` .. raw:: html - + + +



+
.. raw:: latex \begin{figure}[H] \centering \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-1t1c-ipsechw-ndrdisc-lat50} - \label{fig:64B-1t1c-ipsechw-ndrdisc-lat50} + \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{ipsec-3n-hsw-xl710-64b-1t1c-base_and_scale-ndr-lat50} + \label{fig:ipsec-3n-hsw-xl710-64b-1t1c-base_and_scale-ndr-lat50} \end{figure} -*Figure 1. VPP 1thread 1core - packet latency for Phy-to-Phy IPSec HW with IPv4 Routed-Forwarding.* +64b-2t2c-base_and_scale +----------------------- + +.. raw:: html -CSIT source code for the test cases used for above plots can be found in -`CSIT git repository `_. +
-VPP packet latency in 2t2c setup (2thread, 2core) is presented in the graph below. +:index:`Latency: ipsec-3n-hsw-xl710-64b-2t2c-base_and_scale-ndr` .. raw:: html - + + +



+
.. raw:: latex \begin{figure}[H] \centering \graphicspath{{../_build/_static/vpp/}} - \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{64B-2t2c-ipsechw-ndrdisc-lat50} - \label{fig:64B-2t2c-ipsechw-ndrdisc-lat50} + \includegraphics[clip, trim=0cm 8cm 5cm 0cm, width=0.70\textwidth]{ipsec-3n-hsw-xl710-64b-2t2c-base_and_scale-ndr-lat50} + \label{fig:ipsec-3n-hsw-xl710-64b-2t2c-base_and_scale-ndr-lat50} \end{figure} - -*Figure 2. VPP 2threads 2cores - packet latency for Phy-to-Phy IPSec HW with IPv4 Routed-Forwarding.* - -CSIT source code for the test cases used for above plots can be found in -`CSIT git repository `_. -- cgit 1.2.3-korg