From 33cfe1217cb2d6bc9655b01f200b0ec8d5ccb466 Mon Sep 17 00:00:00 2001
From: Tibor Frank <tifrank@cisco.com>
Date: Mon, 19 Aug 2019 15:25:47 +0200
Subject: Report: Select tests by name, specifications

Change-Id: Ibcc5e67d49fba9c02b07af462a74d2a062412979
Signed-off-by: Tibor Frank <tifrank@cisco.com>
---
 docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst')

diff --git a/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst b/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
index b5ff6bf401..89e7b1a37e 100644
--- a/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
+++ b/docs/report/vpp_performance_tests/packet_latency_graphs/srv6.rst
@@ -13,8 +13,9 @@ VPP worker thread(s), a.k.a. VPP data plane thread(s), and their
 physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/srv6?h=rls1901>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/srv6?h=rls1908>`_.
 
 .. toctree::
 
-    srv6-3n-hsw-x520
+    srv6-3n-skx-xxv710
+    srv6-3n-hsw-xl710
-- 
cgit 1.2.3-korg