From 33eac7ac4d82c96dfac79bfe1bc6f7e06f3e3c47 Mon Sep 17 00:00:00 2001
From: Tibor Frank <tifrank@cisco.com>
Date: Wed, 29 Sep 2021 13:07:03 +0200
Subject: Report: configure rls2110

Change-Id: I0020d2f11bd027ef80bf77f2e30f9ea19a424aa1
Signed-off-by: Tibor Frank <tifrank@cisco.com>
---
 docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst')

diff --git a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst
index fcb4936755..ce24c8a6ce 100644
--- a/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst
+++ b/docs/report/vpp_performance_tests/packet_throughput_graphs/ip4.rst
@@ -13,7 +13,7 @@ running in multiple configurations of VPP worker thread(s), a.k.a. VPP
 data plane thread(s), and their physical CPU core(s) placement.
 
 CSIT source code for the test cases used for plots can be found in
-`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls2106>`_.
+`CSIT git repository <https://git.fd.io/csit/tree/tests/vpp/perf/ip4?h=rls2110>`_.
 
 .. toctree::
 
-- 
cgit 1.2.3-korg