diff options
| author |   Luca Boccassi <luca.boccassi@gmail.com> | 2017-06-19 13:21:21 +0100 |
|---|---|---|
| committer | Luca Boccassi <luca.boccassi@gmail.com> | 2017-06-19 13:21:46 +0100 |
| commit | 9bd59f949df83594e434ea6b83b3bff841e6fd31 (patch) | |
| tree | faa977d7b7060b1058e338b33dda3f537fba3c21 /debian/patches | |
| parent | 1f784092de6f79612c6b1a4a4208f3abb03e7084 (diff) | |
| parent | e17e83e3a136be1a66eb1b580a4f049912b81657 (diff) | |
Merge branch '16.11.x' into 17.05.x
Conflicts:
app/test-pmd/parameters.c
app/test-pmd/testpmd.c
debian/changelog
debian/control
debian/patches/fix-vhost-user-socket-permission.patch
debian/rules
doc/guides/cryptodevs/qat.rst
doc/guides/nics/thunderx.rst
doc/guides/rel_notes/release_16_11.rst
drivers/net/i40e/i40e_rxtx_vec_neon.c
drivers/net/ixgbe/ixgbe_rxtx.c
drivers/net/mlx5/mlx5_rxtx.c
drivers/net/nfp/nfp_net.c
drivers/net/qede/qede_ethdev.c
drivers/net/thunderx/nicvf_struct.h
drivers/net/virtio/virtio_ethdev.c
drivers/net/virtio/virtio_pci.c
drivers/net/virtio/virtio_pci.h
drivers/net/virtio/virtio_user/virtio_user_dev.c
drivers/net/virtio/virtio_user/virtio_user_dev.h
drivers/net/virtio/virtio_user_ethdev.c
examples/dpdk_qat/main.c
examples/performance-thread/l3fwd-thread/main.c
examples/quota_watermark/qw/init.c
lib/librte_eal/bsdapp/eal/eal_pci.c
lib/librte_eal/common/include/rte_version.h
lib/librte_vhost/socket.c
lib/librte_vhost/vhost.c
lib/librte_vhost/vhost.h
pkg/dpdk.spec
test/test/test_mempool.c
Change-Id: I04809b1bcf4ecee4c171c5acb60a8a8aac8cc4a8
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'debian/patches')
11 files changed, 1447 insertions, 71 deletions
diff --git a/debian/patches/dpdk-dev-v3-eal-sPAPR-IOMMU-support-in-pci-probing-for-vfio-pci-in-ppc64le.patch b/debian/patches/dpdk-dev-v3-eal-sPAPR-IOMMU-support-in-pci-probing-for-vfio-pci-in-ppc64le.patch new file mode 100644 index 00000000..14435be2 --- /dev/null +++ b/debian/patches/dpdk-dev-v3-eal-sPAPR-IOMMU-support-in-pci-probing-for-vfio-pci-in-ppc64le.patch @@ -0,0 +1,165 @@ +Description: eal: sPAPR IOMMU support in pci probing for vfio-pci in ppc64le + + From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> + + Below changes adds pci probing support for vfio-pci devices in power8. + + v3 - better validation for kernel not implementing few iocts called + v2 - kernel version checked and doc updated + + Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> + +Note: can be dropped >=DPDK 17.05 + +Forwarded: yes, http://dpdk.org/dev/patchwork/patch/21482/ +Original-Author: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1670689 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-03-07 + +--- a/lib/librte_eal/linuxapp/eal/eal_vfio.c ++++ b/lib/librte_eal/linuxapp/eal/eal_vfio.c +@@ -50,12 +50,15 @@ + static struct vfio_config vfio_cfg; + + static int vfio_type1_dma_map(int); ++static int vfio_spapr_dma_map(int); + static int vfio_noiommu_dma_map(int); + + /* IOMMU types we support */ + static const struct vfio_iommu_type iommu_types[] = { + /* x86 IOMMU, otherwise known as type 1 */ + { RTE_VFIO_TYPE1, "Type 1", &vfio_type1_dma_map}, ++ /* ppc64 IOMMU, otherwise known as spapr */ ++ { RTE_VFIO_SPAPR, "sPAPR", &vfio_spapr_dma_map}, + /* IOMMU-less mode */ + { RTE_VFIO_NOIOMMU, "No-IOMMU", &vfio_noiommu_dma_map}, + }; +@@ -537,6 +540,93 @@ + } + + return 0; ++} ++ ++static int ++vfio_spapr_dma_map(int vfio_container_fd) ++{ ++ const struct rte_memseg *ms = rte_eal_get_physmem_layout(); ++ int i, ret; ++ ++ struct vfio_iommu_spapr_register_memory reg = { ++ .argsz = sizeof(reg), ++ .flags = 0 ++ }; ++ struct vfio_iommu_spapr_tce_info info = { ++ .argsz = sizeof(info), ++ }; ++ struct vfio_iommu_spapr_tce_create create = { ++ .argsz = sizeof(create), ++ }; ++ struct vfio_iommu_spapr_tce_remove remove = { ++ .argsz = sizeof(remove), ++ }; ++ ++ /* query spapr iommu info */ ++ ret = ioctl(vfio_container_fd, VFIO_IOMMU_SPAPR_TCE_GET_INFO, &info); ++ if (ret) { ++ RTE_LOG(ERR, EAL, " cannot get iommu info, " ++ "error %i (%s)\n", errno, strerror(errno)); ++ return -1; ++ } ++ ++ /* remove default DMA of 32 bit window */ ++ remove.start_addr = info.dma32_window_start; ++ ret = ioctl(vfio_container_fd, VFIO_IOMMU_SPAPR_TCE_REMOVE, &remove); ++ if (ret) { ++ RTE_LOG(ERR, EAL, " cannot remove default DMA window, " ++ "error %i (%s)\n", errno, strerror(errno)); ++ return -1; ++ } ++ ++ /* calculate window size based on number of hugepages configured */ ++ create.window_size = rte_eal_get_physmem_size(); ++ create.page_shift = __builtin_ctzll(ms->hugepage_sz); ++ create.levels = 2; ++ ++ ret = ioctl(vfio_container_fd, VFIO_IOMMU_SPAPR_TCE_CREATE, &create); ++ if (ret) { ++ RTE_LOG(ERR, EAL, " cannot create new DMA window, " ++ "error %i (%s)\n", errno, strerror(errno)); ++ return -1; ++ } ++ ++ /* map all DPDK segments for DMA. use 1:1 PA to IOVA mapping */ ++ for (i = 0; i < RTE_MAX_MEMSEG; i++) { ++ struct vfio_iommu_type1_dma_map dma_map; ++ ++ if (ms[i].addr == NULL) ++ break; ++ ++ reg.vaddr = (uintptr_t) ms[i].addr; ++ reg.size = ms[i].len; ++ ret = ioctl(vfio_container_fd, ++ VFIO_IOMMU_SPAPR_REGISTER_MEMORY, ®); ++ if (ret) { ++ RTE_LOG(ERR, EAL, " cannot register vaddr for IOMMU, " ++ "error %i (%s)\n", errno, strerror(errno)); ++ return -1; ++ } ++ ++ memset(&dma_map, 0, sizeof(dma_map)); ++ dma_map.argsz = sizeof(struct vfio_iommu_type1_dma_map); ++ dma_map.vaddr = ms[i].addr_64; ++ dma_map.size = ms[i].len; ++ dma_map.iova = ms[i].phys_addr; ++ dma_map.flags = VFIO_DMA_MAP_FLAG_READ | ++ VFIO_DMA_MAP_FLAG_WRITE; ++ ++ ret = ioctl(vfio_container_fd, VFIO_IOMMU_MAP_DMA, &dma_map); ++ ++ if (ret) { ++ RTE_LOG(ERR, EAL, " cannot set up DMA remapping, " ++ "error %i (%s)\n", errno, strerror(errno)); ++ return -1; ++ } ++ ++ } ++ ++ return 0; + } + + static int +--- a/lib/librte_eal/linuxapp/eal/eal_vfio.h ++++ b/lib/librte_eal/linuxapp/eal/eal_vfio.h +@@ -54,6 +54,31 @@ + + #define RTE_VFIO_TYPE1 VFIO_TYPE1_IOMMU + ++#ifndef VFIO_SPAPR_TCE_v2_IOMMU ++#define RTE_VFIO_SPAPR 7 ++#define VFIO_IOMMU_SPAPR_REGISTER_MEMORY _IO(VFIO_TYPE, VFIO_BASE + 17) ++#define VFIO_IOMMU_SPAPR_TCE_CREATE _IO(VFIO_TYPE, VFIO_BASE + 19) ++#define VFIO_IOMMU_SPAPR_TCE_REMOVE _IO(VFIO_TYPE, VFIO_BASE + 20) ++struct vfio_iommu_spapr_register_memory { ++ uint32_t argsz; ++ uint32_t flags; ++ uint64_t vaddr; ++ uint64_t size; ++}; ++struct vfio_iommu_spapr_tce_create { ++ uint32_t argsz; ++ uint32_t page_shift; ++ uint64_t window_size; ++ uint32_t levels; ++}; ++struct vfio_iommu_spapr_tce_remove { ++ uint32_t argsz; ++ uint64_t start_addr; ++}; ++#else ++#define RTE_VFIO_SPAPR VFIO_SPAPR_TCE_v2_IOMMU ++#endif ++ + #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0) + #define RTE_VFIO_NOIOMMU 8 + #else diff --git a/debian/patches/dpdk-dev-v4-i40e-implement-vector-PMD-for-altivec.patch b/debian/patches/dpdk-dev-v4-i40e-implement-vector-PMD-for-altivec.patch new file mode 100644 index 00000000..a1001cf0 --- /dev/null +++ b/debian/patches/dpdk-dev-v4-i40e-implement-vector-PMD-for-altivec.patch @@ -0,0 +1,724 @@ +Description: i40e: implement vector PMD for altivec + + From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> + + This patch enables i40e driver in powerpc along with its altivec + intrinsic support. + + Changes: + v4 - docs and config update. + v3 - minor corrections for coding style standard. + v2 - minor corrections for gcc strict aliasing and coding style standard. + + Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> + +Note: can be dropped >=DPDK 17.05 + +Forwarded: yes, http://dpdk.org/dev/patchwork/patch/20680/ +Original-Author: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1670686 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-03-07 + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -166,6 +166,7 @@ + M: Chao Zhu <chaozhu@linux.vnet.ibm.com> + F: lib/librte_eal/common/arch/ppc_64/ + F: lib/librte_eal/common/include/arch/ppc_64/ ++F: drivers/net/i40e/i40e_rxtx_vec_altivec.c + + Intel x86 + M: Bruce Richardson <bruce.richardson@intel.com> +--- a/config/defconfig_ppc_64-power8-linuxapp-gcc ++++ b/config/defconfig_ppc_64-power8-linuxapp-gcc +@@ -49,7 +49,6 @@ + # Note: Initially, all of the PMD drivers compilation are turned off on Power + # Will turn on them only after the successful testing on Power + CONFIG_RTE_LIBRTE_IXGBE_PMD=n +-CONFIG_RTE_LIBRTE_I40E_PMD=n + CONFIG_RTE_LIBRTE_VIRTIO_PMD=y + CONFIG_RTE_LIBRTE_VMXNET3_PMD=n + CONFIG_RTE_LIBRTE_ENIC_PMD=n +--- a/doc/guides/nics/features/i40e.ini ++++ b/doc/guides/nics/features/i40e.ini +@@ -46,3 +46,4 @@ + x86-32 = Y + x86-64 = Y + ARMv8 = Y ++Power8 = Y +--- a/doc/guides/nics/features/i40e_vec.ini ++++ b/doc/guides/nics/features/i40e_vec.ini +@@ -38,3 +38,4 @@ + x86-32 = Y + x86-64 = Y + ARMv8 = Y ++Power8 = Y +--- a/drivers/net/i40e/Makefile ++++ b/drivers/net/i40e/Makefile +@@ -99,6 +99,8 @@ + SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_rxtx.c + ifeq ($(CONFIG_RTE_ARCH_ARM64),y) + SRCS-$(CONFIG_RTE_LIBRTE_I40E_INC_VECTOR) += i40e_rxtx_vec_neon.c ++else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y) ++SRCS-$(CONFIG_RTE_LIBRTE_I40E_INC_VECTOR) += i40e_rxtx_vec_altivec.c + else + SRCS-$(CONFIG_RTE_LIBRTE_I40E_INC_VECTOR) += i40e_rxtx_vec_sse.c + endif +--- /dev/null ++++ b/drivers/net/i40e/i40e_rxtx_vec_altivec.c +@@ -0,0 +1,654 @@ ++/*- ++ * BSD LICENSE ++ * ++ * Copyright(c) 2010-2015 Intel Corporation. All rights reserved. ++ * Copyright(c) 2017 IBM Corporation. ++ * All rights reserved. ++ * ++ * Redistribution and use in source and binary forms, with or without ++ * modification, are permitted provided that the following conditions ++ * are met: ++ * ++ * * Redistributions of source code must retain the above copyright ++ * notice, this list of conditions and the following disclaimer. ++ * * Redistributions in binary form must reproduce the above copyright ++ * notice, this list of conditions and the following disclaimer in ++ * the documentation and/or other materials provided with the ++ * distribution. ++ * * Neither the name of Intel Corporation nor the names of its ++ * contributors may be used to endorse or promote products derived ++ * from this software without specific prior written permission. ++ * ++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS ++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT ++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR ++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT ++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, ++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT ++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, ++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY ++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT ++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ++ */ ++ ++#include <stdint.h> ++#include <rte_ethdev.h> ++#include <rte_malloc.h> ++ ++#include "base/i40e_prototype.h" ++#include "base/i40e_type.h" ++#include "i40e_ethdev.h" ++#include "i40e_rxtx.h" ++#include "i40e_rxtx_vec_common.h" ++ ++#include <altivec.h> ++ ++#pragma GCC diagnostic ignored "-Wcast-qual" ++ ++static inline void ++i40e_rxq_rearm(struct i40e_rx_queue *rxq) ++{ ++ int i; ++ uint16_t rx_id; ++ volatile union i40e_rx_desc *rxdp; ++ ++ struct i40e_rx_entry *rxep = &rxq->sw_ring[rxq->rxrearm_start]; ++ struct rte_mbuf *mb0, *mb1; ++ ++ vector unsigned long hdr_room = (vector unsigned long){ ++ RTE_PKTMBUF_HEADROOM, ++ RTE_PKTMBUF_HEADROOM}; ++ vector unsigned long dma_addr0, dma_addr1; ++ ++ rxdp = rxq->rx_ring + rxq->rxrearm_start; ++ ++ /* Pull 'n' more MBUFs into the software ring */ ++ if (rte_mempool_get_bulk(rxq->mp, ++ (void *)rxep, ++ RTE_I40E_RXQ_REARM_THRESH) < 0) { ++ if (rxq->rxrearm_nb + RTE_I40E_RXQ_REARM_THRESH >= ++ rxq->nb_rx_desc) { ++ dma_addr0 = (vector unsigned long){}; ++ for (i = 0; i < RTE_I40E_DESCS_PER_LOOP; i++) { ++ rxep[i].mbuf = &rxq->fake_mbuf; ++ vec_st(dma_addr0, 0, ++ (vector unsigned long *)&rxdp[i].read); ++ } ++ } ++ rte_eth_devices[rxq->port_id].data->rx_mbuf_alloc_failed += ++ RTE_I40E_RXQ_REARM_THRESH; ++ return; ++ } ++ ++ /* Initialize the mbufs in vector, process 2 mbufs in one loop */ ++ for (i = 0; i < RTE_I40E_RXQ_REARM_THRESH; i += 2, rxep += 2) { ++ vector unsigned long vaddr0, vaddr1; ++ uintptr_t p0, p1; ++ ++ mb0 = rxep[0].mbuf; ++ mb1 = rxep[1].mbuf; ++ ++ /* Flush mbuf with pkt template. ++ * Data to be rearmed is 6 bytes long. ++ * Though, RX will overwrite ol_flags that are coming next ++ * anyway. So overwrite whole 8 bytes with one load: ++ * 6 bytes of rearm_data plus first 2 bytes of ol_flags. ++ */ ++ p0 = (uintptr_t)&mb0->rearm_data; ++ *(uint64_t *)p0 = rxq->mbuf_initializer; ++ p1 = (uintptr_t)&mb1->rearm_data; ++ *(uint64_t *)p1 = rxq->mbuf_initializer; ++ ++ /* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */ ++ vaddr0 = vec_ld(0, (vector unsigned long *)&mb0->buf_addr); ++ vaddr1 = vec_ld(0, (vector unsigned long *)&mb1->buf_addr); ++ ++ /* convert pa to dma_addr hdr/data */ ++ dma_addr0 = vec_mergel(vaddr0, vaddr0); ++ dma_addr1 = vec_mergel(vaddr1, vaddr1); ++ ++ /* add headroom to pa values */ ++ dma_addr0 = vec_add(dma_addr0, hdr_room); ++ dma_addr1 = vec_add(dma_addr1, hdr_room); ++ ++ /* flush desc with pa dma_addr */ ++ vec_st(dma_addr0, 0, (vector unsigned long *)&rxdp++->read); ++ vec_st(dma_addr1, 0, (vector unsigned long *)&rxdp++->read); ++ } ++ ++ rxq->rxrearm_start += RTE_I40E_RXQ_REARM_THRESH; ++ if (rxq->rxrearm_start >= rxq->nb_rx_desc) ++ rxq->rxrearm_start = 0; ++ ++ rxq->rxrearm_nb -= RTE_I40E_RXQ_REARM_THRESH; ++ ++ rx_id = (uint16_t)((rxq->rxrearm_start == 0) ? ++ (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1)); ++ ++ /* Update the tail pointer on the NIC */ ++ I40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id); ++} ++ ++/* Handling the offload flags (olflags) field takes computation ++ * time when receiving packets. Therefore we provide a flag to disable ++ * the processing of the olflags field when they are not needed. This ++ * gives improved performance, at the cost of losing the offload info ++ * in the received packet ++ */ ++#ifdef RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE ++ ++static inline void ++desc_to_olflags_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts) ++{ ++ vector unsigned int vlan0, vlan1, rss, l3_l4e; ++ ++ /* mask everything except RSS, flow director and VLAN flags ++ * bit2 is for VLAN tag, bit11 for flow director indication ++ * bit13:12 for RSS indication. ++ */ ++ const vector unsigned int rss_vlan_msk = (vector unsigned int){ ++ (int32_t)0x1c03804, (int32_t)0x1c03804, ++ (int32_t)0x1c03804, (int32_t)0x1c03804}; ++ ++ /* map rss and vlan type to rss hash and vlan flag */ ++ const vector unsigned char vlan_flags = (vector unsigned char){ ++ 0, 0, 0, 0, ++ PKT_RX_VLAN_PKT | PKT_RX_VLAN_STRIPPED, 0, 0, 0, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0}; ++ ++ const vector unsigned char rss_flags = (vector unsigned char){ ++ 0, PKT_RX_FDIR, 0, 0, ++ 0, 0, PKT_RX_RSS_HASH, PKT_RX_RSS_HASH | PKT_RX_FDIR, ++ 0, 0, 0, 0, ++ 0, 0, 0, 0}; ++ ++ const vector unsigned char l3_l4e_flags = (vector unsigned char){ ++ 0, ++ PKT_RX_IP_CKSUM_BAD, ++ PKT_RX_L4_CKSUM_BAD, ++ PKT_RX_L4_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD, ++ PKT_RX_EIP_CKSUM_BAD, ++ PKT_RX_EIP_CKSUM_BAD | PKT_RX_IP_CKSUM_BAD, ++ PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD, ++ PKT_RX_EIP_CKSUM_BAD | PKT_RX_L4_CKSUM_BAD ++ | PKT_RX_IP_CKSUM_BAD, ++ 0, 0, 0, 0, 0, 0, 0, 0}; ++ ++ vlan0 = (vector unsigned int)vec_mergel(descs[0], descs[1]); ++ vlan1 = (vector unsigned int)vec_mergel(descs[2], descs[3]); ++ vlan0 = (vector unsigned int)vec_mergeh(vlan0, vlan1); ++ ++ vlan1 = vec_and(vlan0, rss_vlan_msk); ++ vlan0 = (vector unsigned int)vec_perm(vlan_flags, ++ (vector unsigned char){}, ++ *(vector unsigned char *)&vlan1); ++ ++ rss = vec_sr(vlan1, (vector unsigned int){11, 11, 11, 11}); ++ rss = (vector unsigned int)vec_perm(rss_flags, (vector unsigned char){}, ++ *(vector unsigned char *)&rss); ++ ++ l3_l4e = vec_sr(vlan1, (vector unsigned int){22, 22, 22, 22}); ++ l3_l4e = (vector unsigned int)vec_perm(l3_l4e_flags, ++ (vector unsigned char){}, ++ *(vector unsigned char *)&l3_l4e); ++ ++ vlan0 = vec_or(vlan0, rss); ++ vlan0 = vec_or(vlan0, l3_l4e); ++ ++ rx_pkts[0]->ol_flags = (uint64_t)vlan0[2]; ++ rx_pkts[1]->ol_flags = (uint64_t)vlan0[3]; ++ rx_pkts[2]->ol_flags = (uint64_t)vlan0[0]; ++ rx_pkts[3]->ol_flags = (uint64_t)vlan0[1]; ++} ++#else ++#define desc_to_olflags_v(desc, rx_pkts) do {} while (0) ++#endif ++ ++#define PKTLEN_SHIFT 10 ++ ++static inline void ++desc_to_ptype_v(vector unsigned long descs[4], struct rte_mbuf **rx_pkts) ++{ ++ vector unsigned long ptype0 = vec_mergel(descs[0], descs[1]); ++ vector unsigned long ptype1 = vec_mergel(descs[2], descs[3]); ++ ++ ptype0 = vec_sr(ptype0, (vector unsigned long){30, 30}); ++ ptype1 = vec_sr(ptype1, (vector unsigned long){30, 30}); ++ ++ rx_pkts[0]->packet_type = i40e_rxd_pkt_type_mapping( ++ (*(vector unsigned char *)&ptype0)[0]); ++ rx_pkts[1]->packet_type = i40e_rxd_pkt_type_mapping( ++ (*(vector unsigned char *)&ptype0)[8]); ++ rx_pkts[2]->packet_type = i40e_rxd_pkt_type_mapping( ++ (*(vector unsigned char *)&ptype1)[0]); ++ rx_pkts[3]->packet_type = i40e_rxd_pkt_type_mapping( ++ (*(vector unsigned char *)&ptype1)[8]); ++} ++ ++ /* Notice: ++ * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet ++ * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST ++ * numbers of DD bits ++ */ ++static inline uint16_t ++_recv_raw_pkts_vec(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts, ++ uint16_t nb_pkts, uint8_t *split_packet) ++{ ++ volatile union i40e_rx_desc *rxdp; ++ struct i40e_rx_entry *sw_ring; ++ uint16_t nb_pkts_recd; ++ int pos; ++ uint64_t var; ++ vector unsigned char shuf_msk; ++ ++ vector unsigned short crc_adjust = (vector unsigned short){ ++ 0, 0, /* ignore pkt_type field */ ++ rxq->crc_len, /* sub crc on pkt_len */ ++ 0, /* ignore high-16bits of pkt_len */ ++ rxq->crc_len, /* sub crc on data_len */ ++ 0, 0, 0 /* ignore non-length fields */ ++ }; ++ vector unsigned long dd_check, eop_check; ++ ++ /* nb_pkts shall be less equal than RTE_I40E_MAX_RX_BURST */ ++ nb_pkts = RTE_MIN(nb_pkts, RTE_I40E_MAX_RX_BURST); ++ ++ /* nb_pkts has to be floor-aligned to RTE_I40E_DESCS_PER_LOOP */ ++ nb_pkts = RTE_ALIGN_FLOOR(nb_pkts, RTE_I40E_DESCS_PER_LOOP); ++ ++ /* Just the act of getting into the function from the application is ++ * going to cost about 7 cycles ++ */ ++ rxdp = rxq->rx_ring + rxq->rx_tail; ++ ++ rte_prefetch0(rxdp); ++ ++ /* See if we need to rearm the RX queue - gives the prefetch a bit ++ * of time to act ++ */ ++ if (rxq->rxrearm_nb > RTE_I40E_RXQ_REARM_THRESH) ++ i40e_rxq_rearm(rxq); ++ ++ /* Before we start moving massive data around, check to see if ++ * there is actually a packet available ++ */ ++ if (!(rxdp->wb.qword1.status_error_len & ++ rte_cpu_to_le_32(1 << I40E_RX_DESC_STATUS_DD_SHIFT))) ++ return 0; ++ ++ /* 4 packets DD mask */ ++ dd_check = (vector unsigned long){0x0000000100000001ULL, ++ 0x0000000100000001ULL}; ++ ++ /* 4 packets EOP mask */ ++ eop_check = (vector unsigned long){0x0000000200000002ULL, ++ 0x0000000200000002ULL}; ++ ++ /* mask to shuffle from desc. to mbuf */ ++ shuf_msk = (vector unsigned char){ ++ 0xFF, 0xFF, /* pkt_type set as unknown */ ++ 0xFF, 0xFF, /* pkt_type set as unknown */ ++ 14, 15, /* octet 15~14, low 16 bits pkt_len */ ++ 0xFF, 0xFF, /* skip high 16 bits pkt_len, zero out */ ++ 14, 15, /* octet 15~14, 16 bits data_len */ ++ 2, 3, /* octet 2~3, low 16 bits vlan_macip */ ++ 4, 5, 6, 7 /* octet 4~7, 32bits rss */ ++ }; ++ ++ /* Cache is empty -> need to scan the buffer rings, but first move ++ * the next 'n' mbufs into the cache ++ */ ++ sw_ring = &rxq->sw_ring[rxq->rx_tail]; ++ ++ /* A. load 4 packet in one loop ++ * [A*. mask out 4 unused dirty field in desc] ++ * B. copy 4 mbuf point from swring to rx_pkts ++ * C. calc the number of DD bits among the 4 packets ++ * [C*. extract the end-of-packet bit, if requested] ++ * D. fill info. from desc to mbuf ++ */ ++ ++ for (pos = 0, nb_pkts_recd = 0; pos < nb_pkts; ++ pos += RTE_I40E_DESCS_PER_LOOP, ++ rxdp += RTE_I40E_DESCS_PER_LOOP) { ++ vector unsigned long descs[RTE_I40E_DESCS_PER_LOOP]; ++ vector unsigned char pkt_mb1, pkt_mb2, pkt_mb3, pkt_mb4; ++ vector unsigned short staterr, sterr_tmp1, sterr_tmp2; ++ vector unsigned long mbp1, mbp2; /* two mbuf pointer ++ * in one XMM reg. ++ */ ++ ++ /* B.1 load 1 mbuf point */ ++ mbp1 = *(vector unsigned long *)&sw_ring[pos]; ++ /* Read desc statuses backwards to avoid race condition */ ++ /* A.1 load 4 pkts desc */ ++ descs[3] = *(vector unsigned long *)(rxdp + 3); ++ rte_compiler_barrier(); ++ ++ /* B.2 copy 2 mbuf point into rx_pkts */ ++ *(vector unsigned long *)&rx_pkts[pos] = mbp1; ++ ++ /* B.1 load 1 mbuf point */ ++ mbp2 = *(vector unsigned long *)&sw_ring[pos + 2]; ++ ++ descs[2] = *(vector unsigned long *)(rxdp + 2); ++ rte_compiler_barrier(); ++ /* B.1 load 2 mbuf point */ ++ descs[1] = *(vector unsigned long *)(rxdp + 1); ++ rte_compiler_barrier(); ++ descs[0] = *(vector unsigned long *)(rxdp); ++ ++ /* B.2 copy 2 mbuf point into rx_pkts */ ++ *(vector unsigned long *)&rx_pkts[pos + 2] = mbp2; ++ ++ if (split_packet) { ++ rte_mbuf_prefetch_part2(rx_pkts[pos]); ++ rte_mbuf_prefetch_part2(rx_pkts[pos + 1]); ++ rte_mbuf_prefetch_part2(rx_pkts[pos + 2]); ++ rte_mbuf_prefetch_part2(rx_pkts[pos + 3]); ++ } ++ ++ /* avoid compiler reorder optimization */ ++ rte_compiler_barrier(); ++ ++ /* pkt 3,4 shift the pktlen field to be 16-bit aligned*/ ++ const vector unsigned int len3 = vec_sl( ++ vec_ld(0, (vector unsigned int *)&descs[3]), ++ (vector unsigned int){0, 0, 0, PKTLEN_SHIFT}); ++ ++ const vector unsigned int len2 = vec_sl( ++ vec_ld(0, (vector unsigned int *)&descs[2]), ++ (vector unsigned int){0, 0, 0, PKTLEN_SHIFT}); ++ ++ /* merge the now-aligned packet length fields back in */ ++ descs[3] = (vector unsigned long)len3; ++ descs[2] = (vector unsigned long)len2; ++ ++ /* D.1 pkt 3,4 convert format from desc to pktmbuf */ ++ pkt_mb4 = vec_perm((vector unsigned char)descs[3], ++ (vector unsigned char){}, shuf_msk); ++ pkt_mb3 = vec_perm((vector unsigned char)descs[2], ++ (vector unsigned char){}, shuf_msk); ++ ++ /* C.1 4=>2 filter staterr info only */ ++ sterr_tmp2 = vec_mergel((vector unsigned short)descs[3], ++ (vector unsigned short)descs[2]); ++ /* C.1 4=>2 filter staterr info only */ ++ sterr_tmp1 = vec_mergel((vector unsigned short)descs[1], ++ (vector unsigned short)descs[0]); ++ /* D.2 pkt 3,4 set in_port/nb_seg and remove crc */ ++ pkt_mb4 = (vector unsigned char)vec_sub( ++ (vector unsigned short)pkt_mb4, crc_adjust); ++ pkt_mb3 = (vector unsigned char)vec_sub( ++ (vector unsigned short)pkt_mb3, crc_adjust); ++ ++ /* pkt 1,2 shift the pktlen field to be 16-bit aligned*/ ++ const vector unsigned int len1 = vec_sl( ++ vec_ld(0, (vector unsigned int *)&descs[1]), ++ (vector unsigned int){0, 0, 0, PKTLEN_SHIFT}); ++ const vector unsigned int len0 = vec_sl( ++ vec_ld(0, (vector unsigned int *)&descs[0]), ++ (vector unsigned int){0, 0, 0, PKTLEN_SHIFT}); ++ ++ /* merge the now-aligned packet length fields back in */ ++ descs[1] = (vector unsigned long)len1; ++ descs[0] = (vector unsigned long)len0; ++ ++ /* D.1 pkt 1,2 convert format from desc to pktmbuf */ ++ pkt_mb2 = vec_perm((vector unsigned char)descs[1], ++ (vector unsigned char){}, shuf_msk); ++ pkt_mb1 = vec_perm((vector unsigned char)descs[0], ++ (vector unsigned char){}, shuf_msk); ++ ++ /* C.2 get 4 pkts staterr value */ ++ staterr = (vector unsigned short)vec_mergeh( ++ sterr_tmp1, sterr_tmp2); ++ ++ /* D.3 copy final 3,4 data to rx_pkts */ ++ vec_st(pkt_mb4, 0, ++ (vector unsigned char *)&rx_pkts[pos + 3] ++ ->rx_descriptor_fields1 ++ ); ++ vec_st(pkt_mb3, 0, ++ (vector unsigned char *)&rx_pkts[pos + 2] ++ ->rx_descriptor_fields1 ++ ); ++ ++ /* D.2 pkt 1,2 set in_port/nb_seg and remove crc */ ++ pkt_mb2 = (vector unsigned char)vec_sub( ++ (vector unsigned short)pkt_mb2, crc_adjust); ++ pkt_mb1 = (vector unsigned char)vec_sub( ++ (vector unsigned short)pkt_mb1, crc_adjust); ++ ++ /* C* extract and record EOP bit */ ++ if (split_packet) { ++ vector unsigned char eop_shuf_mask = ++ (vector unsigned char){ ++ 0xFF, 0xFF, 0xFF, 0xFF, ++ 0xFF, 0xFF, 0xFF, 0xFF, ++ 0xFF, 0xFF, 0xFF, 0xFF, ++ 0x04, 0x0C, 0x00, 0x08 ++ }; ++ ++ /* and with mask to extract bits, flipping 1-0 */ ++ vector unsigned char eop_bits = vec_and( ++ (vector unsigned char)vec_nor(staterr, staterr), ++ (vector unsigned char)eop_check); ++ /* the staterr values are not in order, as the count ++ * count of dd bits doesn't care. However, for end of ++ * packet tracking, we do care, so shuffle. This also ++ * compresses the 32-bit values to 8-bit ++ */ ++ eop_bits = vec_perm(eop_bits, (vector unsigned char){}, ++ eop_shuf_mask); ++ /* store the resulting 32-bit value */ ++ *split_packet = (vec_ld(0, ++ (vector unsigned int *)&eop_bits))[0]; ++ split_packet += RTE_I40E_DESCS_PER_LOOP; ++ ++ /* zero-out next pointers */ ++ rx_pkts[pos]->next = NULL; ++ rx_pkts[pos + 1]->next = NULL; ++ rx_pkts[pos + 2]->next = NULL; ++ rx_pkts[pos + 3]->next = NULL; ++ } ++ ++ /* C.3 calc available number of desc */ ++ staterr = vec_and(staterr, (vector unsigned short)dd_check); ++ ++ /* D.3 copy final 1,2 data to rx_pkts */ ++ vec_st(pkt_mb2, 0, ++ (vector unsigned char *)&rx_pkts[pos + 1] ++ ->rx_descriptor_fields1 ++ ); ++ vec_st(pkt_mb1, 0, ++ (vector unsigned char *)&rx_pkts[pos]->rx_descriptor_fields1 ++ ); ++ desc_to_ptype_v(descs, &rx_pkts[pos]); ++ desc_to_olflags_v(descs, &rx_pkts[pos]); ++ ++ /* C.4 calc avaialbe number of desc */ ++ var = __builtin_popcountll((vec_ld(0, ++ (vector unsigned long *)&staterr)[0])); ++ nb_pkts_recd += var; ++ if (likely(var != RTE_I40E_DESCS_PER_LOOP)) ++ break; ++ } ++ ++ /* Update our internal tail pointer */ ++ rxq->rx_tail = (uint16_t)(rxq->rx_tail + nb_pkts_recd); ++ rxq->rx_tail = (uint16_t)(rxq->rx_tail & (rxq->nb_rx_desc - 1)); ++ rxq->rxrearm_nb = (uint16_t)(rxq->rxrearm_nb + nb_pkts_recd); ++ ++ return nb_pkts_recd; ++} ++ ++ /* Notice: ++ * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet ++ * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST ++ * numbers of DD bits ++ */ ++uint16_t ++i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, ++ uint16_t nb_pkts) ++{ ++ return _recv_raw_pkts_vec(rx_queue, rx_pkts, nb_pkts, NULL); ++} ++ ++ /* vPMD receive routine that reassembles scattered packets ++ * Notice: ++ * - nb_pkts < RTE_I40E_DESCS_PER_LOOP, just return no packet ++ * - nb_pkts > RTE_I40E_VPMD_RX_BURST, only scan RTE_I40E_VPMD_RX_BURST ++ * numbers of DD bits ++ */ ++uint16_t ++i40e_recv_scattered_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts, ++ uint16_t nb_pkts) ++{ ++ struct i40e_rx_queue *rxq = rx_queue; ++ uint8_t split_flags[RTE_I40E_VPMD_RX_BURST] = {0}; ++ ++ /* get some new buffers */ ++ uint16_t nb_bufs = _recv_raw_pkts_vec(rxq, rx_pkts, nb_pkts, ++ split_flags); ++ if (nb_bufs == 0) ++ return 0; ++ ++ /* happy day case, full burst + no packets to be joined */ ++ const uint64_t *split_fl64 = (uint64_t *)split_flags; ++ ++ if (rxq->pkt_first_seg == NULL && ++ split_fl64[0] == 0 && split_fl64[1] == 0 && ++ split_fl64[2] == 0 && split_fl64[3] == 0) ++ return nb_bufs; ++ ++ /* reassemble any packets that need reassembly*/ ++ unsigned int i = 0; ++ ++ if (!rxq->pkt_first_seg) { ++ /* find the first split flag, and only reassemble then*/ ++ while (i < nb_bufs && !split_flags[i]) ++ i++; ++ if (i == nb_bufs) ++ return nb_bufs; ++ } ++ return i + reassemble_packets(rxq, &rx_pkts[i], nb_bufs - i, ++ &split_flags[i]); ++} ++ ++static inline void ++vtx1(volatile struct i40e_tx_desc *txdp, ++ struct rte_mbuf *pkt, uint64_t flags) ++{ ++ uint64_t high_qw = (I40E_TX_DESC_DTYPE_DATA | ++ ((uint64_t)flags << I40E_TXD_QW1_CMD_SHIFT) | ++ ((uint64_t)pkt->data_len << I40E_TXD_QW1_TX_BUF_SZ_SHIFT)); ++ ++ vector unsigned long descriptor = (vector unsigned long){ ++ pkt->buf_physaddr + pkt->data_off, high_qw}; ++ *(vector unsigned long *)txdp = descriptor; ++} ++ ++static inline void ++vtx(volatile struct i40e_tx_desc *txdp, ++ struct rte_mbuf **pkt, uint16_t nb_pkts, uint64_t flags) ++{ ++ int i; ++ ++ for (i = 0; i < nb_pkts; ++i, ++txdp, ++pkt) ++ vtx1(txdp, *pkt, flags); ++} ++ ++uint16_t ++i40e_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, ++ uint16_t nb_pkts) ++{ ++ struct i40e_tx_queue *txq = (struct i40e_tx_queue *)tx_queue; ++ volatile struct i40e_tx_desc *txdp; ++ struct i40e_tx_entry *txep; ++ uint16_t n, nb_commit, tx_id; ++ uint64_t flags = I40E_TD_CMD; ++ uint64_t rs = I40E_TX_DESC_CMD_RS | I40E_TD_CMD; ++ int i; ++ ++ /* cross rx_thresh boundary is not allowed */ ++ nb_pkts = RTE_MIN(nb_pkts, txq->tx_rs_thresh); ++ ++ if (txq->nb_tx_free < txq->tx_free_thresh) ++ i40e_tx_free_bufs(txq); ++ ++ nb_pkts = (uint16_t)RTE_MIN(txq->nb_tx_free, nb_pkts); ++ nb_commit = nb_pkts; ++ if (unlikely(nb_pkts == 0)) ++ return 0; ++ ++ tx_id = txq->tx_tail; ++ txdp = &txq->tx_ring[tx_id]; ++ txep = &txq->sw_ring[tx_id]; ++ ++ txq->nb_tx_free = (uint16_t)(txq->nb_tx_free - nb_pkts); ++ ++ n = (uint16_t)(txq->nb_tx_desc - tx_id); ++ if (nb_commit >= n) { ++ tx_backlog_entry(txep, tx_pkts, n); ++ ++ for (i = 0; i < n - 1; ++i, ++tx_pkts, ++txdp) ++ vtx1(txdp, *tx_pkts, flags); ++ ++ vtx1(txdp, *tx_pkts++, rs); ++ ++ nb_commit = (uint16_t)(nb_commit - n); ++ ++ tx_id = 0; ++ txq->tx_next_rs = (uint16_t)(txq->tx_rs_thresh - 1); ++ ++ /* avoid reach the end of ring */ ++ txdp = &txq->tx_ring[tx_id]; ++ txep = &txq->sw_ring[tx_id]; ++ } ++ ++ tx_backlog_entry(txep, tx_pkts, nb_commit); ++ ++ vtx(txdp, tx_pkts, nb_commit, flags); ++ ++ tx_id = (uint16_t)(tx_id + nb_commit); ++ if (tx_id > txq->tx_next_rs) { ++ txq->tx_ring[txq->tx_next_rs].cmd_type_offset_bsz |= ++ rte_cpu_to_le_64(((uint64_t)I40E_TX_DESC_CMD_RS) << ++ I40E_TXD_QW1_CMD_SHIFT); ++ txq->tx_next_rs = ++ (uint16_t)(txq->tx_next_rs + txq->tx_rs_thresh); ++ } ++ ++ txq->tx_tail = tx_id; ++ ++ I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); ++ ++ return nb_pkts; ++} ++ ++void __attribute__((cold)) ++i40e_rx_queue_release_mbufs_vec(struct i40e_rx_queue *rxq) ++{ ++ _i40e_rx_queue_release_mbufs_vec(rxq); ++} ++ ++int __attribute__((cold)) ++i40e_rxq_vec_setup(struct i40e_rx_queue *rxq) ++{ ++ return i40e_rxq_vec_setup_default(rxq); ++} ++ ++int __attribute__((cold)) ++i40e_txq_vec_setup(struct i40e_tx_queue __rte_unused * txq) ++{ ++ return 0; ++} ++ ++int __attribute__((cold)) ++i40e_rx_vec_dev_conf_condition_check(struct rte_eth_dev *dev) ++{ ++ return i40e_rx_vec_dev_conf_condition_check_default(dev); ++} diff --git a/debian/patches/fix-vhost-user-socket-permission.patch b/debian/patches/fix-vhost-user-socket-permission.patch index 6945b8b5..7cd188c5 100644 --- a/debian/patches/fix-vhost-user-socket-permission.patch +++ b/debian/patches/fix-vhost-user-socket-permission.patch @@ -25,9 +25,17 @@ Fixes LP: #1546565 So over time we have to check when we can drop it at the price of a config transition - likely OVS 2.6 won't need it anymore. +*Update* + - the handling and lifecycle of this changed in Openvswitch 2.7 so we can no + more use internal_config. + - Also the upstreaming was aborted as that now clearly goes towards client + mode vhost sockets for this (and other issues). + - But until that is fully working we have to carry the workaround. + - Updated to work with Openvswitch 2.7 (and backward compatible to 2.6) + Forwarded: yes Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> -Last-Update: 2016-09-28 +Last-Update: 2017-05-23 --- a/doc/guides/testpmd_app_ug/run_app.rst +++ b/doc/guides/testpmd_app_ug/run_app.rst @@ -68,26 +76,6 @@ Last-Update: 2016-09-28 {0, 0, NULL, 0 } }; -@@ -161,6 +163,8 @@ - #endif - internal_cfg->vmware_tsc_map = 0; - internal_cfg->create_uio_dev = 0; -+ internal_cfg->vhost_sock_owner = NULL; -+ internal_cfg->vhost_sock_perm = NULL; - } - - static int ---- a/lib/librte_eal/common/eal_internal_cfg.h -+++ b/lib/librte_eal/common/eal_internal_cfg.h -@@ -82,6 +82,8 @@ - volatile enum rte_intr_mode vfio_intr_mode; - const char *hugefile_prefix; /**< the base filename of hugetlbfs files */ - const char *hugepage_dir; /**< specific hugetlbfs directory to use */ -+ const char *vhost_sock_owner; /**< owner:group of vhost_user sockets */ -+ const char *vhost_sock_perm; /**< permissions of vhost_user sockets */ - - unsigned num_hugepage_sizes; /**< how many sizes on this system */ - struct hugepage_info hugepage_info[MAX_HUGEPAGE_SIZES]; --- a/lib/librte_eal/common/eal_options.h +++ b/lib/librte_eal/common/eal_options.h @@ -83,6 +83,10 @@ @@ -103,7 +91,7 @@ Last-Update: 2016-09-28 --- a/lib/librte_eal/common/include/rte_eal.h +++ b/lib/librte_eal/common/include/rte_eal.h -@@ -286,6 +286,11 @@ +@@ -256,6 +256,11 @@ #define RTE_INIT(func) \ static void __attribute__((constructor, used)) func(void) @@ -127,7 +115,20 @@ Last-Update: 2016-09-28 #include <rte_common.h> #include <rte_debug.h> -@@ -356,6 +359,8 @@ +@@ -117,6 +120,12 @@ + /* internal configuration */ + struct internal_config internal_config; + ++/* workaround to be able to create the sockets under a certain set of ++ * owner/permissions as specified to EAL until solved upstream */ ++static uid_t debian_vhost_sock_uid = (uid_t)-1; ++static gid_t debian_vhost_sock_gid = (gid_t)-1; ++static mode_t debian_vhost_sock_perm = 0; ++ + /* used by rte_rdtsc() */ + int rte_cycles_vmware_tsc_map; + +@@ -354,6 +363,8 @@ " --"OPT_CREATE_UIO_DEV" Create /dev/uioX (usually done by hotplug)\n" " --"OPT_VFIO_INTR" Interrupt mode for VFIO (legacy|msi|msix)\n" " --"OPT_XEN_DOM0" Support running on Xen dom0 without hugetlbfs\n" @@ -136,26 +137,10 @@ Last-Update: 2016-09-28 "\n"); /* Allow the application to print its usage message too if hook is set */ if ( rte_application_usage_hook ) { -@@ -611,6 +616,14 @@ - internal_config.create_uio_dev = 1; - break; - -+ case OPT_VHOST_OWNER_NUM: -+ internal_config.vhost_sock_owner = optarg; -+ break; -+ -+ case OPT_VHOST_PERM_NUM: -+ internal_config.vhost_sock_perm = optarg; -+ break; -+ - default: - if (opt < OPT_LONG_MIN_NUM && isprint(opt)) { - RTE_LOG(ERR, EAL, "Option %c is not supported " -@@ -995,3 +1008,172 @@ - /* Module has been found */ - return 1; +@@ -515,6 +526,121 @@ + optarg = old_optarg; } -+ + +/* Try to double the size of '*buf', return true + * if successful, and '*sizep' will be updated with + * the new size. Otherwise, return false. */ @@ -271,62 +256,87 @@ Last-Update: 2016-09-28 + return e; +} + + /* Parse the argument given in the command line of the application */ + static int + eal_parse_args(int argc, char **argv) +@@ -611,6 +737,26 @@ + internal_config.create_uio_dev = 1; + break; + ++ case OPT_VHOST_OWNER_NUM: ++ if (get_owners_from_str(optarg, &debian_vhost_sock_uid, ++ &debian_vhost_sock_gid)) { ++ RTE_LOG(ERR, EAL,"vhost-user socket unable to get" ++ " specified user/group: %s\n", optarg); ++ debian_vhost_sock_uid = (uid_t)-1; ++ debian_vhost_sock_gid = (gid_t)-1; ++ } ++ else { ++ RTE_LOG(INFO, EAL,"socket owner specified as %s (%d:%d)\n", ++ optarg, debian_vhost_sock_uid, debian_vhost_sock_gid); ++ } ++ break; ++ ++ case OPT_VHOST_PERM_NUM: ++ debian_vhost_sock_perm = (mode_t)strtoul(optarg, NULL, 0); ++ RTE_LOG(INFO, EAL,"socket perm specified as '%#o' from '%s'\n", ++ debian_vhost_sock_perm, optarg); ++ break; ++ + default: + if (opt < OPT_LONG_MIN_NUM && isprint(opt)) { + RTE_LOG(ERR, EAL, "Option %c is not supported " +@@ -943,3 +1089,47 @@ + /* Module has been found */ + return 1; + } ++ +static void +vhost_set_permissions(const char *vhost_sock_location) +{ -+ unsigned long int mode = strtoul(internal_config.vhost_sock_perm, NULL, 0); -+ int err = chmod(vhost_sock_location, (mode_t)mode); ++ int err = chmod(vhost_sock_location, debian_vhost_sock_perm); + if (err) { + RTE_LOG(ERR, EAL,"vhost-user socket cannot set" -+ " permissions to %s (%s).\n", -+ internal_config.vhost_sock_perm, strerror(err)); ++ " permissions to %#o (%s).\n", ++ debian_vhost_sock_perm, strerror(err)); + return; + } + RTE_LOG(INFO, EAL,"Socket %s changed permissions" -+ " to %s\n", vhost_sock_location, -+ internal_config.vhost_sock_perm); ++ " to %#o\n", vhost_sock_location, ++ debian_vhost_sock_perm); +} + +static void +vhost_set_ownership(const char *vhost_sock_location) +{ -+ uid_t vhuid=0; -+ gid_t vhgid=0; -+ -+ if (get_owners_from_str(internal_config.vhost_sock_owner, &vhuid, &vhgid)) { -+ RTE_LOG(ERR, EAL,"vhost-user socket unable to get" -+ " specified user/group: %s\n", -+ internal_config.vhost_sock_owner); -+ return; -+ } -+ -+ int err = chown(vhost_sock_location, vhuid, vhgid); ++ int err = chown(vhost_sock_location, debian_vhost_sock_uid, debian_vhost_sock_gid); + if (err) { + RTE_LOG(ERR, EAL,"vhost-user socket unable to set" -+ " ownership to %s (%s).\n", -+ internal_config.vhost_sock_owner, strerror(err)); ++ " ownership to %d:%d (%s).\n", ++ debian_vhost_sock_uid, debian_vhost_sock_gid, ++ strerror(err)); + return; + } + + RTE_LOG(INFO, EAL,"Socket %s changed ownership" -+ " to %s.\n", vhost_sock_location, -+ internal_config.vhost_sock_owner); ++ " to %d:%d.\n", vhost_sock_location, ++ debian_vhost_sock_uid, debian_vhost_sock_gid); +} + +void +rte_eal_set_socket_permissions(const char *path) +{ -+ if (internal_config.vhost_sock_perm) { ++ if (debian_vhost_sock_perm != 0) { + vhost_set_permissions(path); + } + -+ if (internal_config.vhost_sock_owner) { ++ if (debian_vhost_sock_uid != (uid_t)-1 || debian_vhost_sock_gid != (gid_t)-1) { + vhost_set_ownership(path); + } +} --- a/lib/librte_eal/linuxapp/eal/rte_eal_version.map +++ b/lib/librte_eal/linuxapp/eal/rte_eal_version.map -@@ -120,6 +120,7 @@ +@@ -139,6 +139,7 @@ rte_keepalive_register_core; rte_xen_dom0_supported; rte_xen_mem_phy2mch; @@ -336,7 +346,7 @@ Last-Update: 2016-09-28 --- a/lib/librte_vhost/socket.c +++ b/lib/librte_vhost/socket.c -@@ -98,6 +98,8 @@ +@@ -78,6 +78,8 @@ pthread_mutex_t mutex; }; @@ -345,11 +355,11 @@ Last-Update: 2016-09-28 #define MAX_VIRTIO_BACKLOG 128 static void vhost_user_server_new_connection(int fd, void *data, int *remove); -@@ -645,6 +647,7 @@ +@@ -519,6 +521,7 @@ vsocket->is_server = true; + ret = vhost_user_create_server(vsocket); } - ret = create_unix_socket(vsocket); -+ rte_eal_set_socket_permissions(path); ++ rte_eal_set_socket_permissions(path); if (ret < 0) { free(vsocket->path); free(vsocket); diff --git a/debian/patches/kni-fix-ethtool-build-with-kernel-4.11.patch b/debian/patches/kni-fix-ethtool-build-with-kernel-4.11.patch new file mode 100644 index 00000000..cd8c21be --- /dev/null +++ b/debian/patches/kni-fix-ethtool-build-with-kernel-4.11.patch @@ -0,0 +1,65 @@ +From 9fb3cd2c041eeca30b6c46e5d555d857d6096ae7 Mon Sep 17 00:00:00 2001 +From: Ferruh Yigit <ferruh.yigit@intel.com> +Date: Wed, 3 May 2017 17:00:16 +0100 +Subject: [PATCH] kni: fix ethtool build with kernel 4.11 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +build error: +.../lib/librte_eal/linuxapp/kni/igb_main.c:1034:10: +error: implicit declaration of function ‘pci_enable_msix’ + err = pci_enable_msix(pdev, + ^~~~~~~~~~~~~~~ + +This build error observed when CONFIG_RTE_KNI_KMOD_ETHTOOL config option +enabled. + +Following Linux commit removes the pci_enable_msix() +Linux: 4244de1c64de ("PCI: remove pci_enable_msix") + +Switch to pci_enable_msix_range() for kernel > 4.8 since current Linux +igb driver uses this function. + +Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> +Acked-by: Nicolas Dichtel <nicolas.dichtel@6wind.com> +--- + lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c | 7 +++++++ + lib/librte_eal/linuxapp/kni/ethtool/igb/kcompat.h | 4 ++++ + 2 files changed, 11 insertions(+) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=9fb3cd2c041eeca30b6c46e5d555d857d6096ae7 +Original-Author: Ferruh Yigit <ferruh.yigit@intel.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691830 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-19 + +--- a/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c ++++ b/lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c +@@ -1031,8 +1031,15 @@ + for (i = 0; i < numvecs; i++) + adapter->msix_entries[i].entry = i; + ++#ifdef HAVE_PCI_ENABLE_MSIX + err = pci_enable_msix(pdev, + adapter->msix_entries, numvecs); ++#else ++ err = pci_enable_msix_range(pdev, ++ adapter->msix_entries, ++ numvecs, ++ numvecs); ++#endif + if (err == 0) + break; + } +--- a/lib/librte_eal/linuxapp/kni/ethtool/igb/kcompat.h ++++ b/lib/librte_eal/linuxapp/kni/ethtool/igb/kcompat.h +@@ -3933,4 +3933,8 @@ + #define HAVE_VF_VLAN_PROTO + #endif /* >= 4.9.0 */ + ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0) ++#define HAVE_PCI_ENABLE_MSIX ++#endif ++ + #endif /* _KCOMPAT_H_ */ diff --git a/debian/patches/nicvf-0001-net-thunderx-check-data-offset-alignment-requirement.patch b/debian/patches/nicvf-0001-net-thunderx-check-data-offset-alignment-requirement.patch new file mode 100644 index 00000000..d5402b82 --- /dev/null +++ b/debian/patches/nicvf-0001-net-thunderx-check-data-offset-alignment-requirement.patch @@ -0,0 +1,58 @@ +From 34c2e7026fb30f6756d2c84d07d99c94106bb2ab Mon Sep 17 00:00:00 2001 +From: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Date: Mon, 13 Mar 2017 13:32:11 +0530 +Subject: [PATCH] net/thunderx: check data offset alignment requirement + +nicvf HW expects the DMA address of the packet data to be +aligned with cache line size. + +Packet data offset is a function of struct mbuf size, +mbuf private size and headroom. mbuf private size can +be changed from the application in pool creation, this +check detects HW alignment requirement constraint in pmd +start function. + +Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com> +--- + drivers/net/thunderx/nicvf_ethdev.c | 14 +++++++++++--- + 1 file changed, 11 insertions(+), 3 deletions(-) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=34c2e7026fb30f6756d2c84d07d99c94106bb2ab +Original-Author: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/drivers/net/thunderx/nicvf_ethdev.c ++++ b/drivers/net/thunderx/nicvf_ethdev.c +@@ -1407,7 +1407,7 @@ + nicvf_vf_start(struct rte_eth_dev *dev, struct nicvf *nic, uint32_t rbdrsz) + { + int ret; +- uint16_t qidx; ++ uint16_t qidx, data_off; + uint32_t total_rxq_desc, nb_rbdr_desc, exp_buffs; + uint64_t mbuf_phys_off = 0; + struct nicvf_rxq *rxq; +@@ -1448,10 +1448,18 @@ + nic->vf_id, qidx, rxq->pool->name); + return -ENOMEM; + } +- rxq->mbuf_phys_off -= nicvf_mbuff_meta_length(mbuf); +- rxq->mbuf_phys_off -= RTE_PKTMBUF_HEADROOM; ++ data_off = nicvf_mbuff_meta_length(mbuf); ++ data_off += RTE_PKTMBUF_HEADROOM; + rte_pktmbuf_free(mbuf); + ++ if (data_off % RTE_CACHE_LINE_SIZE) { ++ PMD_INIT_LOG(ERR, "%s: unaligned data_off=%d delta=%d", ++ rxq->pool->name, data_off, ++ data_off % RTE_CACHE_LINE_SIZE); ++ return -EINVAL; ++ } ++ rxq->mbuf_phys_off -= data_off; ++ + if (mbuf_phys_off == 0) + mbuf_phys_off = rxq->mbuf_phys_off; + if (mbuf_phys_off != rxq->mbuf_phys_off) { diff --git a/debian/patches/nicvf-0003-config-enable-thunderx-nicvf.patch b/debian/patches/nicvf-0003-config-enable-thunderx-nicvf.patch new file mode 100644 index 00000000..465dd491 --- /dev/null +++ b/debian/patches/nicvf-0003-config-enable-thunderx-nicvf.patch @@ -0,0 +1,62 @@ +From 0bc8874b3b2c2da74bb955ce2de2da7eb009a8bf Mon Sep 17 00:00:00 2001 +From: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Date: Sun, 19 Mar 2017 20:18:48 +0530 +Subject: [PATCH] config: enable thunderx nicvf + +Enable Thunderx nicvf PMD driver in the common +config as it does not have build dependency +with any external library and/or architecture. + +Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> +--- + config/common_base | 2 +- + config/defconfig_arm64-thunderx-linuxapp-gcc | 10 ---------- + doc/guides/nics/thunderx.rst | 3 +-- + 3 files changed, 2 insertions(+), 13 deletions(-) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=0bc8874b3b2c2da74bb955ce2de2da7eb009a8bf +Original-Author: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/config/common_base ++++ b/config/common_base +@@ -264,7 +264,7 @@ + # + # Compile burst-oriented Cavium Thunderx NICVF PMD driver + # +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n ++CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y + CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n + CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n + CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n +--- a/config/defconfig_arm64-thunderx-linuxapp-gcc ++++ b/config/defconfig_arm64-thunderx-linuxapp-gcc +@@ -36,13 +36,3 @@ + CONFIG_RTE_CACHE_LINE_SIZE=128 + CONFIG_RTE_MAX_NUMA_NODES=2 + CONFIG_RTE_MAX_LCORE=96 +- +-# +-# Compile Cavium Thunderx NICVF PMD driver +-# +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n +-CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n +--- a/doc/guides/nics/thunderx.rst ++++ b/doc/guides/nics/thunderx.rst +@@ -77,9 +77,8 @@ + The following options can be modified in the ``config`` file. + Please note that enabling debugging options may affect system performance. + +-- ``CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD`` (default ``n``) ++- ``CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD`` (default ``y``) + +- By default it is enabled only for defconfig_arm64-thunderx-* config. + Toggle compilation of the ``librte_pmd_thunderx_nicvf`` driver. + + - ``CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT`` (default ``n``) diff --git a/debian/patches/nicvf-0004-net-thunderx-sync-mailbox-definitions-with-Linux-PF-.patch b/debian/patches/nicvf-0004-net-thunderx-sync-mailbox-definitions-with-Linux-PF-.patch new file mode 100644 index 00000000..2ff3a2db --- /dev/null +++ b/debian/patches/nicvf-0004-net-thunderx-sync-mailbox-definitions-with-Linux-PF-.patch @@ -0,0 +1,80 @@ +From 2d5a4b62ff2d7b79ca937a5c88654deecf4aa986 Mon Sep 17 00:00:00 2001 +From: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Date: Mon, 20 Mar 2017 19:40:40 +0530 +Subject: [PATCH] net/thunderx: sync mailbox definitions with Linux PF driver + +- bgx_link_status mbox definition was changed in Linux +commit 1cc702591bae ("net: thunderx: Add ethtool support") +- NIC_MBOX_MSG_RES_BIT related changes were never part of Linux PF driver + +Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> +--- + drivers/net/thunderx/base/nicvf_mbox.c | 7 ++----- + drivers/net/thunderx/base/nicvf_mbox.h | 11 +++-------- + 2 files changed, 5 insertions(+), 13 deletions(-) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=2d5a4b62ff2d7b79ca937a5c88654deecf4aa986 +Original-Author: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/drivers/net/thunderx/base/nicvf_mbox.c ++++ b/drivers/net/thunderx/base/nicvf_mbox.c +@@ -62,9 +62,6 @@ + [NIC_MBOX_MSG_RESET_STAT_COUNTER] = "NIC_MBOX_MSG_RESET_STAT_COUNTER", + [NIC_MBOX_MSG_CFG_DONE] = "NIC_MBOX_MSG_CFG_DONE", + [NIC_MBOX_MSG_SHUTDOWN] = "NIC_MBOX_MSG_SHUTDOWN", +- [NIC_MBOX_MSG_RES_BIT] = "NIC_MBOX_MSG_RES_BIT", +- [NIC_MBOX_MSG_RSS_SIZE_RES_BIT] = "NIC_MBOX_MSG_RSS_SIZE", +- [NIC_MBOX_MSG_ALLOC_SQS_RES_BIT] = "NIC_MBOX_MSG_ALLOC_SQS", + }; + + static inline const char * __attribute__((unused)) +@@ -176,7 +173,7 @@ + case NIC_MBOX_MSG_NACK: + nic->pf_nacked = true; + break; +- case NIC_MBOX_MSG_RSS_SIZE_RES_BIT: ++ case NIC_MBOX_MSG_RSS_SIZE: + nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size; + nic->pf_acked = true; + break; +@@ -186,7 +183,7 @@ + nic->speed = mbx.link_status.speed; + nic->pf_acked = true; + break; +- case NIC_MBOX_MSG_ALLOC_SQS_RES_BIT: ++ case NIC_MBOX_MSG_ALLOC_SQS: + assert_primary(nic); + if (mbx.sqs_alloc.qs_count != nic->sqs_count) { + nicvf_log_error("Received %" PRIu8 "/%" PRIu8 +--- a/drivers/net/thunderx/base/nicvf_mbox.h ++++ b/drivers/net/thunderx/base/nicvf_mbox.h +@@ -68,16 +68,10 @@ + #define NIC_MBOX_MSG_ALLOC_SQS 0x12 /* Allocate secondary Qset */ + #define NIC_MBOX_MSG_LOOPBACK 0x16 /* Set interface in loopback */ + #define NIC_MBOX_MSG_RESET_STAT_COUNTER 0x17 /* Reset statistics counters */ +-#define NIC_MBOX_MSG_CFG_DONE 0x7E /* VF configuration done */ +-#define NIC_MBOX_MSG_SHUTDOWN 0x7F /* VF is being shutdown */ +-#define NIC_MBOX_MSG_RES_BIT 0x80 /* Reset bit from PF */ ++#define NIC_MBOX_MSG_CFG_DONE 0xF0 /* VF configuration done */ ++#define NIC_MBOX_MSG_SHUTDOWN 0xF1 /* VF is being shutdown */ + #define NIC_MBOX_MSG_MAX 0x100 /* Maximum number of messages */ + +-#define NIC_MBOX_MSG_RSS_SIZE_RES_BIT \ +- (NIC_MBOX_MSG_RSS_SIZE | NIC_MBOX_MSG_RES_BIT) +-#define NIC_MBOX_MSG_ALLOC_SQS_RES_BIT \ +- (NIC_MBOX_MSG_ALLOC_SQS | NIC_MBOX_MSG_RES_BIT) +- + /* Get vNIC VF configuration */ + struct nic_cfg_msg { + uint8_t msg; +@@ -157,6 +151,7 @@ + /* Physical interface link status */ + struct bgx_link_status { + uint8_t msg; ++ uint8_t mac_type; + uint8_t link_up; + uint8_t duplex; + uint32_t speed; diff --git a/debian/patches/nicvf-0005-net-thunderx-wait-to-complete-during-link-update.patch b/debian/patches/nicvf-0005-net-thunderx-wait-to-complete-during-link-update.patch new file mode 100644 index 00000000..32937a1c --- /dev/null +++ b/debian/patches/nicvf-0005-net-thunderx-wait-to-complete-during-link-update.patch @@ -0,0 +1,59 @@ +From 0cca56708d781b42561e382fcbcb1f1647b932b9 Mon Sep 17 00:00:00 2001 +From: Andriy Berestovskyy <andriy.berestovskyy@caviumnetworks.com> +Date: Fri, 31 Mar 2017 15:57:49 +0200 +Subject: [PATCH] net/thunderx: wait to complete during link update + +Some DPDK applications/examples check link status on their +start. NICVF does not wait for the link, so those apps fail. + +Wait up to 9 seconds for the link as other PMDs do in order +to fix those apps/examples. + +Signed-off-by: Andriy Berestovskyy <andriy.berestovskyy@caviumnetworks.com> +Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> +--- + drivers/net/thunderx/nicvf_ethdev.c | 21 +++++++++++++++++---- + 1 file changed, 17 insertions(+), 4 deletions(-) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=0cca56708d781b42561e382fcbcb1f1647b932b9 +Original-Author: Andriy Berestovskyy <andriy.berestovskyy@caviumnetworks.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/drivers/net/thunderx/nicvf_ethdev.c ++++ b/drivers/net/thunderx/nicvf_ethdev.c +@@ -145,16 +145,29 @@ + * Return 0 means link status changed, -1 means not changed + */ + static int +-nicvf_dev_link_update(struct rte_eth_dev *dev, +- int wait_to_complete __rte_unused) ++nicvf_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete) + { ++#define CHECK_INTERVAL 100 /* 100ms */ ++#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */ + struct rte_eth_link link; + struct nicvf *nic = nicvf_pmd_priv(dev); ++ int i; + + PMD_INIT_FUNC_TRACE(); + +- memset(&link, 0, sizeof(link)); +- nicvf_set_eth_link_status(nic, &link); ++ if (wait_to_complete) { ++ /* rte_eth_link_get() might need to wait up to 9 seconds */ ++ for (i = 0; i < MAX_CHECK_TIME; i++) { ++ memset(&link, 0, sizeof(link)); ++ nicvf_set_eth_link_status(nic, &link); ++ if (link.link_status) ++ break; ++ rte_delay_ms(CHECK_INTERVAL); ++ } ++ } else { ++ memset(&link, 0, sizeof(link)); ++ nicvf_set_eth_link_status(nic, &link); ++ } + return nicvf_atomic_write_link_status(dev, &link); + } + diff --git a/debian/patches/nicvf-0007-net-thunderx-disable-PMD-for-old-compilers.patch b/debian/patches/nicvf-0007-net-thunderx-disable-PMD-for-old-compilers.patch new file mode 100644 index 00000000..61590496 --- /dev/null +++ b/debian/patches/nicvf-0007-net-thunderx-disable-PMD-for-old-compilers.patch @@ -0,0 +1,80 @@ +From 0b9ce550c4f60a69da558da6044e1b394256b43c Mon Sep 17 00:00:00 2001 +From: Ferruh Yigit <ferruh.yigit@intel.com> +Date: Thu, 6 Apr 2017 18:05:09 +0100 +Subject: [PATCH] net/thunderx: disable PMD for old compilers + +Disable for gcc < 4.7 and icc <= 14.0 + +PMD uses some compiler builtins and new compiler options. Tested with +gcc 4.5.1 and following were not supported: + +option: +-Ofast + +macros: +_Static_assert + +__ORDER_LITTLE_ENDIAN__ +__ORDER_BIG_ENDIAN__ +__BYTE_ORDER__ + +__atomic_fetch_add +__ATOMIC_ACQUIRE +__atomic_load_n +__ATOMIC_RELAXED +__atomic_store_n +__ATOMIC_RELEASE + +It is not easy to fix all in PMD, disabling PMD for older compilers. + +Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> +--- + drivers/net/Makefile | 5 +++++ + mk/toolchain/gcc/rte.toolchain-compat.mk | 5 +++++ + mk/toolchain/icc/rte.toolchain-compat.mk | 5 +++++ + 3 files changed, 15 insertions(+) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=0b9ce550c4f60a69da558da6044e1b394256b43c +Original-Author: Ferruh Yigit <ferruh.yigit@intel.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/drivers/net/Makefile ++++ b/drivers/net/Makefile +@@ -31,6 +31,11 @@ + + include $(RTE_SDK)/mk/rte.vars.mk + ++# set in mk/toolchain/xxx/rte.toolchain-compat.mk ++ifeq ($(CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD),d) ++ $(warning thunderx pmd is not supported by old compilers) ++endif ++ + DIRS-$(CONFIG_RTE_LIBRTE_PMD_AF_PACKET) += af_packet + DIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x + DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding +--- a/mk/toolchain/gcc/rte.toolchain-compat.mk ++++ b/mk/toolchain/gcc/rte.toolchain-compat.mk +@@ -89,4 +89,9 @@ + ifeq ($(shell test $(GCC_VERSION) -lt 42 && echo 1), 1) + MACHINE_CFLAGS := $(filter-out -march% -mtune% -msse%,$(MACHINE_CFLAGS)) + endif ++ ++ # Disable thunderx PMD for gcc < 4.7 ++ ifeq ($(shell test $(GCC_VERSION) -lt 47 && echo 1), 1) ++ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=d ++ endif + endif +--- a/mk/toolchain/icc/rte.toolchain-compat.mk ++++ b/mk/toolchain/icc/rte.toolchain-compat.mk +@@ -72,4 +72,9 @@ + # remove march options + MACHINE_CFLAGS := $(patsubst -march=%,-xSSE3,$(MACHINE_CFLAGS)) + endif ++ ++ # Disable thunderx PMD for icc <= 14.0 ++ ifeq ($(shell test $(ICC_MAJOR_VERSION) -le 14 && echo 1), 1) ++ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=d ++ endif + endif diff --git a/debian/patches/nicvf-0009-config-set-cache-line-as-128B-for-generic-arm64.patch b/debian/patches/nicvf-0009-config-set-cache-line-as-128B-for-generic-arm64.patch new file mode 100644 index 00000000..95e02d03 --- /dev/null +++ b/debian/patches/nicvf-0009-config-set-cache-line-as-128B-for-generic-arm64.patch @@ -0,0 +1,65 @@ +From 852572d5db26d1d7d9021648740d9f2e0c4503c1 Mon Sep 17 00:00:00 2001 +From: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Date: Wed, 26 Apr 2017 21:59:19 +0530 +Subject: [PATCH] config: set cache line as 128B for generic arm64 + +armv8 implementations may have 64B or 128B cache line. +Setting to the maximum available cache line size in generic config to +address minimum DMA alignment across all arm64 implementations. + +Increasing the cacheline size has no negative impact to cache invalidation +on systems with a smaller cache line. + +The need for the minimum DMA alignment has impact on functional aspects +of the platform so default config should cater the functional aspects. + +There is an impact on memory usage with this scheme, but that's not too +important for the single image arm64 distribution use case. + +The arm64 linux kernel followed the similar approach for single +arm64 image use case. +http://lxr.free-electrons.com/source/arch/arm64/include/asm/cache.h + +Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Acked-by: Jianbo Liu <jianbo.liu@linaro.org> +Acked-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> +--- + config/defconfig_arm64-armv8a-linuxapp-gcc | 5 +++++ + config/defconfig_arm64-dpaa2-linuxapp-gcc | 1 + + config/defconfig_arm64-xgene1-linuxapp-gcc | 1 + + 3 files changed, 7 insertions(+) + +Origin: http://dpdk.org/browse/dpdk/commit/?id=852572d5db26d1d7d9021648740d9f2e0c4503c1 +Original-Author: Jerin Jacob <jerin.jacob@caviumnetworks.com> +Bug-Ubuntu: https://bugs.launchpad.net/ubuntu/+source/dpdk/+bug/1691659 +Author: Christian Ehrhardt <christian.ehrhardt@canonical.com> +Last-Update: 2017-05-18 + +--- a/config/defconfig_arm64-armv8a-linuxapp-gcc ++++ b/config/defconfig_arm64-armv8a-linuxapp-gcc +@@ -42,6 +42,11 @@ + CONFIG_RTE_TOOLCHAIN="gcc" + CONFIG_RTE_TOOLCHAIN_GCC=y + ++# Maximum available cache line size in arm64 implementations. ++# Setting to maximum available cache line size in generic config ++# to address minimum DMA alignment across all arm64 implementations. ++CONFIG_RTE_CACHE_LINE_SIZE=128 ++ + CONFIG_RTE_EAL_IGB_UIO=n + + CONFIG_RTE_LIBRTE_FM10K_PMD=n +--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc ++++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc +@@ -40,3 +40,4 @@ + # + CONFIG_RTE_MAX_LCORE=8 + CONFIG_RTE_MAX_NUMA_NODES=1 ++CONFIG_RTE_CACHE_LINE_SIZE=64 +--- a/config/defconfig_arm64-xgene1-linuxapp-gcc ++++ b/config/defconfig_arm64-xgene1-linuxapp-gcc +@@ -32,3 +32,4 @@ + #include "defconfig_arm64-armv8a-linuxapp-gcc" + + CONFIG_RTE_MACHINE="xgene1" ++CONFIG_RTE_CACHE_LINE_SIZE=64 diff --git a/debian/patches/series b/debian/patches/series index 6921ee07..a104d100 100644 --- a/debian/patches/series +++ b/debian/patches/series @@ -1,3 +1,11 @@ fix-vhost-user-socket-permission.patch fix-power-default-config.patch - +dpdk-dev-v3-eal-sPAPR-IOMMU-support-in-pci-probing-for-vfio-pci-in-ppc64le.patch +dpdk-dev-v4-i40e-implement-vector-PMD-for-altivec.patch +nicvf-0001-net-thunderx-check-data-offset-alignment-requirement.patch +nicvf-0003-config-enable-thunderx-nicvf.patch +nicvf-0004-net-thunderx-sync-mailbox-definitions-with-Linux-PF-.patch +nicvf-0005-net-thunderx-wait-to-complete-during-link-update.patch +nicvf-0007-net-thunderx-disable-PMD-for-old-compilers.patch +nicvf-0009-config-set-cache-line-as-128B-for-generic-arm64.patch +kni-fix-ethtool-build-with-kernel-4.11.patch |