From e4df4d55df003957fc5afd7440e3d3192d7ce218 Mon Sep 17 00:00:00 2001 From: Christian Ehrhardt Date: Mon, 18 Jun 2018 13:36:41 +0200 Subject: New upstream version 17.11.3 Change-Id: I2b901aaf362a2b94195665cc890d824b2c3a620e Signed-off-by: Christian Ehrhardt --- lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h') diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h index 6993dd29..3a80311b 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h @@ -55,7 +55,7 @@ extern "C" { * Guarantees that the LOAD and STORE operations generated before the * barrier occur before the LOAD and STORE operations generated after. */ -#define rte_mb() {asm volatile("sync" : : : "memory"); } +#define rte_mb() asm volatile("sync" : : : "memory") /** * Write memory barrier. -- cgit 1.2.3-korg