From 8d53e9f3c6001dcb2865f6e894da5b54e1418f88 Mon Sep 17 00:00:00 2001 From: Christian Ehrhardt Date: Thu, 4 Jul 2019 10:40:06 +0200 Subject: New upstream version 18.11.2 Change-Id: I23eb4f9179abf1f9c659891f8fddb27ee68ad26b Signed-off-by: Christian Ehrhardt --- lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'lib/librte_eal/common/include/arch') diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h index ce38350b..797381c0 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h @@ -63,11 +63,7 @@ extern "C" { * Guarantees that the STORE operations generated before the barrier * occur before the STORE operations generated after. */ -#ifdef RTE_ARCH_64 -#define rte_wmb() asm volatile("lwsync" : : : "memory") -#else #define rte_wmb() asm volatile("sync" : : : "memory") -#endif /** * Read memory barrier. @@ -75,11 +71,7 @@ extern "C" { * Guarantees that the LOAD operations generated before the barrier * occur before the LOAD operations generated after. */ -#ifdef RTE_ARCH_64 -#define rte_rmb() asm volatile("lwsync" : : : "memory") -#else #define rte_rmb() asm volatile("sync" : : : "memory") -#endif #define rte_smp_mb() rte_mb() -- cgit 1.2.3-korg