/* * decap.c: vxlan tunnel decap packet processing * * Copyright (c) 2013 Cisco and/or its affiliates. * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. * You may obtain a copy of the License at: * * http://www.apache.org/licenses/LICENSE-2.0 * * Unless required by applicable law or agreed to in writing, software * distributed under the License is distributed on an "AS IS" BASIS, * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. * See the License for the specific language governing permissions and * limitations under the License. */ #include #include #include #ifndef CLIB_MARCH_VARIANT vlib_node_registration_t vxlan4_input_node; vlib_node_registration_t vxlan6_input_node; #endif typedef struct { u32 next_index; u32 tunnel_index; u32 error; u32 vni; } vxlan_rx_trace_t; static u8 * format_vxlan_rx_trace (u8 * s, va_list * args) { CLIB_UNUSED (vlib_main_t * vm) = va_arg (*args, vlib_main_t *); CLIB_UNUSED (vlib_node_t * node) = va_arg (*args, vlib_node_t *); vxlan_rx_trace_t *t = va_arg (*args, vxlan_rx_trace_t *); if (t->tunnel_index == ~0) return format (s, "VXLAN decap error - tunnel for vni %d does not exist", t->vni); return format (s, "VXLAN decap from vxlan_tunnel%d vni %d next %d error %d", t->tunnel_index, t->vni, t->next_index, t->error); } always_inline u32 buf_fib_index (vlib_buffer_t * b, u32 is_ip4) { u32 sw_if_index = vnet_buffer (b)->sw_if_index[VLIB_TX]; if (sw_if_index != (u32) ~ 0) return sw_if_index; u32 *fib_index_by_sw_if_index = is_ip4 ? ip4_main.fib_index_by_sw_if_index : ip6_main.fib_index_by_sw_if_index; sw_if_index = vnet_buffer (b)->sw_if_index[VLIB_RX]; return vec_elt (fib_index_by_sw_if_index, sw_if_index); } typedef vxlan4_tunnel_key_t last_tunnel_cache4; static const vxlan_decap_info_t decap_not_found = { .sw_if_index = ~0, .next_index = VXLAN_INPUT_NEXT_DROP, .error = VXLAN_ERROR_NO_SUCH_TUNNEL }; static const vxlan_decap_info_t decap_bad_flags = { .sw_if_index = ~0, .next_index = VXLAN_INPUT_NEXT_DROP, .error = VXLAN_ERROR_BAD_FLAGS }; always_inline vxlan_decap_info_t vxlan4_find_tunnel (vxlan_main_t * vxm, last_tunnel_cache4 * cache, u32 fib_index, ip4_header_t * ip4_0, vxlan_header_t * vxlan0, u32 * stats_sw_if_index) { if (PREDICT_FALSE (vxlan0->flags != VXLAN_FLAGS_I)) return decap_bad_flags; /* Make sure VXLAN tunnel exist according to packet S/D IP, VRF, and VNI */ u32 dst = ip4_0->dst_address.as_u32; u32 src = ip4_0->src_address.as_u32; vxlan4_tunnel_key_t key4 = { .key[0] = ((u64) dst << 32) | src, .key[1] = ((u64) fib_index << 32) | vxlan0->vni_reserved, }; if (PREDICT_TRUE (key4.key[0] == cache->key[0] && key4.key[1] == cache->key[1])) { /* cache hit */ vxlan_decap_info_t di = {.as_u64 = cache->value }; *stats_sw_if_index = di.sw_if_index; return di; } int rv = clib_bihash_search_inline_16_8 (&vxm->vxlan4_tunnel_by_key, &key4); if (PREDICT_TRUE (rv == 0)) { *cache = key4; vxlan_decap_info_t di = {.as_u64 = key4.value }; *stats_sw_if_index = di.sw_if_index; return di; } /* try multicast */ if (PREDICT_TRUE (!ip4_address_is_multicast (&ip4_0->dst_address))) return decap_not_found; /* search for mcast decap info by mcast address */ key4.key[0] = dst; rv = clib_bihash_search_inline_16_8 (&vxm->vxlan4_tunnel_by_key, &key4); if (rv != 0) return decap_not_found; /* search for unicast tunnel using the mcast tunnel local(src) ip */ vxlan_decap_info_t mdi = {.as_u64 = key4.value }; key4.key[0] = ((u64) mdi.local_ip.as_u32 << 32) | src; rv = clib_bihash_search_inline_16_8 (&vxm->vxlan4_tunnel_by_key, &key4); if (PREDICT_FALSE (rv != 0)) return decap_not_found; /* mcast traffic does not update the cache */ *stats_sw_if_index = mdi.sw_if_index; vxlan_decap_info_t di = {.as_u64 = key4.value }; return di; } typedef vxlan6_tunnel_key_t last_tunnel_cache6; always_inline vxlan_decap_info_t vxlan6_find_tunnel (vxlan_main_t * vxm, last_tunnel_cache6 * cache, u32 fib_index, ip6_header_t * ip6_0, vxlan_header_t * vxlan0, u32 * stats_sw_if_index) { if (PREDICT_FALSE (vxlan0->flags != VXLAN_FLAGS_I)) return decap_bad_flags; /* Make sure VXLAN tunnel exist according to packet SIP and VNI */ vxlan6_tunnel_key_t key6 = { .key[0] = ip6_0->src_address.as_u64[0], .key[1] = ip6_0->src_address.as_u64[1], .key[2] = (((u64) fib_index) << 32) | vxlan0->vni_reserved, }; if (PREDICT_FALSE (clib_bihash_key_compare_24_8 (key6.key, cache->key) == 0)) { int rv = clib_bihash_search_inline_24_8 (&vxm->vxlan6_tunnel_by_key, &key6); if (PREDICT_FALSE (rv != 0)) return decap_not_found; *cache = key6; } vxlan_tunnel_t *t0 = pool_elt_at_index (vxm->tunnels, cache->value); /* Validate VXLAN tunnel SIP against packet DIP */ if (PREDICT_TRUE (ip6_address_is_equal (&ip6_0->dst_address, &t0->src.ip6))) *stats_sw_if_index = t0->sw_if_index; else { /* try multicast */ if (PREDICT_TRUE (!ip6_address_is_multicast (&ip6_0->dst_address))) return decap_not_found; /* Make sure mcast VXLAN tunnel exist by packet DIP and VNI */ key6.key[0] = ip6_0->dst_address.as_u64[0]; key6.key[1] = ip6_0->dst_address.as_u64[1]; int rv = clib_bihash_search_inline_24_8 (&vxm->vxlan6_tunnel_by_key, &key6); if (PREDICT_FALSE (rv != 0)) return decap_not_found; vxlan_tunnel_t *mcast_t0 = pool_elt_at_index (vxm->tunnels, key6.value); *stats_sw_if_index = mcast_t0->sw_if_index; } vxlan_decap_info_t di = { .sw_if_index = t0->sw_if_index, .next_index = t0->decap_next_index, }; return di; } always_inline uword vxlan_input (vlib_main_t * vm, vlib_node_runtime_t * node, vlib_frame_t * from_frame, u32 is_ip4) { vxlan_main_t *vxm = &vxlan_main; vnet_main_t *vnm = vxm->vnet_main; vnet_interface_main_t *im = &vnm->interface_main; vlib_combined_counter_main_t *rx_counter = im->combined_sw_if_counters + VNET_INTERFACE_COUNTER_RX; last_tunnel_cache4 last4; last_tunnel_cache6 last6; u32 pkts_dropped = 0; u32 thread_index = vlib_get_thread_index (); if (is_ip4) clib_memset (&last4, 0xff, sizeof last4); else clib_memset (&last6, 0xff, sizeof last6); u32 *from = vlib_frame_vector_args (from_frame); u32 n_left_from = from_frame->n_vectors; vlib_buffer_t *bufs[VLIB_FRAME_SIZE], **b = bufs; vlib_get_buffers (vm, from, bufs, n_left_from); u32 stats_if0 = ~0, stats_if1 = ~0; u16 nexts[VLIB_FRAME_SIZE], *next = nexts; while (n_left_from >= 4) { /* Prefetch next iteration. */ vlib_prefetch_buffer_header (b[2], LOAD); vlib_prefetch_buffer_header (b[3], LOAD); /* udp leaves current_data pointing at the vxlan header */ void *cur0 = vlib_buffer_get_current (b[0]); void *cur1 = vlib_buffer_get_current (b[1]); vxlan_header_t *vxlan0 = cur0; vxlan_header_t *vxlan1 = cur1; ip4_header_t *ip4_0, *ip4_1; ip6_header_t *ip6_0, *ip6_1; if (is_ip4) { ip4_0 = cur0 - sizeof (udp_header_t) - sizeof (ip4_header_t); ip4_1 = cur1 - sizeof (udp_header_t) - sizeof (ip4_header_t); } else { ip6_0 = cur0 - sizeof (udp_header_t) - sizeof (ip6_header_t); ip6_1 = cur1 - sizeof (udp_header_t) - sizeof (ip6_header_t); } /* pop vxlan */ vlib_buffer_advance (b[0], sizeof *vxlan0); vlib_buffer_advance (b[1], sizeof *vxlan1); u32 fi0 = buf_fib_index (b[0], is_ip4); u32 fi1 = buf_fib_index (b[1], is_ip4); vxlan_decap_info_t di0 = is_ip4 ? vxlan4_find_tunnel (vxm, &last4, fi0, ip4_0, vxlan0, &stats_if0) : vxlan6_find_tunnel (vxm, &last6, fi0, ip6_0, vxlan0, &stats_if0); vxlan_decap_info_t di1 = is_ip4 ? vxlan4_find_tunnel (vxm, &last4, fi1, ip4_1, vxlan1, &stats_if1) : vxlan6_find_tunnel (vxm, &last6, fi1, ip6_1, vxlan1, &stats_if1); /* Prefetch next iteration. */ CLIB_PREFETCH (b[2]->data, CLIB_CACHE_LINE_BYTES, LOAD); CLIB_PREFETCH (b[3]->data, CLIB_CACHE_LINE_BYTES, LOAD); u32 len0 = vlib_buffer_length_in_chain (vm, b[0]); u32 len1 = vlib_buffer_length_in_chain (vm, b[1]); next[0] = di0.next_index; next[1] = di1.next_index; u8 any_error = di0.error | di1.error; if (PREDICT_TRUE (any_error == 0)) { /* Required to make the l2 tag push / pop code work on l2 subifs */ vnet_update_l2_len (b[0]); vnet_update_l2_len (b[1]); /* Set packet input sw_if_index to unicast VXLAN tunnel for learning */ vnet_buffer (b[0])->sw_if_index[VLIB_RX] = di0.sw_if_index; vnet_buffer (b[1])->sw_if_index[VLIB_RX] = di1.sw_if_index; vlib_increment_combined_counter (rx_counter, thread_index, stats_if0, 1, len0); vlib_increment_combined_counter (rx_counter, thread_index, stats_if1, 1, len1); } else { if (di0.error == 0) { vnet_update_l2_len (b[0]); vnet_buffer (b[0])->sw_if_index[VLIB_RX] = di0.sw_if_index; vlib_increment_combined_counter (rx_counter, thread_index, stats_if0, 1, len0); } else { b[0]->error = node->errors[di0.error]; pkts_dropped++; } if (di1.error == 0) { vnet_update_l2_len (b[1]); vnet_buffer (b[1])->sw_if_index[VLIB_RX] = di1.sw_if_index; vlib_increment_combined_counter (rx_counter, thread_index, stats_if1, 1, len1); } else { b[1]->error = node->errors[di1.error]; pkts_dropped++; } } if (PREDICT_FALSE (b[0]->flags & VLIB_BUFFER_IS_TRACED)) { vxlan_rx_trace_t *tr = vlib_add_trace (vm, node, b[0], sizeof (*tr)); tr->next_index = next[0]; tr->error = di0.error; tr->tunnel_index = di0.sw_if_index == ~0 ? ~0 : vxm->tunnel_index_by_sw_if_index[di0.sw_if_index]; tr->vni = vnet_get_vni (vxlan0); } if (PREDICT_FALSE (b[1]->flags & VLIB_BUFFER_IS_TRACED)) { vxlan_rx_trace_t *tr = vlib_add_trace (vm, node, b[1], sizeof (*tr)); tr->next_index = next[1]; tr->error = di1.error; tr->tunnel_index = di1.sw_if_index == ~0 ? ~0 : vxm->tunnel_index_by_sw_if_index[di1.sw_if_index]; tr->vni = vnet_get_vni (vxlan1); } b += 2; next += 2; n_left_from -= 2; } while (n_left_from > 0) { /* udp leaves current_data pointing at the vxlan header */ void *cur0 = vlib_buffer_get_current (b[0]); vxlan_header_t *vxlan0 = cur0; ip4_header_t *ip4_0; ip6_header_t *ip6_0; if (is_ip4) ip4_0 = cur0 - sizeof (udp_header_t) - sizeof (ip4_header_t); else ip6_0 = cur0 - sizeof (udp_header_t) - sizeof (ip6_header_t); /* pop (ip, udp, vxlan) */ vlib_buffer_advance (b[0], sizeof (*vxlan0)); u32 fi0 = buf_fib_index (b[0], is_ip4); vxlan_decap_info_t di0 = is_ip4 ? vxlan4_find_tunnel (vxm, &last4, fi0, ip4_0, vxlan0, &stats_if0) : vxlan6_find_tunnel (vxm, &last6, fi0, ip6_0, vxlan0, &stats_if0); uword len0 = vlib_buffer_length_in_chain (vm, b[0]); next[0] = di0.next_index; /* Validate VXLAN tunnel encap-fib index against packet */ if (di0.error == 0) { /* Required to make the l2 tag push / pop code work on l2 subifs */ vnet_update_l2_len (b[0]); /* Set packet input sw_if_index to unicast VXLAN tunnel for learning */ vnet_buffer (b[0])->sw_if_index[VLIB_RX] = di0.sw_if_index; vlib_increment_combined_counter (rx_counter, thread_index, stats_if0, 1, len0); } else { b[0]->error = node->errors[di0.error]; pkts_dropped++; } if (PREDICT_FALSE (b[0]->flags & VLIB_BUFFER_IS_TRACED)) { vxlan_rx_trace_t *tr = vlib_add_trace (vm, node, b[0], sizeof (*tr)); tr->next_index = next[0]; tr->error = di0.error; tr->tunnel_index = di0.sw_if_index == ~0 ? ~0 : vxm->tunnel_index_by_sw_if_index[di0.sw_if_index]; tr->vni = vnet_get_vni (vxlan0); } b += 1; next += 1; n_left_from -= 1; } vlib_buffer_enqueue_to_next (vm, node, from, nexts, from_frame->n_vectors); /* Do we still need this now that tunnel tx stats is kept? */ u32 node_idx = is_ip4 ? vxlan4_input_node.index : vxlan6_input_node.index; vlib_node_increment_counter (vm, node_idx, VXLAN_ERROR_DECAPSULATED, from_frame->n_vectors - pkts_dropped); return from_frame->n_vectors; } VLIB_NODE_FN (vxlan4_input_node) (vlib_main_t * vm, vlib_node_runtime_t * node, vlib_frame_t * from_frame) { return vxlan_input (vm, node, from_frame, /* is_ip4 */ 1); } VLIB_NODE_FN (vxlan6_input_node) (vlib_main_t * vm, vlib_node_runtime_t * node, vlib_
/*-
* BSD LICENSE
*
* Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of copyright holder nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/

#ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
#define DPDK_ENA_COM_ENA_PLAT_DPDK_H_

#include <stdbool.h>
#include <stdlib.h>
#include <pthread.h>
#include <stdint.h>
#include <string.h>
#include <errno.h>

#include <rte_atomic.h>
#include <rte_branch_prediction.h>
#include <rte_cycles.h>
#include <rte_log.h>
#include <rte_malloc.h>
#include <rte_memzone.h>
#include <rte_spinlock.h>

#include <sys/time.h>

typedef uint64_t u64;
typedef uint32_t u32;
typedef uint16_t u16;
typedef uint8_t u8;

typedef uint64_t dma_addr_t;
#ifndef ETIME
#define ETIME ETIMEDOUT
#endif

#define ena_atomic32_t rte_atomic32_t
#define ena_mem_handle_t const struct rte_memzone *

#define SZ_256 (256U)
#define SZ_4K (4096U)

#define ENA_COM_OK	0
#define ENA_COM_NO_MEM	-ENOMEM
#define ENA_COM_INVAL	-EINVAL
#define ENA_COM_NO_SPACE	-ENOSPC
#define ENA_COM_NO_DEVICE	-ENODEV
#define ENA_COM_PERMISSION	-EPERM
#define ENA_COM_TIMER_EXPIRED	-ETIME
#define ENA_COM_FAULT	-EFAULT
#define ENA_COM_TRY_AGAIN	-EAGAIN

#define ____cacheline_aligned __rte_cache_aligned

#define ENA_ABORT() abort()

#define ENA_MSLEEP(x) rte_delay_ms(x)
#define ENA_UDELAY(x) rte_delay_us(x)

#define ENA_TOUCH(x) ((void)(x))
#define memcpy_toio memcpy
#define wmb rte_wmb
#define rmb rte_wmb
#define mb rte_mb
#define __iomem

#define US_PER_S 1000000
#define ENA_GET_SYSTEM_USECS()						\
	(rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())

#if RTE_LOG_LEVEL >= RTE_LOG_DEBUG
#define ENA_ASSERT(cond, format, arg...)				\
	do {								\
		if (unlikely(!(cond))) {				\
			RTE_LOG(ERR, PMD, format, ##arg);		\
			rte_panic("line %d\tassert \"" #cond "\""	\
					"failed\n", __LINE__);		\
		}							\
	} while (0)
#else
#define ENA_ASSERT(cond, format, arg...) do {} while (0)
#endif

#define ENA_MAX32(x, y) RTE_MAX((x), (y))
#define ENA_MAX16(x, y) RTE_MAX((x), (y))
#define ENA_MAX8(x, y) RTE_MAX((x), (y))
#define ENA_MIN32(x, y) RTE_MIN((x), (y))
#define ENA_MIN16(x, y) RTE_MIN((x), (y))
#define ENA_MIN8(x, y) RTE_MIN((x), (y))

#define U64_C(x) x ## ULL
#define BIT(nr)         (1UL << (nr))
#define BITS_PER_LONG	(__SIZEOF_LONG__ * 8)
#define GENMASK(h, l)	(((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
#define GENMASK_ULL(h, l) (((U64_C(1) << ((h) - (l) + 1)) - 1) << (l))

#ifdef RTE_LIBRTE_ENA_COM_DEBUG
#define ena_trc_dbg(format, arg...)					\
	RTE_LOG(DEBUG, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
#define ena_trc_info(format, arg...)					\
	RTE_LOG(INFO, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
#define ena_trc_warn(format, arg...)					\
	RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
#define ena_trc_err(format, arg...)					\
	RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
#else
#define ena_trc_dbg(format, arg...) do { } while (0)
#define ena_trc_info(format, arg...) do { } while (0)
#define ena_trc_warn(format, arg...) do { } while (0)
#define ena_trc_err(format, arg...) do { } while (0)
#endif /* RTE_LIBRTE_ENA_COM_DEBUG */

/* Spinlock related methods */
#define ena_spinlock_t rte_spinlock_t
#define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
#define ENA_SPINLOCK_LOCK(spinlock, flags)				\
	({(void)flags; rte_spinlock_lock(&spinlock); })
#define ENA_SPINLOCK_UNLOCK(spinlock, flags)				\
	({(void)flags; rte_spinlock_unlock(&(spinlock)); })

#define q_waitqueue_t			\
	struct {			\
		pthread_cond_t cond;	\
		pthread_mutex_t mutex;	\
	}

#define ena_wait_queue_t q_waitqueue_t

#define ENA_WAIT_EVENT_INIT(waitqueue)					\
	do {								\
		pthread_mutex_init(&(waitqueue).mutex, NULL);		\
		pthread_cond_init(&(waitqueue).cond, NULL);		\
	} while (0)

#define ENA_WAIT_EVENT_WAIT(waitevent, timeout)				\
	do {								\
		struct timespec wait;					\
		struct timeval now;					\
		unsigned long timeout_us;				\
		gettimeofday(&now, NULL);				\
		wait.tv_sec = now.tv_sec + timeout / 1000000UL;		\
		timeout_us = timeout % 1000000UL;			\
		wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;	\
		pthread_mutex_lock(&waitevent.mutex);			\
		pthread_cond_timedwait(&waitevent.cond,			\
				&waitevent.mutex, &wait);		\
		pthread_mutex_unlock(&waitevent.mutex);			\
	} while (0)
#define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
/* pthread condition doesn't need to be rearmed after usage */
#define ENA_WAIT_EVENT_CLEAR(...)

#define ena_wait_event_t ena_wait_queue_t
#define ENA_MIGHT_SLEEP()

#define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle)	\
	do {								\
		const struct rte_memzone *mz;				\
		char z_name[RTE_MEMZONE_NAMESIZE];			\
		ENA_TOUCH(dmadev); ENA_TOUCH(handle);			\
		snprintf(z_name, sizeof(z_name),			\
				"ena_alloc_%d", ena_alloc_cnt++);	\
		mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY, 0); \
		memset(mz->addr, 0, size);				\
		virt = mz->addr;					\
		phys = mz->phys_addr;					\
		handle = mz;						\
	} while (0)
#define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle) 	\
		({ ENA_TOUCH(size); ENA_TOUCH(phys);			\
		   ENA_TOUCH(dmadev);					\
		   rte_memzone_free(handle); })

#define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, node, dev_node) \
	do {								\
		const struct rte_memzone *mz;				\
		char z_name[RTE_MEMZONE_NAMESIZE];			\
		ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);			\
		snprintf(z_name, sizeof(z_name),			\
				"ena_alloc_%d", ena_alloc_cnt++);	\
		mz = rte_memzone_reserve(z_name, size, node, 0); \
		virt = mz->addr;					\
		phys = mz->phys_addr;					\
	} while (0)

#define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
	do {								\
		const struct rte_memzone *mz;				\
		char z_name[RTE_MEMZONE_NAMESIZE];			\
		ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);			\
		snprintf(z_name, sizeof(z_name),			\
				"ena_alloc_%d", ena_alloc_cnt++);	\
		mz = rte_memzone_reserve(z_name, size, node, 0); \
		virt = mz->addr;					\
	} while (0)

#define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
#define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); })

static inline void writel(u32 value, volatile void  *addr)
{
	*(volatile u32 *)addr = value;
}

static inline u32 readl(const volatile void *addr)
{
	return *(const volatile u32 *)addr;
}

#define ENA_REG_WRITE32(value, reg) writel((value), (reg))
#define ENA_REG_READ32(reg) readl((reg))

#define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
#define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
#define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
#define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)

#define msleep(x) rte_delay_us(x * 1000)
#define udelay(x) rte_delay_us(x)

#define MAX_ERRNO       4095
#define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
#define ERR_PTR(error) ((void *)(long)error)
#define PTR_ERR(error) ((long)(void *)error)
#define might_sleep()

#endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */