From 3931530bce5529e141f0fb10d6c72981aa0d97e6 Mon Sep 17 00:00:00 2001
From: Hanoh Haim <hhaim@cisco.com>
Date: Thu, 18 Feb 2016 16:10:30 +0200
Subject: add python profile for new write_mask command

---
 .../trex_stl_lib/trex_stl_packet_builder_scapy.py  | 47 ++++++++++++++++++++++
 1 file changed, 47 insertions(+)

(limited to 'scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py')

diff --git a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
index c788e277..95c32b2f 100644
--- a/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
+++ b/scripts/automation/trex_control_plane/stl/trex_stl_lib/trex_stl_packet_builder_scapy.py
@@ -234,6 +234,22 @@ class CTRexVmInsWrFlowVar(CTRexVmInsBase):
         self.is_big_endian = is_big_endian
         assert type(is_big_endian)==bool, 'type of is_big_endian is not bool'
 
+class CTRexVmInsWrMaskFlowVar(CTRexVmInsBase):
+    def __init__(self, fv_name, pkt_offset,pkt_cast_size,mask,shift, is_big_endian=True):
+        super(CTRexVmInsWrMaskFlowVar, self).__init__("write_mask_flow_var")
+        self.name = fv_name
+        assert type(fv_name)==str, 'type of fv_name is not str'
+        self.pkt_offset = pkt_offset
+        assert type(pkt_offset)==int, 'type of pkt_offset is not int'
+        self.pkt_cast_size = pkt_cast_size
+        assert type(pkt_cast_size)==int, 'type of pkt_cast_size is not int'
+        self.mask = mask
+        assert type(mask)==int, 'type of mask is not int'
+        self.shift = shift
+        assert type(shift)==int, 'type of shift is not int'
+        self.is_big_endian = is_big_endian
+        assert type(is_big_endian)==bool, 'type of is_big_endian is not bool'
+
 class CTRexVmInsTrimPktSize(CTRexVmInsBase):
     def __init__(self,fv_name):
         super(CTRexVmInsTrimPktSize, self).__init__("trim_pkt_size")
@@ -562,6 +578,37 @@ class CTRexVmDescWrFlowVar(CTRexVmDescBase):
             t=parent._name_to_offset(self.pkt_offset)
             self.pkt_offset = t[0]
 
+class CTRexVmDescWrMaskFlowVar(CTRexVmDescBase):
+    def __init__(self, fv_name, pkt_offset, pkt_cast_size=1, mask=0xff, shift=0, offset_fixup=0, is_big=True):
+        super(CTRexVmDescWrMaskFlowVar, self).__init__()
+        self.name =fv_name
+        assert type(fv_name)==str, 'type of fv_name is not str'
+        self.offset_fixup =offset_fixup
+        assert type(offset_fixup)==int, 'type of offset_fixup is not int'
+        self.pkt_offset =pkt_offset
+        self.pkt_cast_size =pkt_cast_size
+        assert type(pkt_cast_size)==int,'type of pkt_cast_size is not int'
+        if not (pkt_cast_size in [1,2,4]):
+            raise CTRexPacketBuildException(-10,"not valid cast size");
+
+        self.mask = mask
+        assert type(mask)==int,'type of mask is not int'
+        self.shift = shift
+        assert type(shift)==int,'type of shift is not int'
+        self.is_big =is_big;
+        assert type(is_big)==bool,'type of is_big_endian is not bool'
+
+    def get_var_ref (self):
+        return self.name
+
+    def get_obj (self):
+            return  CTRexVmInsWrMaskFlowVar(self.name,self.pkt_offset+self.offset_fixup,self.pkt_cast_size,self.mask,self.shift,self.is_big)
+
+    def compile(self,parent): 
+        if type(self.pkt_offset)==str:
+            t=parent._name_to_offset(self.pkt_offset)
+            self.pkt_offset = t[0]
+
 
 class CTRexVmDescTrimPktSize(CTRexVmDescBase):
     def __init__(self,fv_name):
-- 
cgit 1.2.3-korg