From 030c124495335da372a5bb4f537365cce3def3af Mon Sep 17 00:00:00 2001 From: Hanoh Haim Date: Mon, 23 Jan 2017 14:57:29 +0200 Subject: fix trex-333 Signed-off-by: Hanoh Haim --- .../regression/stateful_tests/trex_imix_test.py | 7 ----- .../regression/stateless_tests/stl_rx_test.py | 34 +++++++++++++++++----- 2 files changed, 26 insertions(+), 15 deletions(-) (limited to 'scripts') diff --git a/scripts/automation/regression/stateful_tests/trex_imix_test.py b/scripts/automation/regression/stateful_tests/trex_imix_test.py index dc7eea0b..4cb01db3 100755 --- a/scripts/automation/regression/stateful_tests/trex_imix_test.py +++ b/scripts/automation/regression/stateful_tests/trex_imix_test.py @@ -121,11 +121,6 @@ class CTRexIMIX_Test(CTRexGeneral_Test): mult = self.get_benchmark_param('multiplier') core = self.get_benchmark_param('cores') - - # in case of VMXNET3 the number of bytes reported is 60 bytes for 64B - if self.is_VM: - self.trex.result_obj.set_warmup (0.89) - # trex_res = self.trex.run(multiplier = mult, cores = core, duration = 30, l = 1000, p = True) ret = self.trex.start_trex( c = core, @@ -146,8 +141,6 @@ class CTRexIMIX_Test(CTRexGeneral_Test): self.check_general_scenario_results(trex_res) self.check_CPU_benchmark(trex_res) - if self.is_VM: - self.trex.result_obj.set_warmup_default() # the name intentionally not matches nose default pattern, including the test should be specified explicitly diff --git a/scripts/automation/regression/stateless_tests/stl_rx_test.py b/scripts/automation/regression/stateless_tests/stl_rx_test.py index 8812ac48..a3efa01d 100644 --- a/scripts/automation/regression/stateless_tests/stl_rx_test.py +++ b/scripts/automation/regression/stateless_tests/stl_rx_test.py @@ -526,19 +526,37 @@ class STLRX_Test(CStlGeneral_Test): except STLError as e: assert False , '{0}'.format(e) + def _run_fcs_stream (self,is_vm): + """ this test send 1 64 byte packet with latency and check that all counters are reported as 64 bytes""" + res=True + try: + all_ports=list(CTRexScenario.stl_ports_map['map'].keys()); + for port in all_ports: + for l in [True,False]: + print(" test port {0} latency : {1} ".format(port,l)) + self.send_1_burst(port,l,100) + except Exception as e: + if is_vm : + res=False + else: + raise e + return(res); + + def test_fcs_stream(self): """ this test send 1 64 byte packet with latency and check that all counters are reported as 64 bytes""" - if self.is_virt_nics: - self.skip('Skip this for virtual NICs') - - all_ports=list(CTRexScenario.stl_ports_map['map'].keys()); - for port in all_ports: - for l in [True,False]: - print(" test port {0} latency : {1} ".format(port,l)) - self.send_1_burst(port,l,100) + is_vm=self.is_virt_nics # in case of VM and vSwitch there are drop of packets in some cases, let retry number of times + # in this case we just want to check functionality that packet of 64 is reported as 64 in all levels + retry=1 + if is_vm: + retry=4 + for i in range(0,retry): + if self._run_fcs_stream (is_vm): + break; + print("==> retry %d .." %(i)); # this test adds more and more latency streams and re-test with incremental -- cgit 1.2.3-korg