diff options
author | 2025-01-14 07:18:32 +0530 | |
---|---|---|
committer | 2025-01-15 13:21:52 +0000 | |
commit | d023a7e2625a79770b9888292c56be085e69efbf (patch) | |
tree | bcb5858ac27a228939cc991607304103b0339687 | |
parent | 5a4c869742d9dac35e285a53c80aa151b8857dde (diff) |
octeon: update octeon roc version
Type: feature
Change-Id: I9f3044aec29a611d4735001ff1943772b7035711
Signed-off-by: Monendra Singh Kushwaha <kmonendra@marvell.com>
-rw-r--r-- | build/external/packages/octeon-roc.mk | 4 | ||||
-rw-r--r-- | src/plugins/dev_octeon/init.c | 9 |
2 files changed, 7 insertions, 6 deletions
diff --git a/build/external/packages/octeon-roc.mk b/build/external/packages/octeon-roc.mk index 3d902171652..0dade11ccc8 100644 --- a/build/external/packages/octeon-roc.mk +++ b/build/external/packages/octeon-roc.mk @@ -2,9 +2,9 @@ # SPDX-License-Identifier: Apache-2.0 # https://spdx.org/licenses/Apache-2.0.html -octeon-roc_version := 0.5 +octeon-roc_version := 0.6 octeon-roc_tarball := v$(octeon-roc_version).tar.gz -octeon-roc_tarball_sha256sum := 030fc0f58d761525bf8814ed9d95f5ce999541b19bd75eb123dee90c9e2c52a0 +octeon-roc_tarball_sha256sum := 5018e6da80c80898444b648482b4240cbf62591c64eb463b3f681cf68c07239c octeon-roc_tarball_strip_dirs := 1 octeon-roc_url := https://github.com/MarvellEmbeddedProcessors/marvell-octeon-roc/archive/refs/tags/$(octeon-roc_tarball) diff --git a/src/plugins/dev_octeon/init.c b/src/plugins/dev_octeon/init.c index 99cadddfc24..4f39b227bd3 100644 --- a/src/plugins/dev_octeon/init.c +++ b/src/plugins/dev_octeon/init.c @@ -211,12 +211,12 @@ oct_conf_cpt (vlib_main_t *vm, vnet_dev_t *dev, oct_crypto_dev_t *ocd, log_err (dev, "Could not add CPT IE engines"); return cnx_return_roc_err (dev, rrv, "roc_cpt_eng_grp_add"); } - if (roc_cpt->eng_grp[CPT_ENG_TYPE_IE] != ROC_CPT_DFLT_ENG_GRP_SE_IE) + if (roc_cpt->eng_grp[CPT_ENG_TYPE_IE] != ROC_LEGACY_CPT_DFLT_ENG_GRP_SE_IE) { log_err (dev, "Invalid CPT IE engine group configuration"); return -1; } - if (roc_cpt->eng_grp[CPT_ENG_TYPE_SE] != ROC_CPT_DFLT_ENG_GRP_SE) + if (roc_cpt->eng_grp[CPT_ENG_TYPE_SE] != ROC_LEGACY_CPT_DFLT_ENG_GRP_SE) { log_err (dev, "Invalid CPT SE engine group configuration"); return -1; @@ -248,7 +248,7 @@ oct_conf_cpt_queue (vlib_main_t *vm, vnet_dev_t *dev, oct_crypto_dev_t *ocd) roc_cpt_iq_enable (cpt_lf); - if ((rrv = roc_cpt_lmtline_init (roc_cpt, cpt_lmtline, 0) < 0)) + if ((rrv = roc_cpt_lmtline_init (roc_cpt, cpt_lmtline, 0, false) < 0)) return cnx_return_roc_err (dev, rrv, "roc_cpt_lmtline_init"); return 0; @@ -344,8 +344,9 @@ oct_init (vlib_main_t *vm, vnet_dev_t *dev) return rv; } + STATIC_ASSERT (sizeof (cd->plt_pci_dev.name) == sizeof (dev->device_id), ""); strncpy ((char *) cd->plt_pci_dev.name, dev->device_id, - sizeof (cd->plt_pci_dev.name) - 1); + sizeof (dev->device_id)); switch (cd->type) { |