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authorJieqiang Wang <jieqiang.wang@arm.com>2022-09-19 23:33:21 +0800
committerBeno�t Ganne <bganne@cisco.com>2022-10-25 15:18:21 +0000
commit186798270acb7e7c4159af982bb3f3dd5d9f50d0 (patch)
tree523bc3177fa6b951a10dc1c078fe37bb4b003214 /src/plugins/gtpu
parentbf93670c515da131f36809091c13d3a0638fff2a (diff)
rdma: set correct CQE flags
CQE flags located in bits 16-31 at offset 0x1c should be defined as actual numbers instead of indexes. Besides, L3 header type for IPv4 is 10(2 in decimal) and for IPv6 is 01(1 in decimal) according to CQE entry fields description of page 120 in Mellanox Programmer Reference Manual. (https://network.nvidia.com/files/doc-2020/ethernet-adapters-programming-manual.pdf) Fixing this issue will lead to correct CQE flags printing for rdma-input node when buffer trace is enabled. Type: fix Signed-off-by: Jieqiang Wang <jieqiang.wang@arm.com> Change-Id: I9b578ca5cbd8cd93a577aa83131e31c79f60430e
Diffstat (limited to 'src/plugins/gtpu')
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