diff options
author | Ray Kinsella <mdr@ashroe.eu> | 2021-10-06 15:21:33 +0000 |
---|---|---|
committer | Damjan Marion <dmarion@me.com> | 2021-10-07 13:23:06 +0000 |
commit | 12ba95bff55362b17acddac0b9063d9109ec0646 (patch) | |
tree | 57d0317ba5a25180dab2678e5fc67b9604368e34 /src/plugins/perfmon/intel/bundle | |
parent | ce45b161566e2ece499426cbd937086b4b780a0d (diff) |
perfmon: Topdown Level 1 support on Snowridge
Enable Topdown Level 1 support on Snowridge,
enabled with standard CPU events on small core.
Type: improvement
Signed-off-by: Ray Kinsella <mdr@ashroe.eu>
Change-Id: I58ad09383de7464265ac1b69e683f253591e3b5e
Diffstat (limited to 'src/plugins/perfmon/intel/bundle')
-rw-r--r-- | src/plugins/perfmon/intel/bundle/topdown_tremont.c | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/src/plugins/perfmon/intel/bundle/topdown_tremont.c b/src/plugins/perfmon/intel/bundle/topdown_tremont.c new file mode 100644 index 00000000000..b2626eb0480 --- /dev/null +++ b/src/plugins/perfmon/intel/bundle/topdown_tremont.c @@ -0,0 +1,85 @@ +/* + * Copyright (c) 2021 Intel and/or its affiliates. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <vnet/vnet.h> +#include <perfmon/perfmon.h> +#include <perfmon/intel/core.h> + +typedef enum +{ + TOPDOWN_E_RETIRING = 0, + TOPDOWN_E_BAD_SPEC, + TOPDOWN_E_FE_BOUND, + TOPDOWN_E_BE_BOUND, + TOPDOWN_E_MAX, +} topdown_lvl1_t; + +static u8 * +format_topdown_lvl1 (u8 *s, va_list *args) +{ + perfmon_reading_t *ss = va_arg (*args, perfmon_reading_t *); + u64 idx = va_arg (*args, int); + f64 sv = 0; + u64 total = 0; + + for (int i = 0; i < TOPDOWN_E_MAX; i++) + total += ss->value[i]; + + switch (idx) + { + case 0: + sv = (f64) ss->value[TOPDOWN_E_RETIRING] + ss->value[TOPDOWN_E_BAD_SPEC]; + break; + case 1: + sv = (f64) ss->value[TOPDOWN_E_FE_BOUND] + ss->value[TOPDOWN_E_BE_BOUND]; + break; + default: + sv = (f64) ss->value[idx - 2]; + break; + } + + sv = (sv / total) * 100; + s = format (s, "%f", sv); + return s; +} + +static int +is_tremont () +{ + return clib_cpu_supports_movdir64b () && !clib_cpu_supports_avx2 (); +} + +static perfmon_cpu_supports_t topdown_lvl1_cpu_supports[] = { + { is_tremont, PERFMON_BUNDLE_TYPE_THREAD } +}; + +PERFMON_REGISTER_BUNDLE (topdown_lvl1_tremont) = { + .name = "topdown-level1", + .description = "Top-down Microarchitecture Analysis Level 1", + .source = "intel-core", + .events[0] = INTEL_CORE_E_TOPDOWN_L1_RETIRING_TREMONT, + .events[1] = INTEL_CORE_E_TOPDOWN_L1_BAD_SPEC_TREMONT, + .events[2] = INTEL_CORE_E_TOPDOWN_L1_FE_BOUND_TREMONT, + .events[3] = INTEL_CORE_E_TOPDOWN_L1_BE_BOUND_TREMONT, + .n_events = 4, + .cpu_supports = topdown_lvl1_cpu_supports, + .n_cpu_supports = ARRAY_LEN (topdown_lvl1_cpu_supports), + .format_fn = format_topdown_lvl1, + .column_headers = PERFMON_STRINGS ("% NS", "% ST", "% NS.RT", "% NS.BS", + "% ST.FE", "% ST.BE"), + .footer = "Not Stalled (NS),STalled (ST),\n" + " Retiring (RT), Bad Speculation (BS),\n" + " FrontEnd bound (FE), BackEnd bound (BE)", +}; |