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| author |   Nitin Saxena <nsaxena@marvell.com> | 2019-03-28 14:42:31 +0530 |
|---|---|---|
| committer |   Andrew Yourtchenko <ayourtch@gmail.com> | 2019-09-21 09:49:18 +0000 |
| commit | 0dda2a37babda8bcc45a7f180513f92aa2da729e (patch) | |
| tree | c8f2ba66033a518e584e16c562781ff60675c776 /src/vppinfra/vector.c | |
| parent | c51d2afbb1d5c3b97a899e6841cffbffde118f9e (diff) | |
vppinfra: Update "show cpu" output for AArch64 chips
- Allow "Microarch model(family)" row to show PASS
revison as either string (like A0, B0) or number (like
1.0, 2.0).
- Fix part number for Marvell CN96XX
Type: refactor
Change-Id: Ie01a3960c4e5e481be354dc8bb60f744e5c65737
Signed-off-by: Nitin Saxena <nsaxena@marvell.com>
(cherry picked from commit c9122f97398b11f8be0256901a0cbd83dc3b6511)
Diffstat (limited to 'src/vppinfra/vector.c')
0 files changed, 0 insertions, 0 deletions