diff options
Diffstat (limited to 'src/plugins/perfmon/intel/bundle')
| -rw-r--r-- | src/plugins/perfmon/intel/bundle/inst_and_clock.c | 63 | ||||
| -rw-r--r-- | src/plugins/perfmon/intel/bundle/load_blocks.c | 66 | ||||
| -rw-r--r-- | src/plugins/perfmon/intel/bundle/mem_bw.c | 64 |
3 files changed, 193 insertions, 0 deletions
diff --git a/src/plugins/perfmon/intel/bundle/inst_and_clock.c b/src/plugins/perfmon/intel/bundle/inst_and_clock.c new file mode 100644 index 00000000000..e08d21a3fa5 --- /dev/null +++ b/src/plugins/perfmon/intel/bundle/inst_and_clock.c @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2020 Cisco and/or its affiliates. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <vnet/vnet.h> +#include <perfmon/perfmon.h> +#include <perfmon/intel/core.h> + +static u8 * +format_inst_and_clock (u8 *s, va_list *args) +{ + perfmon_node_stats_t *ns = va_arg (*args, perfmon_node_stats_t *); + int row = va_arg (*args, int); + + switch (row) + { + case 0: + s = format (s, "%lu", ns->n_calls); + break; + case 1: + s = format (s, "%lu", ns->n_packets); + break; + case 2: + s = format (s, "%.2f", (f64) ns->n_packets / ns->n_calls); + break; + case 3: + s = format (s, "%.2f", (f64) ns->value[1] / ns->n_packets); + break; + case 4: + s = format (s, "%.2f", (f64) ns->value[0] / ns->n_packets); + break; + case 5: + s = format (s, "%.2f", (f64) ns->value[0] / ns->value[1]); + break; + } + return s; +} + +PERFMON_REGISTER_BUNDLE (inst_and_clock) = { + .name = "inst-and-clock", + .description = "instructions/packet, cycles/packet and IPC", + .source = "intel-core", + .type = PERFMON_BUNDLE_TYPE_NODE, + .events[0] = INTEL_CORE_E_INST_RETIRED_ANY_P, + .events[1] = INTEL_CORE_E_CPU_CLK_UNHALTED_THREAD_P, + .events[2] = INTEL_CORE_E_CPU_CLK_UNHALTED_REF_TSC, + .n_events = 3, + .format_fn = format_inst_and_clock, + .column_headers = PERFMON_STRINGS ("Calls", "Packets", "Packets/Call", + "Clocks/Packet", "Instructions/Packet", + "IPC"), +}; diff --git a/src/plugins/perfmon/intel/bundle/load_blocks.c b/src/plugins/perfmon/intel/bundle/load_blocks.c new file mode 100644 index 00000000000..d02ef3a0555 --- /dev/null +++ b/src/plugins/perfmon/intel/bundle/load_blocks.c @@ -0,0 +1,66 @@ +/* + * Copyright (c) 2020 Cisco and/or its affiliates. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <vnet/vnet.h> +#include <perfmon/perfmon.h> +#include <perfmon/intel/core.h> + +static u8 * +format_load_blocks (u8 *s, va_list *args) +{ + perfmon_node_stats_t *ns = va_arg (*args, perfmon_node_stats_t *); + int row = va_arg (*args, int); + + switch (row) + { + case 0: + s = format (s, "%12lu", ns->n_calls); + break; + case 1: + s = format (s, "%12lu", ns->n_packets); + break; + case 2: + s = format (s, "%9.2f", (f64) ns->value[0] / ns->n_calls); + break; + case 3: + s = format (s, "%9.2f", (f64) ns->value[1] / ns->n_calls); + break; + case 4: + s = format (s, "%9.2f", (f64) ns->value[2] / ns->n_calls); + break; + } + return s; +} + +PERFMON_REGISTER_BUNDLE (load_blocks) = { + .name = "load-blocks", + .description = "load operations blocked due to various uarch reasons", + .source = "intel-core", + .type = PERFMON_BUNDLE_TYPE_NODE, + .events[0] = INTEL_CORE_E_LD_BLOCKS_STORE_FORWARD, + .events[1] = INTEL_CORE_E_LD_BLOCKS_NO_SR, + .events[2] = INTEL_CORE_E_LD_BLOCKS_PARTIAL_ADDRESS_ALIAS, + .n_events = 3, + .format_fn = format_load_blocks, + .column_headers = PERFMON_STRINGS ("Calls", "Packets", "[1]", "[2]", "[3]"), + .footer = "Per node call statistics:\n" + "[1] Loads blocked due to overlapping with a preceding store that " + "cannot be forwarded.\n" + "[2] The number of times that split load operations are " + "temporarily blocked because\n" + " all resources for handling the split accesses are in use\n" + "[3] False dependencies in Memory Order Buffer (MOB) due to " + "partial compare on address.\n", +}; diff --git a/src/plugins/perfmon/intel/bundle/mem_bw.c b/src/plugins/perfmon/intel/bundle/mem_bw.c new file mode 100644 index 00000000000..672dbb0677d --- /dev/null +++ b/src/plugins/perfmon/intel/bundle/mem_bw.c @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2020 Cisco and/or its affiliates. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include <vnet/vnet.h> +#include <vppinfra/linux/sysfs.h> +#include <perfmon/perfmon.h> +#include <perfmon/intel/uncore.h> + +static u8 * +format_intel_uncore_imc_bw (u8 *s, va_list *args) +{ + perfmon_reading_t *r = va_arg (*args, perfmon_reading_t *); + int col = va_arg (*args, int); + f64 tr = r->time_running * 1e-9; + + switch (col) + { + case 0: + s = format (s, "%9.2f", tr); + break; + case 1: + if (r->time_running) + s = format (s, "%9.2f", (f64) r->value[0] * 64 * 1e-6 / tr); + break; + case 2: + if (r->time_running) + s = format (s, "%9.2f", (f64) r->value[1] * 64 * 1e-6 / tr); + break; + case 3: + if (r->time_running) + s = format (s, "%9.2f", + (f64) (r->value[0] + r->value[1]) * 64 * 1e-6 / tr); + break; + default: + break; + } + + return s; +} + +PERFMON_REGISTER_BUNDLE (intel_uncore_imc_bw) = { + .name = "memory-bandwidth", + .description = "memory reads and writes per memory controller channel", + .source = "intel-uncore", + .type = PERFMON_BUNDLE_TYPE_SYSTEM, + .events[0] = INTEL_UNCORE_E_IMC_UNC_M_CAS_COUNT_RD, + .events[1] = INTEL_UNCORE_E_IMC_UNC_M_CAS_COUNT_WR, + .n_events = 2, + .format_fn = format_intel_uncore_imc_bw, + .column_headers = PERFMON_STRINGS ("RunTime", "Reads (MB/s)", + "Writes (MB/s)", "Total (MB/s)"), +}; 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