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path: root/src/vnet/dpo
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2021-10-03mpls: Save the L3 header offset in the meta-data before label impositionNeale Ranns1-1/+9
2021-08-10ip: Use the IP4 lookup functionsNeale Ranns1-48/+3
2021-07-15misc: replace CLIB_PREFETCH with clib_prefetch_{load,store}Damjan Marion1-4/+4
2021-07-13misc: fix init order to avoid startup warningsBin Zhou (bzhou2)1-3/+0
2021-05-01vlib: refactor trajectory trace debug featureBenoît Ganne1-2/+0
2021-02-15ip: Path MTUNeale Ranns4-0/+79
2020-12-14misc: move to new pool_foreach macrosDamjan Marion4-12/+12
2020-11-26fib: Expressive type for walk return code. Honour code.Neale Ranns1-2/+2
2020-11-26fib: DPO layout add u64 parameter.Neale Ranns2-19/+29
2020-10-28misc: Break the big IP header files to improve compile timeNeale Ranns3-3/+3
2020-10-08l2: input performanceNeale Ranns1-1/+2
2020-06-07fib: fix multiple dpo pool expand casesDave Barach6-7/+76
2020-06-04fib: add barrier sync, pool/vector expand casesDave Barach1-1/+25
2020-05-06docs: clean up make docs jobPaul Vinciguerra1-2/+2
2020-04-11fib: fix accessing empty dpo pool elementsShivaShankarK2-2/+8
2020-02-17misc: fix coverity warningsDave Barach1-2/+2
2020-01-10docs: Edit FEATURE.yaml files so they can be publishedJohn DeNisco1-1/+1
2020-01-03fib: Add dpo FEATURE.yaml fileNeale Ranns1-0/+15
2019-10-09mpls: support fragmentation of mpls output packetRajesh Goel1-0/+18
2019-09-25fib: fix some typos in fib/mtrieLijian.Zhang4-4/+4
2019-08-29ip: remove unused function parameterSimon Zhang1-3/+3
2019-08-15vlib: copy trace_handle in vlib_buffer_copy/clone() functionsJohn Lo1-4/+1
2019-07-24fib: Support the POP of a Psuedo Wire Control WordNeale Ranns4-0/+399
2019-06-26fib: default flow hash config for each DPO protocol typeNeale Ranns2-0/+23
2019-06-18fib: fib api updatesNeale Ranns1-7/+23
2019-06-06DVR: Control the reinject as L2 or L3 based on the output interface typeNeale Ranns2-10/+83
2019-05-16init / exit function orderingDave Barach1-4/+9
2019-04-08fixing typosJim Thompson1-1/+1
2019-03-28Typos. A bunch of typos I've been collecting.Paul Vinciguerra2-6/+6
2019-03-11dpo: migrate old MULTIARCH macros to VLIB_NODE_FNFilip Tehlar5-157/+51
2019-02-14Add -fno-common compile optionBenoît Ganne6-4/+8
2018-12-18MFIB: recurse resolution through an MFIB entryNeale Ranns4-0/+113
2018-12-16IP6-MFIB: replace the radix tree with bihash (VPP-1526)Neale Ranns1-3/+3
2018-11-14Remove c-11 memcpy checks from perf-critical codeDave Barach2-3/+3
2018-11-02vlib: define minimum chained buffer segment sizeDamjan Marion1-1/+2
2018-10-23c11 safe string handling supportDave Barach8-8/+8
2018-10-16FIB: use vlib-log for debuggingNeale Ranns3-33/+39
2018-10-16Sticky Load-balanceNeale Ranns2-24/+130
2018-10-08replicate trace fixNeale Ranns1-2/+6
2018-10-01mroute routers in the stats segmentNeale Ranns1-1/+6
2018-09-20Route counters in the stats segmentNeale Ranns1-1/+10
2018-09-14BIER API and load-balancing fixesNeale Ranns1-2/+2
2018-08-30SR-MPLS: fixes and testsNeale Ranns1-1/+1
2018-08-22show command for lookup DPOsNeale Ranns1-0/+40
2018-08-03loop counter to prevent infiinte number of look ups per-packetNeale Ranns1-1/+84
2018-07-19Remove unused argument to vlib_feature_nextDamjan Marion1-6/+3
2018-07-11avoid using thread local storage for thread indexDamjan Marion1-1/+1
2018-06-26node functions cannot be always_inlineDamjan Marion1-10/+10
2018-05-26Fix interface-rx-dpo-l2 node to setup l2_len in vnet bufferJohn Lo1-4/+16
2018-05-04Harmonize vec/pool_get_aligned object sizes and alignment requestsDave Barach9-0/+53
class="o">=u"00:aa:aa:00:00:00", dst=u"00:bb:bb:00:00:00" )/ IP( src=u"10.0.0.2", dst=u"10.0.0.1", proto=61 ) ) # Direction 1 --> 0 base_pkt_b = ( Ether()/ Dot1Q( vlan=200 ) / IP( src=u"172.27.0.2", dst=u"172.26.0.1" )/ UDP( sport=1024, dport=4789 )/ VXLAN( vni=0 )/ Ether( src=u"00:bb:bb:00:00:00", dst=u"00:aa:aa:00:00:00" )/ IP( src=u"10.0.0.1", dst=u"10.0.0.2", proto=61 ) ) # Direction 0 --> 1 vm1 = STLScVmRaw( [ STLVmFlowVar( name=u"nf_id", size=1, op=u"inc", min_value=0, max_value=self.nf_chains - 1 ), STLVmFlowVar( name=u"in_mac", size=2, op=u"inc", min_value=0, max_value=255 ), STLVmFlowVar( name=u"in_ip", size=1, op=u"inc", min_value=0, max_value=255 ), STLVmFlowVar( name=u"src_port", size=2, op=u"random", min_value=1024, max_value=65535 ), STLVmWrFlowVar( fv_name=u"nf_id", pkt_offset=32 ), STLVmWrFlowVar( fv_name=u"src_port", pkt_offset=u"UDP.sport" ), STLVmWrFlowVar( fv_name=u"nf_id", pkt_offset=52 ), STLVmWrFlowVar( fv_name=u"in_mac", pkt_offset=58 ), STLVmWrFlowVar( fv_name=u"in_mac", pkt_offset=64 ), STLVmWrFlowVar( fv_name=u"in_ip", pkt_offset=82 ), STLVmWrFlowVar( fv_name=u"in_ip", pkt_offset=86 ), STLVmFixChecksumHw( l3_offset="IP:{}".format(0), l4_offset="UDP:{}".format(0), l4_type=CTRexVmInsFixHwCs.L4_TYPE_UDP ) ] ) # Direction 1 --> 0 vm2 = STLScVmRaw( [ STLVmFlowVar( name=u"nf_id", size=1, op=u"inc", min_value=0, max_value=self.nf_chains - 1 ), STLVmFlowVar( name=u"in_mac", size=2, op=u"inc", min_value=0, max_value=255 ), STLVmFlowVar( name=u"in_ip", size=1, op=u"inc", min_value=0, max_value=255 ), STLVmFlowVar( name=u"src_port", size=2, op=u"random", min_value=1024, max_value=65535 ), STLVmWrFlowVar( fv_name=u"nf_id", pkt_offset=32 ), STLVmWrFlowVar( fv_name=u"src_port", pkt_offset=u"UDP.sport" ), STLVmWrFlowVar( fv_name=u"nf_id", pkt_offset=52 ), STLVmWrFlowVar( fv_name=u"in_mac", pkt_offset=58 ), STLVmWrFlowVar( fv_name=u"in_mac", pkt_offset=64 ), STLVmWrFlowVar( fv_name=u"in_ip", pkt_offset=82 ), STLVmWrFlowVar( fv_name=u"in_ip", pkt_offset=86 ), STLVmFixChecksumHw( l3_offset="IP:{}".format(0), l4_offset="UDP:{}".format(0), l4_type=CTRexVmInsFixHwCs.L4_TYPE_UDP ) ] ) return base_pkt_a, base_pkt_b, vm1, vm2 def register(): """Register this traffic profile to T-rex. Do not change this function. :return: Traffic streams. :rtype: Object """ return TrafficStreams()