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2019-04-16vppinfra: more AVX2 and AVX512 inlinesDamjan Marion2-0/+72
Change-Id: I81bd967a580ae3b476dfd731e9933a9898568a91 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-16dlmalloc: honor 8 byte alignment requestsFlorin Coras1-1/+1
Change-Id: Ie504603c2e42cae3ad592952b2b166919420e5f7 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-16svm_fifo rework to avoid contention on cursizeSirshak Das1-0/+3
Problems Addressed: - Contention of cursize by producer and consumer. - Reduce the no of modulo operations. Changes: - Synchronization between producer and consumer changed from cursize to head and tail indexes Implications: reduces the usable size of fifo by 1. - Using weaker memory ordering C++11 atomics to access head and tail based on producer and consumer role. - Head and tail indexes are unsigned 32 bit integers. Additions and subtraction on them are implicit 32 bit Modulo operation. - Adding weaker memory ordering variants of max_enq, max_deq, is_empty and is_full Using them appropriately in all places. Perfomance improvement (iperf3 via Hoststack): iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86) ~6%(256 rxd/txd) - ~11%(2048 rxd/txd) Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018 Signed-off-by: Sirshak Das <sirshak.das@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2019-04-16vppinfra: add basic rbtreeFlorin Coras3-0/+497
Algorithm from CLRS, Introduction to Algorithms 3rd Edition, Ch. 13 Change-Id: I5bc2c507593770939cd5584f21dacf36ebd2b4c1 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-15vppinfra: add SHA-2 family of hash algorithms (including HMAC)Damjan Marion3-0/+647
Change-Id: I54d6fb1a2721b548620eb66cea254d0103deca32 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-12vppinfra: AVX-512 transpose (u32x16 and u64x8)Damjan Marion1-0/+126
Change-Id: Iefe9d20799a6f5f271aa5b675ea2b19ac3efbe1e Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-11vppinfra: fix the issue that mheap_get_trace record wrong pointerWei CHEN1-1/+1
when mspace_get_aligned try to malloc a chunk with align greater than 16 Change-Id: Ic3b91fc9532248482662f019bbfa073da18645ed Signed-off-by: Wei CHEN <weichen@astri.org>
2019-04-08host stack: update stale copyrightFlorin Coras2-2/+2
Change-Id: I33cd6e44d126c73c1f4c16b2041ea607b4d7f39f Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-04-08vppinfra: u32x8 transposeDamjan Marion1-0/+56
Change-Id: I7d39cb184f1f9ad24276183c29969327681a1f82 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-06Doxygen: clean up vec.hDave Wallace1-8/+4
Change-Id: I2294982e6df41a13e61783e18f947da0bdd4b499 Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2019-04-02vppinfra: add u32x4 min / max sse4.2 inlinesDamjan Marion1-24/+49
Change-Id: I38e0be777199654ece286fdd1a42931ed99bbe8a Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-04-02vppinfra: fix sparse_vec_index() returning non-zero index for some ↵Andrew Yourtchenko1-0/+4
nonexistent elements If we are testing for an index whose membership bitmask happens to sit in LSB of uword, and there is nothing else set in that uword in the member bitmask, the shortcut path returning the valid index is taken even if the element with a given index doesn't exist in the sparse vector. This happens because the count of leading zeroes on the value of 0 is zero, which is equal to the value taken modulo bitsize uword. Take care of that case. Also add unittests showing the problem and verifying that sparse_vec_index2 does not have the same issue. Change-Id: I19117e13817c3e5de579b9250bb741de42491985 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com>
2019-03-30VPP-1576: fix a class of spurious warningsDave Barach1-0/+5
Change-Id: I52198e97397bb6f3b5c0c30c44aac34c17650d4d Signed-off-by: Dave Barach <dave@barachs.net>
2019-03-30vppinfra: add few more cpuid flagsDamjan Marion1-0/+7
Change-Id: Ic2a61c45face18b6dd23d5509d75367d3b2441e9 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-29Convince Coverity that s = format (0, ...) is OKDave Barach1-0/+4
Change-Id: Ia88c7228a46e251b8a7815240da6ddbbcde08bc7 Signed-off-by: Dave Barach <dave@barachs.net>
2019-03-28Avoid overwrite in clib_memcpy_le{32,64}Damjan Marion1-27/+29
Change-Id: Id4a8b6a31fc3e88af2f075cb97c85d3f9b738d9e Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-26ipsec: esp-encrypt reworkDamjan Marion3-0/+101
Change-Id: Ibe7f806b9d600994e83c9f1be526fdb0a1ef1833 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-22svm/atomics: add clib_atomic_swap_rel_nFlorin Coras1-0/+1
Change-Id: Iea2c173000570043beafef58ca923463ce76d872 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-03-21vec: use memset in vec_resize_allocate_memoryFlorin Coras1-1/+1
Change-Id: I0ed28846060a774b1f6cdc1e4e5974a7e16f9f16 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-03-20cpu: fix rtype for fn selected by CLIB_MARCH_FNFlorin Coras1-1/+1
Change-Id: I79f65d7bd19af035442dca48b7be6c94de20c167 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-03-20Re-enable aarch64 neon instruction in vlib_buffer_free_inlineLijian.Zhang1-2/+9
int vaddvq_u8 (uint8x16_t __a) is not appropriate to implement xxx_is_all_zero, as there may be overflow causing incorrect return value. Here's an example. u8x16 x = {0 <repeats 12 times>, 1, 255, 0, 0}; Change-Id: Ia6a10bdf8da360dec12db902d028751a1a77e9a4 Signed-off-by: Lijian Zhang <Lijian.Zhang@arm.com> Reviewed-by: Sirshak Das <Sirshak.Das@arm.com>
2019-03-18Fix build with newer linux headersDamjan Marion2-3/+6
Change-Id: Ibfdcec60567ec357205fa137257f2d8cba44b01c Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-03-15Fix bihash bucket double unlock.Tom Seidenberg1-2/+1
Change-Id: Icc9bef32d1bb2b8f277598c50c69343c81f22cd2 Signed-off-by: Tom Seidenberg <tseidenb@cisco.com>
2019-03-12Use AVX2 as default even on AVX512 systemsDamjan Marion1-1/+1
Use of scalar AVX512 instructions impacts the maximum CPU frequency as they require CPU to request level 1 power license. So sparse use of AVX512 like we do, typically causes more harm than improvement. This patch makes AVX2 higher priority than AVX512, but still there is option to change it on per-node basis: vpp# set node function ethernet-input avx512 Change-Id: I42e03510a6efc1756e22fbb70e8c76d7f74f59d7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-02-27VPP-1576: fix Coverity issuesDave Barach1-1/+1
Change-Id: I8b59b2e1c0525abf4b0492e50a7af57df4cd3ce2 Signed-off-by: Dave Barach <dave@barachs.net>
2019-02-26Fix vpp crashing when attempting to run in kubernetes PodArtem Belov1-0/+21
mmap does not fail but writing to mapped memory is causing sigbus. Change-Id: I5135f32eede67fccb4aaa07a501cd262d254ed8d Signed-off-by: Artem Belov <artem.belov@xored.com>
2019-02-21physmem: keep physmem VA in 39-bit address space on x86_64Damjan Marion3-5/+11
Some x86 CPUs have IOMMU capable dealing only with 39-bit address space This patch also adds option to specify physmem base address from startup.conf Change-Id: I9e8abd26efb60e9c4ad54c035fb1751a4a61f4dc Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-02-02Deprecate old mutliarch code, phase 1Damjan Marion1-6/+2
It is causing compilation sloness with gcc-7 so removing it before it was originally planned. So far macros are left in the tree so we can know which nodes to convert to new multiarch code. Change-Id: Idb14622ca61fdce1eba59723b20d98715b7971e6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-30buffers: major cleanup and improvementsDamjan Marion2-0/+60
This patch introduces following changes: - deprecated free lists which are not used and not compatible with external buffer managers (i.e. DPDK) - introduces native support for per-numa buffer pools - significantly improves performance of buffer alloc and free Change-Id: I4a8e723ae47056717afd6cac0efe87cb731b5be7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-27Fix issue with cpu_id and numa_code captured too earlyDamjan Marion1-1/+1
Change-Id: I79b213b34c6071d14acf1922f89037a4a5a36c45 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-23vppinfra: add CLIB_CACHE_LINE_ROUND() macroDamjan Marion1-0/+1
Change-Id: Ic141162acaf39878ab978a997e3f6757d4f7c240 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-23pmalloc: don't iterate if there is no enough free spaceDamjan Marion1-0/+3
Change-Id: I975d46a82e9f884a9cd0ac2bd5f57181695f4124 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-21doxygen formatting fix: prevent stray examples appearing in the docsAndrew Yourtchenko1-2/+2
The 'example' keyword triggers the creation of very out-of-context example in the "Examples" top level of documentation. Rename the keyword in the comment so the comment is still readable, but does not trigger the doxygen. Change-Id: Iecbdc236918f9178a034817aa6cea7ab6b2c1654 Signed-off-by: Andrew Yourtchenko <ayourtch@gmail.com> (cherry picked from commit 1705599efe5eec09c09d2214da776d92d0e4f1cf)
2019-01-20Store numa-noda and cpu-index in vlib_main_tDamjan Marion1-0/+17
Change-Id: If88ccd965122b9318a39a8d71b53334cd1fd81e4 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18Look for plugins in target triplet subdirDamjan Marion1-0/+2
Change-Id: I3bab0ab05b4f552ad64392439fb48409ab0ab8c0 Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18deprecate clib_memcpy64_x4Damjan Marion1-68/+0
Storing buffer in local template seems to be better option.... Change-Id: I1a2fdd68cb956f99a5b36d2cd810fc623e089bcf Signed-off-by: Damjan Marion <damarion@cisco.com>
2019-01-18vcl: move forking logic to vlsFlorin Coras1-12/+15
Change-Id: I721542aca139d7908a4f917629856f82cae79962 Signed-off-by: Florin Coras <fcoras@cisco.com>
2019-01-10strncpy_s_inline copies more bytes than necessarySteven1-2/+3
Given n equals to the maximum number of bytes to copy from src in the API, or the rough estimate strlen of src, strncpy_s_inline should not copy more than the number of bytes, computed by strlen(src), to dst if n is greater than strlen(src). The number of bytes to copy is computed by strnlen(src,n), not n. Change-Id: I088b46125d9776962750e121f1fbf441952efc2b Signed-off-by: Steven <sluong@cisco.com>
2019-01-09Use the official libpcap file typeDave Barach1-13/+8
Change-Id: Ia34a4278eedc8cf450688b1fa0291e1f976868d3 Signed-off-by: Dave Barach <dave@barachs.net>
2019-01-02Fixes for buliding for 32bit targets:David Johnson5-27/+27
* u32/u64/uword mismatches * pointer-to-int fixes * printf formatting issues * issues with incorrect "ULL" and related suffixes * structure alignment and padding issues Change-Id: I70b989007758755fe8211c074f651150680f60b4 Signed-off-by: David Johnson <davijoh3@cisco.com>
2019-01-02Add microarch details to 'show cpu'.Paul Vinciguerra1-2/+4
Change-Id: I31a3ff9e8f70468196c091027592a3aed2d09ac3 Signed-off-by: Paul Vinciguerra <pvinci@vinciconsulting.com>
2019-01-01Default huge page size to the regular page sizeDave Barach1-0/+6
With this simple tweak, vpp is OK for "make test" or non-dpdk driver operation over a kernel which doesn't support hugepages at all. Tested on a Raspberry-pi 3B+ running the Ubuntu 18.04 64-bit server beta image. It's amazing that such a minimal system will not only self-compile vpp, but also run the unit tests. It's slow, but what do you expect for that amount of money? Change-Id: I7f080f871c828cc4b44be13809495278fadbd717 Signed-off-by: Dave Barach <dave@barachs.net>
2018-12-28vppinfra: add simple ring implementationDamjan Marion1-0/+134
Change-Id: I188e2dfd187d7b2ab7e0fbb11461f3db052f3224 Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-12-19session: add cli option to dump session elogFlorin Coras3-3/+28
Change-Id: I1f42644f143bb65ee764c0f869b402595126adac Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-12-19tw: fix _16t_1w_2048sl timer weel definitionFlorin Coras1-3/+3
Change-Id: If5c44241577bc5a42d33f1ec5a62097974d6fda8 Signed-off-by: Florin Coras <fcoras@cisco.com>
2018-12-17docs: clarify vector element alignment description.Dave Wallace1-6/+8
Change-Id: I6da153779010263e6fc4b51c64b01444aaadca17 Signed-off-by: Dave Wallace <dwallacelf@gmail.com>
2018-12-05Improve strncpy_s src/dst overlap checkDave Barach1-2/+12
Let m = user estimate of the (max) src string length, low = smaller address of (src, dst), hi = larger address (src, dst). if (low + (m - 1) >= hi), we have a *potential* overlapping copy which is not allowed. Before we declare overlap - and return an error - retry the check with m = actual src string length. The resulting "test string" failure affected aarch64 (only) because of differences in test code stack variable placement / alignment. Change-Id: I2931d1ce2c61af3d3880075b033d2a4c4e421f09 Signed-off-by: Dave Barach <dave@barachs.net>
2018-12-02vppinfra: c11 safe string functionsSteven2-0/+1082
Add memcmp_s, strcmp_s, strncmp_s, strcpy_s, strncpy_s, strcat_s, strncat_s, strtok_s, strnlen_s, and strstr_s C11 safe string API. For migrating extant unsafe API, add also the corresponding macro version of each safe API, clib_memcmp, clib_strcmp, etc. In general, the benefits of the safe string APIs are to provide null pointer checks, add additional argument to specify the string length of the passed string rather than relying on the null terminated character, and src/dest overlap checking for the the string copy operations. The macro version of the API takes the same number of arguments as the unsafe API to provide easy migration. However, it does not usually provide the full aformentioned benefits. In some cases, it is necessary to move to the safe API rather than using the macro in order to avoid some unpredictable problems such as accessing memory beyond what it is intended due to the lack of the passed string length. dbarach: add a "make test" vector, and a doxygen file header cookie. Change-Id: I5cd79b8928dcf76a79bf3f0b8cbc1a8f24942f4c Signed-off-by: Steven <sluong@cisco.com> Signed-off-by: Dave Barach <dave@barachs.net>
2018-11-29do not opttimize graph node functions in debug buildsDamjan Marion1-1/+1
Change-Id: I5b4cd419d317381a06e7e6d703373959f4bbd97b Signed-off-by: Damjan Marion <damarion@cisco.com>
2018-11-29vcl: basic support for apps that forkFlorin Coras1-1/+1
- intercept fork and register a new worker with vpp - share sessions between parent and forked child - keep binary api state per worker Change-Id: Ib177517d661724fa042bd2d98d18e777056352a2 Signed-off-by: Florin Coras <fcoras@cisco.com>