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2016-06-09Add format_hexdump functionDamjan Marion2-0/+49
Function output is compatible with text2pcap tool Sample output: 00000: 54 68 65 20 71 75 69 63 6b 20 62 72 6f 77 6e 20 [The quick brown ] 00010: 66 6f 78 20 6a 75 6d 70 73 20 6f 76 65 72 20 74 [fox jumps over t] 00020: 68 65 20 6c 61 7a 79 20 64 6f 67 00 [he lazy dog.] Change-Id: If77ec7d91b77146df770698e0cf35fe2f6dd0821 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-19Add support for multiple microarchitectures in single binaryDamjan Marion2-6/+95
* compiler -march= parameter is changed from native to corei7 so code is always genereted with instructions which are available on the Nehalem microarchitecture (up to SSE4.2) * compiler -mtune= parameter is added so code is optimized for corei7-avx which equals to Sandy Bridge microarchitecture * set of macros is added which allows run-time detection of available cpu instructions (e.g. clib_cpu_supports_avx()) * set of macros is added which allows us to clone graph node funcitons where cloned function is optmized for different microarchitecture Those macros are using following attributes: __attribute__((flatten)) __attribute__((target("arch=core-avx2))) I.e. If applied to foo_node_fn() macro will generate cloned functions foo_node_fn_avx2() and foo_node_fn_avx512() (future) It will also generate function void * foo_node_fn_multiarch_select() which detects available instruction set and returns pointer to the best matching function clone. Change-Id: I2dce0ac92a5ede95fcb56f47f3d1f3c4c040bac0 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-17vppinfra - ARM: cycle count 64bits register is only available on ARMv8Christophe Fontaine1-2/+9
Change-Id: I7d622e591020a482af68667f4d1ed2056258d2c8 Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
2016-05-16VPP-58: Fix build on AMD OpteronDamjan Marion1-1/+1
Change-Id: Ib3e10fd4c27dde4f90b8d156f0c8547787ad46e2 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-05-16VPP-57 Add missing license headers in doc filesChris Luke3-0/+48
Change-Id: Icd1f8952f66d3cee027c59f3148c67f1839de306 Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-05-13VPP-57 Add Doxygen to VPPChris Luke4-2/+11
- Configures Doxygen. - Adds a source filter to do magic on our use of the preprocessor to do constructor stuff to make Doxygen grok it better. - Adds a convenience helper to the root Makefile. - Adds a README.md to the root directory (and which Doxygem uses as its "mainpage". - Add several other documentative files. - Currently using SVG for call graphs, though this may have a load-time performance impact in browsers. Change-Id: I25fc6fb5bf634319dcb36a7f0e32031921c125ac Signed-off-by: Chris Luke <chrisy@flirble.org>
2016-04-26Make automake silent rules defaultDamjan Marion1-1/+1
Change-Id: Ia504ccdac1deac20f20cf7fb76f78b2d8c505474 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-22Add clib_memcpy macro based on DPDK rte_memcpy implementationDamjan Marion22-66/+683
Change-Id: I22cb443c4bd0bf298abb6f06e8e4ca65a44a2854 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-21Add Broadwell-EP/EX to the uarch listDamjan Marion1-0/+1
Change-Id: I2ab84846ac88d3170b8c847914749e2a728dfa2b Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-04-18Add support for AArch32Christophe Fontaine10-14/+20
gcc version 4.9.2 (Raspbian 4.9.2-10) Tested on Linux raspberrypi 4.4.6-v7+ #875 SMP Tue Apr 12 16:33:02 BST 2016 armv7l GNU/Linux CPUs may be little or big endian, detect with gcc flags, not the processor architecture Add a new flag $(PLATFORM)_uses_openssl which allows to disable the link with openssl lib. vlib/vlib/threads.c: startup.conf must: - specify the heapsize as we don't have hugepages on raspbian cpu { main-core 3 } heapsize 64M Corrects in various files the assumption uword == u64 and replaces 'u64' cast with 'pointer_to_uword' and 'uword_to_pointer' where appropriate. 256 CPUs may create an OOM when testing with small memory footprint ( heapsize 64M ), allows the number of VLIB_MAX_CPUS to be set in platforms/*.mk vppinfra/vppinfra/longjmp.S: ARM - copy r1 (1st parameter of the setjmp call) to r0 (return value) vppinfra/vppinfra/time.h: On ARMv7 in AArch32 mode, we can access to a 64bit register to retreive the cycles count. gcc on rpi only declare ARM_ARCH 6. Override this info, and check if it is possible to use 'mrrc'. /!\ the time function will NOT work without allowing the user mode access to the PMU. You may download the source of the kmod here: https://github.com/christophefontaine/arm_rdtsc Change-Id: I8142606436d9671a184133b935398427f08a8bd2 Signed-off-by: Christophe Fontaine <christophe.fontaine@qosmos.com>
2016-04-14Fix vppinfra unit testsFlorin Coras3-5/+10
"make check" in build-root/build-$tag-$arch/vppinfra should now work on a machine with 3G of spare memory Change-Id: Ie6a22e8496b56b93aa90fdc81e3e0c10dc7514fb Signed-off-by: Florin Coras <fcoras@cisco.com>
2016-04-11Add configure option to enable building unit testsDamjan Marion2-1/+12
Same template should be used for other libs... Change-Id: Icc771cb6b243d215f30fb51c0dbc028e497a74c6 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-28event logger skeletons, improve debug CLIDave Barach2-1/+2
Change-Id: Ieb2e4043fc7bc3b4a5436a7a6aa35f573d8d4506 Signed-off-by: Dave Barach <dave@barachs.net>
2016-03-26Improve main-loop event-logsDave Barach2-3/+29
Change-Id: I984debeffe0dce36c9e7ab963f25d862cc7550cc Signed-off-by: Dave Barach <dave@barachs.net>
2016-03-18Make adjacencies shareableDave Barach1-0/+2
Change-Id: I620871ca715b751d2e487f37341b7118797c9176 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-14Declare node, hw_interface_class and device_class instances as externalDamjan Marion1-1/+1
This fixes issue observed on Ubuntu 16.04 where dynamic loader is not finding correct instance of specific structure. Change-Id: I618d0933c7e171b8a9b40495b36894785af7790a Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-04vppinfra: remove generated config.h.inJean-Mickael Guerin1-62/+0
Change-Id: I04f53789bf1f39fdf16bc813280b24144fedd020 Signed-off-by: Jean-Mickael Guerin <jean-mickael.guerin@6wind.com>
2016-03-04Add CPU detection functionsDamjan Marion3-0/+134
Change-Id: Id7ea0410d6a789000c747c36a7e50076e31dc29a Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-03-03Use CRC32 instruction only when build for SSE4.2 enabled platformsDamjan Marion1-1/+1
This fixes SIGILL crash observed on Penryn CPU Change-Id: I960878d88f0f088847d4d86605ef082f6600e2c7 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-29-O3 warnings be goneDave Barach1-1/+1
Note that compiling -O3 doesn't improve performance as of this writing, might as well clean up warnings in any event. Change-Id: Ic2f4982d12fbbf36f5324075183982731759dc94 Signed-off-by: Dave Barach <dave@barachs.net>
2016-02-16Increase number of per-cpu mheaps to 256Damjan Marion2-2/+4
It also includes check to ensure that number of per-cpu mheaps is not lower than number of cpus. Change-Id: Ibc68b34dda130f922243f9ea15b03e44bbcac269 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-16Remove vec_sort macroDamjan Marion1-27/+0
vec_sort macro was using gcc proprietary nested functions that require a executable stack and they are considered as unsafe. Also, nested functions are not supported by other compilers. vec_sort_with_function() should be used instead. Change-Id: I05959da63d222ec71c090ba63420b427ce10c79b Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-02-11Use vppinfra bitmap for dpdk coremaskDamjan Marion1-1/+24
Change-Id: Iec5ebadf120f742f43a681c4d394aa97ad2ae1e1 Signed-off-by: Damjan Marion <damarion@cisco.com>
2016-01-22aarch64 CPU arch / ThunderX platform initial supportDave Barach9-14/+129
Change-Id: Ia2edd3cee2c25c26c7c47a9023744b97226434c7 Signed-off-by: Dave Barach <dave@barachs.net>
2016-01-21PowerPC64-be arch support. Qemu ("qppc") platform support.Dave Barach4-30/+52
Change-Id: Ib0a05f9d1b08bacef09f6d7c101391737031ee0d Signed-off-by: Dave Barach <dave@barachs.net>
2016-01-19Merge "Fix bitmap list parsing"Dave Barach1-0/+5
2016-01-19Clean up commentDave Barach1-4/+7
Change-Id: I487321624d3625e32e661ca378716ec083ce3ce2 Signed-off-by: Dave Barach <dave@barachs.net>
2016-01-19Fix bitmap list parsingDamjan Marion1-0/+5
Fixes "cpu_config: no such thread type 'corelist-workers'" issue Change-Id: Ic0309ee62859ac73fd58c57b5f630aff5daf1775 Signed-off-by: Damjan Marion <damarion@cisco.com>
2015-12-18Fix warnings/errors reported by clangDamjan Marion6-6/+7
Change-Id: Ifb2de64347526e3218e22067452f249ff878fd32 Signed-off-by: Damjan Marion <damarion@cisco.com>
2015-12-15Remove autotools generated productsDave Barach13-47775/+0
Change-Id: I7f23b8b8e5136cb56768bac3a7473e6df5ee4993 Signed-off-by: Dave Barach <dave@barachs.net>
2015-12-15Merge "replacing all vec_sort() invocations to vec_sort_with_function()"Dave Wallace2-8/+26
2015-12-15Remove vppversion subtree, move elftool to vppinfraDamjan Marion13-473/+897
Change-Id: I26b29a0f53f81a28cbf264f5299f9a3978735574 Signed-off-by: Damjan Marion <damarion@cisco.com>
2015-12-15replacing all vec_sort() invocations to vec_sort_with_function()Matus Fabian2-8/+26
Change-Id: I05895827ed52be292112484cee7d0a2591b67335 Signed-off-by: Matus Fabian <matfabia@cisco.com>
2015-12-12Reenable memory allocator small-object cache, disabled by mistake.Dave Barach1-1/+1
Change-Id: I006282fd3991f7ba7b8315670724c065bd71a671 Signed-off-by: Dave Barach <dave@barachs.net>
2015-12-08Initial commit of vpp code.v1.0.0Ed Warnicke162-0/+98219
Change-Id: Ib246f1fbfce93274020ee93ce461e3d8bd8b9f17 Signed-off-by: Ed Warnicke <eaw@cisco.com>