From e75084025ac967c45af3d4f485a0399b0718c8ec Mon Sep 17 00:00:00 2001 From: Ray Kinsella Date: Mon, 15 Nov 2021 06:48:50 +0000 Subject: perfmon: rename bundle to memory stalls Rename the memory bandwidth bundle to memory stalls, to differentiate it from the bundle that measures memory controller bandwidth boundedness. Type: refactor Signed-off-by: Ray Kinsella Change-Id: I828c73b6f769046e1ab592712bdf81ceefcd7911 --- src/plugins/perfmon/CMakeLists.txt | 2 +- src/plugins/perfmon/intel/bundle/membw_bound.c | 59 ------------------------ src/plugins/perfmon/intel/bundle/memory_stalls.c | 59 ++++++++++++++++++++++++ 3 files changed, 60 insertions(+), 60 deletions(-) delete mode 100644 src/plugins/perfmon/intel/bundle/membw_bound.c create mode 100644 src/plugins/perfmon/intel/bundle/memory_stalls.c diff --git a/src/plugins/perfmon/CMakeLists.txt b/src/plugins/perfmon/CMakeLists.txt index 73598cf11a7..44be59ef539 100644 --- a/src/plugins/perfmon/CMakeLists.txt +++ b/src/plugins/perfmon/CMakeLists.txt @@ -23,7 +23,7 @@ add_vpp_plugin(perfmon perfmon.c intel/core.c intel/uncore.c - intel/bundle/membw_bound.c + intel/bundle/memory_stalls.c intel/bundle/inst_and_clock.c intel/bundle/load_blocks.c intel/bundle/mem_bw.c diff --git a/src/plugins/perfmon/intel/bundle/membw_bound.c b/src/plugins/perfmon/intel/bundle/membw_bound.c deleted file mode 100644 index 2e4b4aa57bb..00000000000 --- a/src/plugins/perfmon/intel/bundle/membw_bound.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * Copyright (c) 2021 Intel and/or its affiliates. - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include - -static u8 * -format_intel_membw_bound (u8 *s, va_list *args) -{ - perfmon_node_stats_t *ss = va_arg (*args, perfmon_node_stats_t *); - int row = va_arg (*args, int); - f64 sv = 0; - - if (!ss->n_packets) - return s; - - sv = ss->value[row] / ss->n_packets; - - s = format (s, "%5.0f", sv); - - return s; -} - -static perfmon_cpu_supports_t membw_bound_cpu_supports[] = { - { clib_cpu_supports_avx512_bitalg, PERFMON_BUNDLE_TYPE_NODE }, -}; - -PERFMON_REGISTER_BUNDLE (intel_core_membw_bound) = { - .name = "membw-bound", - .description = "memory bandwidth boundedness", - .source = "intel-core", - .events[0] = INTEL_CORE_E_CPU_CLK_UNHALTED_THREAD_P, /* FIXED */ - .events[1] = INTEL_CORE_E_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE, /*CMask: 0xFF*/ - .events[2] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_MEM_ANY, /*CMask: 0xFF*/ - .events[3] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_L1D_MISS, /*CMask: 0xF*/ - .events[4] = INTEL_CORE_E_L1D_PEND_MISS_FB_FULL, /*CMask: 0xF*/ - .events[5] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_L3_MISS, /*CMask: 0xF*/ - .events[6] = INTEL_CORE_E_SQ_MISC_SQ_FULL, /*CMask: 0xF*/ - .n_events = 7, - .format_fn = format_intel_membw_bound, - .cpu_supports = membw_bound_cpu_supports, - .n_cpu_supports = ARRAY_LEN (membw_bound_cpu_supports), - .column_headers = PERFMON_STRINGS ("Cycles/Packet", "Cycles Stall/Packet", - "Mem Stall/Packet", - "L1D Miss Stall/Packet", "FB Full/Packet", - "L3 Miss Stall/Packet", "SQ Full/Packet"), -}; diff --git a/src/plugins/perfmon/intel/bundle/memory_stalls.c b/src/plugins/perfmon/intel/bundle/memory_stalls.c new file mode 100644 index 00000000000..3de3a615732 --- /dev/null +++ b/src/plugins/perfmon/intel/bundle/memory_stalls.c @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2021 Intel and/or its affiliates. + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include +#include + +static u8 * +format_intel_memory_stalls (u8 *s, va_list *args) +{ + perfmon_node_stats_t *ss = va_arg (*args, perfmon_node_stats_t *); + int row = va_arg (*args, int); + f64 sv = 0; + + if (!ss->n_packets) + return s; + + sv = ss->value[row] / ss->n_packets; + + s = format (s, "%5.0f", sv); + + return s; +} + +static perfmon_cpu_supports_t memory_stalls_cpu_supports[] = { + { clib_cpu_supports_avx512_bitalg, PERFMON_BUNDLE_TYPE_NODE }, +}; + +PERFMON_REGISTER_BUNDLE (intel_core_memory_stalls) = { + .name = "memory-stalls", + .description = "cycles not retiring instructions due to memory stalls", + .source = "intel-core", + .events[0] = INTEL_CORE_E_CPU_CLK_UNHALTED_THREAD_P, /* FIXED */ + .events[1] = INTEL_CORE_E_CYCLE_ACTIVITY_CYCLES_NO_EXECUTE, /*CMask: 0xFF*/ + .events[2] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_MEM_ANY, /*CMask: 0xFF*/ + .events[3] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_L1D_MISS, /*CMask: 0xF*/ + .events[4] = INTEL_CORE_E_L1D_PEND_MISS_FB_FULL, /*CMask: 0xF*/ + .events[5] = INTEL_CORE_E_CYCLE_ACTIVITY_STALLS_L3_MISS, /*CMask: 0xF*/ + .events[6] = INTEL_CORE_E_SQ_MISC_SQ_FULL, /*CMask: 0xF*/ + .n_events = 7, + .format_fn = format_intel_memory_stalls, + .cpu_supports = memory_stalls_cpu_supports, + .n_cpu_supports = ARRAY_LEN (memory_stalls_cpu_supports), + .column_headers = PERFMON_STRINGS ("Cycles/Packet", "Cycles Stall/Packet", + "Mem Stall/Packet", + "L1D Miss Stall/Packet", "FB Full/Packet", + "L3 Miss Stall/Packet", "SQ Full/Packet"), +}; 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