From 6eb0f84e37d84caeb9db773976df5ab3a7e794d0 Mon Sep 17 00:00:00 2001
From: Damjan Marion <damarion@cisco.com>
Date: Sun, 31 Oct 2021 19:04:33 +0100
Subject: vppinfra: initial RISC-V support

Type: feature
Change-Id: I1314d60fc420366526efaddd1ed215cf5f8b75dd
Signed-off-by: Damjan Marion <damarion@cisco.com>
---
 src/vppinfra/time.h | 9 +++++++++
 1 file changed, 9 insertions(+)

(limited to 'src/vppinfra/time.h')

diff --git a/src/vppinfra/time.h b/src/vppinfra/time.h
index 4d8997f0a9e..761dbed3fe8 100644
--- a/src/vppinfra/time.h
+++ b/src/vppinfra/time.h
@@ -192,6 +192,15 @@ clib_cpu_time_now (void)
   return result;
 }
 
+#elif defined(__riscv)
+
+always_inline u64
+clib_cpu_time_now (void)
+{
+  u64 result;
+  asm volatile("rdcycle %0\n" : "=r"(result));
+  return result;
+}
 #else
 #error "don't know how to read CPU time stamp"
 
-- 
cgit 1.2.3-korg