From 1ca681838c939135b067b2db79b0c540fd803e37 Mon Sep 17 00:00:00 2001 From: Damjan Marion Date: Wed, 15 Mar 2023 11:08:53 +0000 Subject: build: add support for intel alderlake and sapphirerapids, part 2 Type: improvement Change-Id: I64ca5bd3a959190111f61c5311a908d242c10bad Signed-off-by: Damjan Marion --- src/vppinfra/cpu.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'src/vppinfra') diff --git a/src/vppinfra/cpu.h b/src/vppinfra/cpu.h index efa85ad1af1..a30401ab371 100644 --- a/src/vppinfra/cpu.h +++ b/src/vppinfra/cpu.h @@ -24,7 +24,9 @@ _ (hsw, "Intel Haswell") \ _ (trm, "Intel Tremont") \ _ (skx, "Intel Skylake (server) / Cascade Lake") \ - _ (icl, "Intel Ice Lake") + _ (icl, "Intel Ice Lake") \ + _ (adl, "Intel Alder Lake") \ + _ (spr, "Intel Sapphire Rapids") #elif defined(__aarch64__) #define foreach_march_variant \ _ (octeontx2, "Marvell Octeon TX2") \ -- cgit 1.2.3-korg