From 28aa539f7da7b172d0f35ea9a63f3986939477f7 Mon Sep 17 00:00:00 2001 From: Sirshak Das Date: Tue, 5 Feb 2019 01:33:33 -0600 Subject: svm_fifo rework to avoid contention on cursize Problems Addressed: - Contention of cursize by producer and consumer. - Reduce the no of modulo operations. Changes: - Synchronization between producer and consumer changed from cursize to head and tail indexes Implications: reduces the usable size of fifo by 1. - Using weaker memory ordering C++11 atomics to access head and tail based on producer and consumer role. - Head and tail indexes are unsigned 32 bit integers. Additions and subtraction on them are implicit 32 bit Modulo operation. - Adding weaker memory ordering variants of max_enq, max_deq, is_empty and is_full Using them appropriately in all places. Perfomance improvement (iperf3 via Hoststack): iperf3 Server: Marvell ThunderX2(AArch64) - iperf3 Client: Skylake(x86) ~6%(256 rxd/txd) - ~11%(2048 rxd/txd) Change-Id: I1d484e000e437430fdd5a819657d1c6b62443018 Signed-off-by: Sirshak Das Reviewed-by: Honnappa Nagarahalli --- src/vppinfra/atomics.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/vppinfra') diff --git a/src/vppinfra/atomics.h b/src/vppinfra/atomics.h index 6fe3af27d97..5444b6df350 100644 --- a/src/vppinfra/atomics.h +++ b/src/vppinfra/atomics.h @@ -40,8 +40,11 @@ #define clib_atomic_test_and_set(a) __sync_lock_test_and_set(a, 1) #define clib_atomic_release(a) __sync_lock_release(a) +#define clib_atomic_fence_rel() __atomic_thread_fence(__ATOMIC_RELEASE); + #define clib_atomic_load_acq_n(a) __atomic_load_n((a), __ATOMIC_ACQUIRE) #define clib_atomic_store_rel_n(a, b) __atomic_store_n ((a), (b), __ATOMIC_RELEASE) + #define clib_atomic_swap_acq_n(a, b) __atomic_exchange_n ((a), (b), __ATOMIC_ACQUIRE) #define clib_atomic_swap_rel_n(a, b) __atomic_exchange_n ((a), (b), __ATOMIC_RELEASE) -- cgit