From 473f46135c3fd77dad5614215cc279b1164e9a74 Mon Sep 17 00:00:00 2001 From: Dave Barach Date: Tue, 29 May 2018 17:06:45 -0400 Subject: Configure or deduce CLIB_LOG2_CACHE_LINE_BYTES (VPP-1064) Added configure argument "--with-log2-cache-line-bytes=5|6|7|auto" AKA 32, 64, or 128 bytes, or use the inferred value from the build host. produces build-xxx/vpp/vppinfra/config.h, which .../src/vppinfra/cache.h Kernels which implement the following pseudo-file (aka x86_64) are easy: /sys/devices/system/cpu/cpu0/cache/index0/coherency_line_size Otherwise, extract the cpuid from /proc/cpuinfo and map it to the cache line size. Change-Id: I7ff861e042faf82c3901fa1db98864fbdea95b74 Signed-off-by: Dave Barach Signed-off-by: Nitin Saxena --- src/vppinfra/cache.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'src/vppinfra') diff --git a/src/vppinfra/cache.h b/src/vppinfra/cache.h index e5c678eb517..ac0835523cb 100644 --- a/src/vppinfra/cache.h +++ b/src/vppinfra/cache.h @@ -41,10 +41,13 @@ #include /* - * Allow CFLAGS to override the arch-specific cache line size + * Allow CFLAGS to override the configured / deduced cache line size */ #ifndef CLIB_LOG2_CACHE_LINE_BYTES +/* defines CLIB_LOG2_CACHE_LINE_BYTES */ +#include + /* Default cache line size of 64 bytes. */ #ifndef CLIB_LOG2_CACHE_LINE_BYTES #define CLIB_LOG2_CACHE_LINE_BYTES 6 -- cgit 1.2.3-korg