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author | Luca Boccassi <luca.boccassi@gmail.com> | 2018-02-19 11:16:57 +0000 |
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committer | Luca Boccassi <luca.boccassi@gmail.com> | 2018-02-19 11:17:28 +0000 |
commit | ca33590b6af032bff57d9cc70455660466a654b2 (patch) | |
tree | 0b68b090bd9b4a78a3614b62400b29279d76d553 /config/arm/armv8_machine.py | |
parent | 169a9de21e263aa6599cdc2d87a45ae158d9f509 (diff) |
New upstream version 18.02upstream/18.02
Change-Id: I89ed24cb2a49b78fe5be6970b99dd46c1499fcc3
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'config/arm/armv8_machine.py')
-rwxr-xr-x | config/arm/armv8_machine.py | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/config/arm/armv8_machine.py b/config/arm/armv8_machine.py new file mode 100755 index 00000000..404866d2 --- /dev/null +++ b/config/arm/armv8_machine.py @@ -0,0 +1,18 @@ +#!/usr/bin/python +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2017 Cavium, Inc + +ident = [] +fname = '/sys/devices/system/cpu/cpu0/regs/identification/midr_el1' +with open(fname) as f: + content = f.read() + +midr_el1 = (int(content.rstrip('\n'), 16)) + +ident.append(hex((midr_el1 >> 24) & 0xFF)) # Implementer +ident.append(hex((midr_el1 >> 20) & 0xF)) # Variant +ident.append(hex((midr_el1 >> 16) & 0XF)) # Architecture +ident.append(hex((midr_el1 >> 4) & 0xFFF)) # Primary Part number +ident.append(hex(midr_el1 & 0xF)) # Revision + +print(' '.join(ident)) |