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authorLuca Boccassi <luca.boccassi@gmail.com>2017-08-16 18:42:05 +0100
committerLuca Boccassi <luca.boccassi@gmail.com>2017-08-16 18:46:04 +0100
commitf239aed5e674965691846e8ce3f187dd47523689 (patch)
treea153a3125c6e183c73871a8ecaa4b285fed5fbd5 /config/defconfig_arm64-dpaa2-linuxapp-gcc
parentbf7567fd2a5b0b28ab724046143c24561d38d015 (diff)
New upstream version 17.08
Change-Id: I288b50990f52646089d6b1f3aaa6ba2f091a51d7 Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'config/defconfig_arm64-dpaa2-linuxapp-gcc')
-rw-r--r--config/defconfig_arm64-dpaa2-linuxapp-gcc16
1 files changed, 13 insertions, 3 deletions
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 314a0ece..8a42944a 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -1,7 +1,7 @@
# BSD LICENSE
#
# Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
-# Copyright (c) 2016 NXP. All rights reserved.
+# Copyright 2016 NXP.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
@@ -34,7 +34,7 @@
# NXP (Freescale) - Soc Architecture with WRIOP and QBMAN support
CONFIG_RTE_MACHINE="dpaa2"
-CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd"
+CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
#
# Compile Environment Abstraction Layer
@@ -45,12 +45,16 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
CONFIG_RTE_PKTMBUF_HEADROOM=256
+# Doesn't support NUMA
+CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
+CONFIG_RTE_LIBRTE_VHOST_NUMA=n
+
#
# Compile Support Libraries for DPAA2
#
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
-CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
+CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n
#
# Compile NXP DPAA2 FSL-MC Bus
@@ -80,3 +84,9 @@ CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
# on a single DPAA2 SEC device.
#
CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048
+
+#
+# Compile schedule-oriented NXP DPAA2 EVENTDEV driver
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
+CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV_DEBUG=n