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authorGowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>2016-09-21 17:02:03 +0530
committerGowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>2016-09-26 13:53:39 +0530
commitce869c40f7d76ac73120bb98763aef4edae0f0bd (patch)
tree37909295c3c0e6c85d7e5fd23d840b1f3ce1d51c /debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch
parent55c3008a78a5913dff6dc25c69abdd8f345c5b5b (diff)
dpdk-dev: enable lpm, acl, sched, table, port and pipeline libs in ppc64le
This patchset enables lpm, acl, sched, table, port and pileline libs in ppc64le and also address few patches in related examples (ip_pipeline and l3fwd). Upstream patches pulled into deb_dpdk. Change-Id: I73bf0a2a20da227476601b748448f16e2b471eaf Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
Diffstat (limited to 'debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch')
-rw-r--r--debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch317
1 files changed, 317 insertions, 0 deletions
diff --git a/debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch b/debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch
new file mode 100644
index 00000000..1a261f33
--- /dev/null
+++ b/debian/patches/dpdk-dev-ppc-enable-1-7-lpm-add-AltiVec-for-ppc64.patch
@@ -0,0 +1,317 @@
+From: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
+Date: Thu, 8 Sep 2016 22:18:03 +0530
+Subject: [PATCH 1/7] lpm: add AltiVec for ppc64
+
+This patch adds ppc64le port for LPM library in DPDK.
+
+Signed-off-by: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
+Acked-by: Chao Zhu <chaozhu@linux.vnet.ibm.com>
+
+Origin: Upstream, commit:d2cc7959342b5183ab88aed44ea011d660a91021
+Author: Gowrishankar Muthukrishnan <gowrishankar.m@linux.vnet.ibm.com>
+Last-Update: 2016-09-21
+---
+ app/test/test_xmmt_ops.h | 16 +++
+ config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
+ .../common/include/arch/ppc_64/rte_vect.h | 60 ++++++++
+ lib/librte_lpm/Makefile | 2 +
+ lib/librte_lpm/rte_lpm.h | 2 +
+ lib/librte_lpm/rte_lpm_altivec.h | 154 +++++++++++++++++++++
+ 6 files changed, 234 insertions(+), 1 deletion(-)
+ create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
+ create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
+
+diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
+index de9c16f..42174d2 100644
+--- a/app/test/test_xmmt_ops.h
++++ b/app/test/test_xmmt_ops.h
+@@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
+ /* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
+ #define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)
+
++#elif defined(RTE_ARCH_PPC_64)
++
++/* vect_* abstraction implementation using ALTIVEC */
++
++/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
++#define vect_loadu_sil128(p) vec_ld(0, p)
++
++/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
++static inline xmm_t __attribute__((always_inline))
++vect_set_epi32(int i3, int i2, int i1, int i0)
++{
++ xmm_t data = (xmm_t){i0, i1, i2, i3};
++
++ return data;
++}
++
+ #endif
+
+ #endif /* _TEST_XMMT_OPS_H_ */
+diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
+index bef8f49..9ddf3c5 100644
+--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
++++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
+@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
+ CONFIG_RTE_LIBRTE_FM10K_PMD=n
+
+ # This following libraries are not available on Power. So they're turned off.
+-CONFIG_RTE_LIBRTE_LPM=n
+ CONFIG_RTE_LIBRTE_ACL=n
+ CONFIG_RTE_LIBRTE_SCHED=n
+ CONFIG_RTE_LIBRTE_PORT=n
+diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
+new file mode 100644
+index 0000000..05209e5
+--- /dev/null
++++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
+@@ -0,0 +1,60 @@
++/*
++ * BSD LICENSE
++ *
++ * Copyright (C) IBM Corporation 2016.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ *
++ * * Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * * Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in
++ * the documentation and/or other materials provided with the
++ * distribution.
++ * * Neither the name of IBM Corporation nor the names of its
++ * contributors may be used to endorse or promote products derived
++ * from this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++*/
++
++#ifndef _RTE_VECT_PPC_64_H_
++#define _RTE_VECT_PPC_64_H_
++
++#include <altivec.h>
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++typedef vector signed int xmm_t;
++
++#define XMM_SIZE (sizeof(xmm_t))
++#define XMM_MASK (XMM_SIZE - 1)
++
++typedef union rte_xmm {
++ xmm_t x;
++ uint8_t u8[XMM_SIZE / sizeof(uint8_t)];
++ uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
++ uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
++ uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
++ double pd[XMM_SIZE / sizeof(double)];
++} __attribute__((aligned(16))) rte_xmm_t;
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _RTE_VECT_PPC_64_H_ */
+diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
+index 656ade2..3dc549d 100644
+--- a/lib/librte_lpm/Makefile
++++ b/lib/librte_lpm/Makefile
+@@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
+ SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_neon.h
+ else ifeq ($(CONFIG_RTE_ARCH_X86),y)
+ SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_sse.h
++else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
++SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_altivec.h
+ endif
+
+ # this lib needs eal
+diff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h
+index 2df1d67..dbe5483 100644
+--- a/lib/librte_lpm/rte_lpm.h
++++ b/lib/librte_lpm/rte_lpm.h
+@@ -480,6 +480,8 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
+
+ #if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
+ #include "rte_lpm_neon.h"
++#elif defined(RTE_ARCH_PPC_64)
++#include "rte_lpm_altivec.h"
+ #else
+ #include "rte_lpm_sse.h"
+ #endif
+diff --git a/lib/librte_lpm/rte_lpm_altivec.h b/lib/librte_lpm/rte_lpm_altivec.h
+new file mode 100644
+index 0000000..e26e087
+--- /dev/null
++++ b/lib/librte_lpm/rte_lpm_altivec.h
+@@ -0,0 +1,154 @@
++/*
++ * BSD LICENSE
++ *
++ * Copyright (C) IBM Corporation 2016.
++ *
++ * Redistribution and use in source and binary forms, with or without
++ * modification, are permitted provided that the following conditions
++ * are met:
++ *
++ * * Redistributions of source code must retain the above copyright
++ * notice, this list of conditions and the following disclaimer.
++ * * Redistributions in binary form must reproduce the above copyright
++ * notice, this list of conditions and the following disclaimer in
++ * the documentation and/or other materials provided with the
++ * distribution.
++ * * Neither the name of IBM Corporation nor the names of its
++ * contributors may be used to endorse or promote products derived
++ * from this software without specific prior written permission.
++ *
++ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
++ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
++ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
++ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
++ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
++ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
++ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
++ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
++ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
++ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
++ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
++*/
++
++#ifndef _RTE_LPM_ALTIVEC_H_
++#define _RTE_LPM_ALTIVEC_H_
++
++#include <rte_branch_prediction.h>
++#include <rte_byteorder.h>
++#include <rte_common.h>
++#include <rte_vect.h>
++
++#ifdef __cplusplus
++extern "C" {
++#endif
++
++static inline void
++rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
++ uint32_t defv)
++{
++ vector signed int i24;
++ rte_xmm_t i8;
++ uint32_t tbl[4];
++ uint64_t idx, pt, pt2;
++ const uint32_t *ptbl;
++
++ const uint32_t mask = UINT8_MAX;
++ const vector signed int mask8 = (xmm_t){mask, mask, mask, mask};
++
++ /*
++ * RTE_LPM_VALID_EXT_ENTRY_BITMASK for 2 LPM entries
++ * as one 64-bit value (0x0300000003000000).
++ */
++ const uint64_t mask_xv =
++ ((uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK |
++ (uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK << 32);
++
++ /*
++ * RTE_LPM_LOOKUP_SUCCESS for 2 LPM entries
++ * as one 64-bit value (0x0100000001000000).
++ */
++ const uint64_t mask_v =
++ ((uint64_t)RTE_LPM_LOOKUP_SUCCESS |
++ (uint64_t)RTE_LPM_LOOKUP_SUCCESS << 32);
++
++ /* get 4 indexes for tbl24[]. */
++ i24 = vec_sr((xmm_t) ip,
++ (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
++
++ /* extract values from tbl24[] */
++ idx = (uint32_t)i24[0];
++ idx = idx < (1<<24) ? idx : (1<<24)-1;
++ ptbl = (const uint32_t *)&lpm->tbl24[idx];
++ tbl[0] = *ptbl;
++
++ idx = (uint32_t) i24[1];
++ idx = idx < (1<<24) ? idx : (1<<24)-1;
++ ptbl = (const uint32_t *)&lpm->tbl24[idx];
++ tbl[1] = *ptbl;
++
++ idx = (uint32_t) i24[2];
++ idx = idx < (1<<24) ? idx : (1<<24)-1;
++ ptbl = (const uint32_t *)&lpm->tbl24[idx];
++ tbl[2] = *ptbl;
++
++ idx = (uint32_t) i24[3];
++ idx = idx < (1<<24) ? idx : (1<<24)-1;
++ ptbl = (const uint32_t *)&lpm->tbl24[idx];
++ tbl[3] = *ptbl;
++
++ /* get 4 indexes for tbl8[]. */
++ i8.x = vec_and(ip, mask8);
++
++ pt = (uint64_t)tbl[0] |
++ (uint64_t)tbl[1] << 32;
++ pt2 = (uint64_t)tbl[2] |
++ (uint64_t)tbl[3] << 32;
++
++ /* search successfully finished for all 4 IP addresses. */
++ if (likely((pt & mask_xv) == mask_v) &&
++ likely((pt2 & mask_xv) == mask_v)) {
++ *(uint64_t *)hop = pt & RTE_LPM_MASKX4_RES;
++ *(uint64_t *)(hop + 2) = pt2 & RTE_LPM_MASKX4_RES;
++ return;
++ }
++
++ if (unlikely((pt & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
++ i8.u32[0] = i8.u32[0] +
++ (uint8_t)tbl[0] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[0]];
++ tbl[0] = *ptbl;
++ }
++ if (unlikely((pt >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
++ i8.u32[1] = i8.u32[1] +
++ (uint8_t)tbl[1] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[1]];
++ tbl[1] = *ptbl;
++ }
++ if (unlikely((pt2 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
++ i8.u32[2] = i8.u32[2] +
++ (uint8_t)tbl[2] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[2]];
++ tbl[2] = *ptbl;
++ }
++ if (unlikely((pt2 >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
++ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
++ i8.u32[3] = i8.u32[3] +
++ (uint8_t)tbl[3] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
++ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[3]];
++ tbl[3] = *ptbl;
++ }
++
++ hop[0] = (tbl[0] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[0] & 0x00FFFFFF : defv;
++ hop[1] = (tbl[1] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[1] & 0x00FFFFFF : defv;
++ hop[2] = (tbl[2] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[2] & 0x00FFFFFF : defv;
++ hop[3] = (tbl[3] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[3] & 0x00FFFFFF : defv;
++}
++
++#ifdef __cplusplus
++}
++#endif
++
++#endif /* _RTE_LPM_ALTIVEC_H_ */
+--
+1.9.1
+