diff options
author | Luca Boccassi <luca.boccassi@gmail.com> | 2018-11-12 16:14:45 +0000 |
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committer | Luca Boccassi <luca.boccassi@gmail.com> | 2018-11-12 16:15:06 +0000 |
commit | 88fab00d4402af240c1b7cc2566133aece115488 (patch) | |
tree | 54525f2b8784dd20ce6886b429ef85d24df04532 /doc/guides/nics | |
parent | 8d01b9cd70a67cdafd5b965a70420c3bd7fb3f82 (diff) |
New upstream version 18.11-rc2upstream/18.11-rc2
Change-Id: I43ca4edd0747b2dfc38c574ebf3c0aac17d7392c
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'doc/guides/nics')
-rw-r--r-- | doc/guides/nics/features.rst | 2 | ||||
-rw-r--r-- | doc/guides/nics/i40e.rst | 7 | ||||
-rw-r--r-- | doc/guides/nics/mlx5.rst | 35 | ||||
-rw-r--r-- | doc/guides/nics/mvpp2.rst | 2 |
4 files changed, 43 insertions, 3 deletions
diff --git a/doc/guides/nics/features.rst b/doc/guides/nics/features.rst index 3fa5cb74..d3f90483 100644 --- a/doc/guides/nics/features.rst +++ b/doc/guides/nics/features.rst @@ -208,7 +208,7 @@ Supports TCP Segmentation Offloading. * **[uses] rte_eth_txconf,rte_eth_txmode**: ``offloads:DEV_TX_OFFLOAD_TCP_TSO``. * **[uses] rte_eth_desc_lim**: ``nb_seg_max``, ``nb_mtu_seg_max``. -* **[uses] mbuf**: ``mbuf.ol_flags:PKT_TX_TCP_SEG``. +* **[uses] mbuf**: ``mbuf.ol_flags:`` ``PKT_TX_TCP_SEG``, ``PKT_TX_IPV4``, ``PKT_TX_IPV6``, ``PKT_TX_IP_CKSUM``. * **[uses] mbuf**: ``mbuf.tso_segsz``, ``mbuf.l2_len``, ``mbuf.l3_len``, ``mbuf.l4_len``. * **[implements] datapath**: ``TSO functionality``. * **[provides] rte_eth_dev_info**: ``tx_offload_capa,tx_queue_offload_capa:DEV_TX_OFFLOAD_TCP_TSO,DEV_TX_OFFLOAD_UDP_TSO``. diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst index ab3928a6..bfacbd11 100644 --- a/doc/guides/nics/i40e.rst +++ b/doc/guides/nics/i40e.rst @@ -172,6 +172,13 @@ Runtime Config Options -w 84:00.0,use-latest-supported-vec=1 +Vector RX Pre-conditions +~~~~~~~~~~~~~~~~~~~~~~~~ +For Vector RX it is assumed that the number of descriptor rings will be a power +of 2. With this pre-condition, the ring pointer can easily scroll back to the +head after hitting the tail without a conditional check. In addition Vector RX +can use this assumption to do a bit mask using ``ring_size - 1``. + Driver compilation and testing ------------------------------ diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst index 67696283..7af5ead8 100644 --- a/doc/guides/nics/mlx5.rst +++ b/doc/guides/nics/mlx5.rst @@ -54,6 +54,7 @@ Features - Support for scattered TX and RX frames. - IPv4, IPv6, TCPv4, TCPv6, UDPv4 and UDPv6 RSS on any number of queues. - Several RSS hash keys, one for each flow type. +- Default RSS operation with no hash key specification. - Configurable RETA table. - Support for multiple MAC addresses. - VLAN filtering. @@ -246,6 +247,24 @@ Run-time configuration - x86_64 with ConnectX-4, ConnectX-4 LX, ConnectX-5 and Bluefield. - POWER8 and ARMv8 with ConnectX-4 LX, ConnectX-5 and Bluefield. +- ``rxq_cqe_pad_en`` parameter [int] + + A nonzero value enables 128B padding of CQE on RX side. The size of CQE + is aligned with the size of a cacheline of the core. If cacheline size is + 128B, the CQE size is configured to be 128B even though the device writes + only 64B data on the cacheline. This is to avoid unnecessary cache + invalidation by device's two consecutive writes on to one cacheline. + However in some architecture, it is more beneficial to update entire + cacheline with padding the rest 64B rather than striding because + read-modify-write could drop performance a lot. On the other hand, + writing extra data will consume more PCIe bandwidth and could also drop + the maximum throughput. It is recommended to empirically set this + parameter. Disabled by default. + + Supported on: + + - CPU having 128B cacheline with ConnectX-5 and Bluefield. + - ``mprq_en`` parameter [int] A nonzero value enables configuring Multi-Packet Rx queues. Rx queue is @@ -320,6 +339,20 @@ Run-time configuration - Set to 8 by default. +- ``txqs_max_vec`` parameter [int] + + Enable vectorized Tx only when the number of TX queues is less than or + equal to this value. Effective only when ``tx_vec_en`` is enabled. + + On ConnectX-5: + + - Set to 8 by default on ARMv8. + - Set to 4 by default otherwise. + + On Bluefield + + - Set to 16 by default. + - ``txq_mpw_en`` parameter [int] A nonzero value enables multi-packet send (MPS) for ConnectX-4 Lx and @@ -365,7 +398,7 @@ Run-time configuration - ``tx_vec_en`` parameter [int] A nonzero value enables Tx vector on ConnectX-5 and Bluefield NICs if the number of - global Tx queues on the port is lesser than MLX5_VPMD_MIN_TXQS. + global Tx queues on the port is less than ``txqs_max_vec``. This option cannot be used with certain offloads such as ``DEV_TX_OFFLOAD_TCP_TSO, DEV_TX_OFFLOAD_VXLAN_TNL_TSO, DEV_TX_OFFLOAD_GRE_TNL_TSO, DEV_TX_OFFLOAD_VLAN_INSERT``. diff --git a/doc/guides/nics/mvpp2.rst b/doc/guides/nics/mvpp2.rst index 82b9383e..b2ddeab5 100644 --- a/doc/guides/nics/mvpp2.rst +++ b/doc/guides/nics/mvpp2.rst @@ -644,7 +644,7 @@ Node which has a parent is called a leaf whereas node without parent is called a non-leaf (root). MVPP2 PMD supports two level hierarchy where level 0 represents ports and level 1 represents tx queues of a given port. -.. figure:: img/mvpp2_tm.svg +.. figure:: img/mvpp2_tm.* Nodes hold following types of settings: |