diff options
author | 2017-11-08 14:15:11 +0000 | |
---|---|---|
committer | 2017-11-08 14:45:54 +0000 | |
commit | 055c52583a2794da8ba1e85a48cce3832372b12f (patch) | |
tree | 8ceb1cb78fbb46a0f341f8ee24feb3c6b5540013 /drivers/bus/fslmc/mc/fsl_dpci_cmd.h | |
parent | f239aed5e674965691846e8ce3f187dd47523689 (diff) |
New upstream version 17.11-rc3
Change-Id: I6a5baa40612fe0c20f30b5fa773a6cbbac63a685
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'drivers/bus/fslmc/mc/fsl_dpci_cmd.h')
-rw-r--r-- | drivers/bus/fslmc/mc/fsl_dpci_cmd.h | 222 |
1 files changed, 120 insertions, 102 deletions
diff --git a/drivers/bus/fslmc/mc/fsl_dpci_cmd.h b/drivers/bus/fslmc/mc/fsl_dpci_cmd.h index 6d4e2730..73a551a5 100644 --- a/drivers/bus/fslmc/mc/fsl_dpci_cmd.h +++ b/drivers/bus/fslmc/mc/fsl_dpci_cmd.h @@ -40,108 +40,126 @@ #define _FSL_DPCI_CMD_H /* DPCI Version */ -#define DPCI_VER_MAJOR 3 -#define DPCI_VER_MINOR 3 +#define DPCI_VER_MAJOR 3 +#define DPCI_VER_MINOR 3 -/* Command IDs */ -#define DPCI_CMDID_CLOSE 0x8001 -#define DPCI_CMDID_OPEN 0x8071 -#define DPCI_CMDID_CREATE 0x9072 -#define DPCI_CMDID_DESTROY 0x9871 -#define DPCI_CMDID_GET_API_VERSION 0xa071 - -#define DPCI_CMDID_ENABLE 0x0021 -#define DPCI_CMDID_DISABLE 0x0031 -#define DPCI_CMDID_GET_ATTR 0x0041 -#define DPCI_CMDID_RESET 0x0051 -#define DPCI_CMDID_IS_ENABLED 0x0061 - -#define DPCI_CMDID_SET_IRQ_ENABLE 0x0121 -#define DPCI_CMDID_GET_IRQ_ENABLE 0x0131 -#define DPCI_CMDID_SET_IRQ_MASK 0x0141 -#define DPCI_CMDID_GET_IRQ_MASK 0x0151 -#define DPCI_CMDID_GET_IRQ_STATUS 0x0161 -#define DPCI_CMDID_CLEAR_IRQ_STATUS 0x0171 - -#define DPCI_CMDID_SET_RX_QUEUE 0x0e01 -#define DPCI_CMDID_GET_LINK_STATE 0x0e11 -#define DPCI_CMDID_GET_PEER_ATTR 0x0e21 -#define DPCI_CMDID_GET_RX_QUEUE 0x0e31 -#define DPCI_CMDID_GET_TX_QUEUE 0x0e41 -#define DPCI_CMDID_SET_OPR 0x0e51 -#define DPCI_CMDID_GET_OPR 0x0e61 - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_CMD_OPEN(cmd, dpci_id) \ - MC_CMD_OP(cmd, 0, 0, 32, int, dpci_id) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_CMD_CREATE(cmd, cfg) \ -do { \ - MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->num_of_priorities);\ - MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\ -} while (0) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_IS_ENABLED(cmd, en) \ - MC_RSP_OP(cmd, 0, 0, 1, int, en) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_ATTRIBUTES(cmd, attr) \ -do { \ - MC_RSP_OP(cmd, 0, 0, 32, int, (attr)->id);\ - MC_RSP_OP(cmd, 0, 48, 8, uint8_t, (attr)->num_of_priorities);\ -} while (0) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_PEER_ATTR(cmd, attr) \ -do { \ - MC_RSP_OP(cmd, 0, 0, 32, int, attr->peer_id);\ - MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->num_of_priorities);\ -} while (0) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_LINK_STATE(cmd, up) \ - MC_RSP_OP(cmd, 0, 0, 1, int, up) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_CMD_SET_RX_QUEUE(cmd, priority, cfg) \ -do { \ - MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id);\ - MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority);\ - MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority);\ - MC_CMD_OP(cmd, 0, 48, 4, enum dpci_dest, cfg->dest_cfg.dest_type);\ - MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx);\ - MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\ -} while (0) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_CMD_GET_RX_QUEUE(cmd, priority) \ - MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_RX_QUEUE(cmd, attr) \ -do { \ - MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id);\ - MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\ - MC_RSP_OP(cmd, 0, 48, 4, enum dpci_dest, attr->dest_cfg.dest_type);\ - MC_RSP_OP(cmd, 1, 0, 8, uint64_t, attr->user_ctx);\ - MC_RSP_OP(cmd, 2, 0, 32, uint32_t, attr->fqid);\ -} while (0) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_CMD_GET_TX_QUEUE(cmd, priority) \ - MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_TX_QUEUE(cmd, attr) \ - MC_RSP_OP(cmd, 0, 32, 32, uint32_t, attr->fqid) - -/* cmd, param, offset, width, type, arg_name */ -#define DPCI_RSP_GET_API_VERSION(cmd, major, minor) \ -do { \ - MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\ - MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\ -} while (0) +#define DPCI_CMD_BASE_VERSION 1 +#define DPCI_CMD_BASE_VERSION_V2 2 +#define DPCI_CMD_ID_OFFSET 4 + +#define DPCI_CMD_V1(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION) +#define DPCI_CMD_V2(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION_V2) +/* Command IDs */ +#define DPCI_CMDID_CLOSE DPCI_CMD_V1(0x800) +#define DPCI_CMDID_OPEN DPCI_CMD_V1(0x807) +#define DPCI_CMDID_CREATE DPCI_CMD_V2(0x907) +#define DPCI_CMDID_DESTROY DPCI_CMD_V1(0x987) +#define DPCI_CMDID_GET_API_VERSION DPCI_CMD_V1(0xa07) + +#define DPCI_CMDID_ENABLE DPCI_CMD_V1(0x002) +#define DPCI_CMDID_DISABLE DPCI_CMD_V1(0x003) +#define DPCI_CMDID_GET_ATTR DPCI_CMD_V1(0x004) +#define DPCI_CMDID_RESET DPCI_CMD_V1(0x005) +#define DPCI_CMDID_IS_ENABLED DPCI_CMD_V1(0x006) + +#define DPCI_CMDID_SET_RX_QUEUE DPCI_CMD_V1(0x0e0) +#define DPCI_CMDID_GET_LINK_STATE DPCI_CMD_V1(0x0e1) +#define DPCI_CMDID_GET_PEER_ATTR DPCI_CMD_V1(0x0e2) +#define DPCI_CMDID_GET_RX_QUEUE DPCI_CMD_V1(0x0e3) +#define DPCI_CMDID_GET_TX_QUEUE DPCI_CMD_V1(0x0e4) + +/* Macros for accessing command fields smaller than 1byte */ +#define DPCI_MASK(field) \ + GENMASK(DPCI_##field##_SHIFT + DPCI_##field##_SIZE - 1, \ + DPCI_##field##_SHIFT) +#define dpci_set_field(var, field, val) \ + ((var) |= (((val) << DPCI_##field##_SHIFT) & DPCI_MASK(field))) +#define dpci_get_field(var, field) \ + (((var) & DPCI_MASK(field)) >> DPCI_##field##_SHIFT) + +#pragma pack(push, 1) +struct dpci_cmd_open { + uint32_t dpci_id; +}; + +struct dpci_cmd_create { + uint8_t num_of_priorities; + uint8_t pad[15]; + uint32_t options; +}; + +struct dpci_cmd_destroy { + uint32_t dpci_id; +}; + +#define DPCI_ENABLE_SHIFT 0 +#define DPCI_ENABLE_SIZE 1 + +struct dpci_rsp_is_enabled { + /* only the LSB bit */ + uint8_t en; +}; + +struct dpci_rsp_get_attr { + uint32_t id; + uint16_t pad; + uint8_t num_of_priorities; +}; + +struct dpci_rsp_get_peer_attr { + uint32_t id; + uint32_t pad; + uint8_t num_of_priorities; +}; + +#define DPCI_UP_SHIFT 0 +#define DPCI_UP_SIZE 1 + +struct dpci_rsp_get_link_state { + /* only the LSB bit */ + uint8_t up; +}; + +#define DPCI_DEST_TYPE_SHIFT 0 +#define DPCI_DEST_TYPE_SIZE 4 + +struct dpci_cmd_set_rx_queue { + uint32_t dest_id; + uint8_t dest_priority; + uint8_t priority; + /* from LSB: dest_type:4 */ + uint8_t dest_type; + uint8_t pad; + uint64_t user_ctx; + uint32_t options; +}; + +struct dpci_cmd_get_queue { + uint8_t pad[5]; + uint8_t priority; +}; + +struct dpci_rsp_get_rx_queue { + uint32_t dest_id; + uint8_t dest_priority; + uint8_t pad; + /* from LSB: dest_type:4 */ + uint8_t dest_type; + uint8_t pad1; + uint64_t user_ctx; + uint32_t fqid; +}; + +struct dpci_rsp_get_tx_queue { + uint32_t pad; + uint32_t fqid; +}; + +struct dpci_rsp_get_api_version { + uint16_t major; + uint16_t minor; +}; + +#pragma pack(pop) #endif /* _FSL_DPCI_CMD_H */ |