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authorChristian Ehrhardt <christian.ehrhardt@canonical.com>2016-12-08 14:07:29 +0100
committerChristian Ehrhardt <christian.ehrhardt@canonical.com>2016-12-08 14:10:05 +0100
commit6b3e017e5d25f15da73f7700f7f2ac553ef1a2e9 (patch)
tree1b1fb3f903b2282e261ade69e3c17952b3fd3464 /drivers/net/ixgbe/base/ixgbe_phy.h
parent32e04ea00cd159613e04acef75e52bfca6eeff2f (diff)
Imported Upstream version 16.11
Change-Id: I1944c65ddc88a9ad70f8c0eb6731552b84fbcb77 Signed-off-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
Diffstat (limited to 'drivers/net/ixgbe/base/ixgbe_phy.h')
-rw-r--r--drivers/net/ixgbe/base/ixgbe_phy.h71
1 files changed, 69 insertions, 2 deletions
diff --git a/drivers/net/ixgbe/base/ixgbe_phy.h b/drivers/net/ixgbe/base/ixgbe_phy.h
index 281f9faf..da14abcd 100644
--- a/drivers/net/ixgbe/base/ixgbe_phy.h
+++ b/drivers/net/ixgbe/base/ixgbe_phy.h
@@ -92,8 +92,8 @@ POSSIBILITY OF SUCH DAMAGE.
#define IXGBE_CS4227_GLOBAL_ID_MSB 1
#define IXGBE_CS4227_SCRATCH 2
#define IXGBE_CS4227_GLOBAL_ID_VALUE 0x03E5
-#define IXGBE_CS4223_PHY_ID 0x7003/* Quad port */
-#define IXGBE_CS4227_PHY_ID 0x3003/* Dual port */
+#define IXGBE_CS4223_PHY_ID 0x7003 /* Quad port */
+#define IXGBE_CS4227_PHY_ID 0x3003 /* Dual port */
#define IXGBE_CS4227_RESET_PENDING 0x1357
#define IXGBE_CS4227_RESET_COMPLETE 0x5AA5
#define IXGBE_CS4227_RETRIES 15
@@ -154,6 +154,73 @@ POSSIBILITY OF SUCH DAMAGE.
/* SFP+ SFF-8472 Compliance */
#define IXGBE_SFF_SFF_8472_UNSUP 0x00
+/* More phy definitions */
+#define IXGBE_M88E1500_COPPER_CTRL 0 /* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_CTRL_RESET (1u << 15)
+#define IXGBE_M88E1500_COPPER_CTRL_AN_EN (1u << 12)
+#define IXGBE_M88E1500_COPPER_CTRL_POWER_DOWN (1u << 11)
+#define IXGBE_M88E1500_COPPER_CTRL_RESTART_AN (1u << 9)
+#define IXGBE_M88E1500_COPPER_CTRL_FULL_DUPLEX (1u << 8)
+#define IXGBE_M88E1500_COPPER_CTRL_SPEED_MSB (1u << 6)
+#define IXGBE_M88E1500_COPPER_STATUS 1 /* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_STATUS_AN_DONE (1u << 5)
+#define IXGBE_M88E1500_COPPER_AN 4 /* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_AN_AS_PAUSE (1u << 11)
+#define IXGBE_M88E1500_COPPER_AN_PAUSE (1u << 10)
+#define IXGBE_M88E1500_COPPER_AN_T4 (1u << 9)
+#define IXGBE_M88E1500_COPPER_AN_100TX_FD (1u << 8)
+#define IXGBE_M88E1500_COPPER_AN_100TX_HD (1u << 7)
+#define IXGBE_M88E1500_COPPER_AN_10TX_FD (1u << 6)
+#define IXGBE_M88E1500_COPPER_AN_10TX_HD (1u << 5)
+#define IXGBE_M88E1500_COPPER_AN_LP_ABILITY 5 /* Page 0 reg */
+#define IXGBE_M88E1500_COPPER_AN_LP_AS_PAUSE (1u << 11)
+#define IXGBE_M88E1500_COPPER_AN_LP_PAUSE (1u << 10)
+#define IXGBE_M88E1500_1000T_CTRL 9 /* Page 0 reg */
+/* 1=Configure PHY as Master 0=Configure PHY as Slave */
+#define IXGBE_M88E1500_1000T_CTRL_MS_VALUE (1u << 11)
+#define IXGBE_M88E1500_1000T_CTRL_1G_FD (1u << 9)
+/* 1=Master/Slave manual config value 0=Automatic Master/Slave config */
+#define IXGBE_M88E1500_1000T_CTRL_MS_ENABLE (1u << 12)
+#define IXGBE_M88E1500_1000T_CTRL_FULL_DUPLEX (1u << 9)
+#define IXGBE_M88E1500_1000T_CTRL_HALF_DUPLEX (1u << 8)
+#define IXGBE_M88E1500_1000T_STATUS 10 /* Page 0 reg */
+#define IXGBE_M88E1500_AUTO_COPPER_SGMII 0x2
+#define IXGBE_M88E1500_AUTO_COPPER_BASEX 0x3
+#define IXGBE_M88E1500_STATUS_LINK (1u << 2) /* Interface Link Bit */
+#define IXGBE_M88E1500_MAC_CTRL_1 16 /* Page 0 reg */
+#define IXGBE_M88E1500_MAC_CTRL_1_MODE_MASK 0x0380 /* Mode Select */
+#define IXGBE_M88E1500_MAC_CTRL_1_DWN_SHIFT 12
+#define IXGBE_M88E1500_MAC_CTRL_1_DWN_4X 3u
+#define IXGBE_M88E1500_MAC_CTRL_1_ED_SHIFT 8
+#define IXGBE_M88E1500_MAC_CTRL_1_ED_TM 3u
+#define IXGBE_M88E1500_MAC_CTRL_1_MDIX_SHIFT 5
+#define IXGBE_M88E1500_MAC_CTRL_1_MDIX_AUTO 3u
+#define IXGBE_M88E1500_MAC_CTRL_1_POWER_DOWN (1u << 2)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS 17 /* Page 0 reg */
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_SHIFT 14
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_MASK 3u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_10 0u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_100 1u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_SPEED_1000 2u
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_DUPLEX (1u << 13)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_RESOLVED (1u << 11)
+#define IXGBE_M88E1500_PHY_SPEC_STATUS_LINK (1u << 10)
+#define IXGBE_M88E1500_PAGE_ADDR 22 /* All pages reg */
+#define IXGBE_M88E1500_FIBER_CTRL 0 /* Page 1 reg */
+#define IXGBE_M88E1500_FIBER_CTRL_RESET (1u << 15)
+#define IXGBE_M88E1500_FIBER_CTRL_SPEED_LSB (1u << 13)
+#define IXGBE_M88E1500_FIBER_CTRL_AN_EN (1u << 12)
+#define IXGBE_M88E1500_FIBER_CTRL_POWER_DOWN (1u << 11)
+#define IXGBE_M88E1500_FIBER_CTRL_DUPLEX_FULL (1u << 8)
+#define IXGBE_M88E1500_FIBER_CTRL_SPEED_MSB (1u << 6)
+#define IXGBE_M88E1500_MAC_SPEC_CTRL 16 /* Page 2 reg */
+#define IXGBE_M88E1500_MAC_SPEC_CTRL_POWER_DOWN (1u << 3)
+#define IXGBE_M88E1500_EEE_CTRL_1 0 /* Page 18 reg */
+#define IXGBE_M88E1500_EEE_CTRL_1_MS (1u << 0) /* EEE Master/Slave */
+#define IXGBE_M88E1500_GEN_CTRL 20 /* Page 18 reg */
+#define IXGBE_M88E1500_GEN_CTRL_RESET (1u << 15)
+#define IXGBE_M88E1500_GEN_CTRL_MODE_SGMII_COPPER 1u /* Mode bits 0-2 */
+
s32 ixgbe_init_phy_ops_generic(struct ixgbe_hw *hw);
bool ixgbe_validate_phy_addr(struct ixgbe_hw *hw, u32 phy_addr);
enum ixgbe_phy_type ixgbe_get_phy_type_from_id(u32 phy_id);