diff options
author | Luca Boccassi <luca.boccassi@gmail.com> | 2018-03-07 11:22:30 +0000 |
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committer | Luca Boccassi <luca.boccassi@gmail.com> | 2018-03-07 11:23:17 +0000 |
commit | c3f15def2ebe9cc255cf0e5cf32aa171f5b4326d (patch) | |
tree | 8c8fc77df57bca8c0bfe4d0e8797879e12c6d6f9 /drivers/net/mlx4/mlx4_rxtx.c | |
parent | 169a9de21e263aa6599cdc2d87a45ae158d9f509 (diff) |
New upstream version 17.11.1upstream/17.11.1
Change-Id: Ida1700b5dac8649fc563670a37278e636bea051c
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'drivers/net/mlx4/mlx4_rxtx.c')
-rw-r--r-- | drivers/net/mlx4/mlx4_rxtx.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c index 2bfa8b1b..92b62577 100644 --- a/drivers/net/mlx4/mlx4_rxtx.c +++ b/drivers/net/mlx4/mlx4_rxtx.c @@ -88,7 +88,8 @@ uint32_t mlx4_ptype_table[0x100] __rte_cache_aligned = { * giving a total of up to 256 entries. */ [0x00] = RTE_PTYPE_L2_ETHER, - [0x01] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN, + [0x01] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | + RTE_PTYPE_L4_NONFRAG, [0x02] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG, [0x03] = RTE_PTYPE_L2_ETHER | RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | @@ -468,7 +469,6 @@ mlx4_tx_burst_segs(struct rte_mbuf *buf, struct txq *txq, /* Memory region key (big endian) for this memory pool. */ lkey = mlx4_txq_mp2mr(txq, mlx4_txq_mb2mp(sbuf)); dseg->lkey = rte_cpu_to_be_32(lkey); -#ifndef NDEBUG /* Calculate the needed work queue entry size for this packet */ if (unlikely(dseg->lkey == rte_cpu_to_be_32((uint32_t)-1))) { /* MR does not exist. */ @@ -486,7 +486,6 @@ mlx4_tx_burst_segs(struct rte_mbuf *buf, struct txq *txq, (sq->head & sq->txbb_cnt) ? 0 : 1); return -1; } -#endif /* NDEBUG */ if (likely(sbuf->data_len)) { byte_count = rte_cpu_to_be_32(sbuf->data_len); } else { @@ -636,7 +635,6 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) /* Memory region key (big endian). */ lkey = mlx4_txq_mp2mr(txq, mlx4_txq_mb2mp(buf)); dseg->lkey = rte_cpu_to_be_32(lkey); -#ifndef NDEBUG if (unlikely(dseg->lkey == rte_cpu_to_be_32((uint32_t)-1))) { /* MR does not exist. */ @@ -655,7 +653,6 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n) elt->buf = NULL; break; } -#endif /* NDEBUG */ /* Never be TXBB aligned, no need compiler barrier. */ dseg->byte_count = rte_cpu_to_be_32(buf->data_len); /* Fill the control parameters for this packet. */ |