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| author |   Luca Boccassi <luca.boccassi@gmail.com> | 2018-11-01 11:59:50 +0000 |
|---|---|---|
| committer | Luca Boccassi <luca.boccassi@gmail.com> | 2018-11-01 12:00:19 +0000 |
| commit | 8d01b9cd70a67cdafd5b965a70420c3bd7fb3f82 (patch) | |
| tree | 208e3bc33c220854d89d010e3abf720a2e62e546 /drivers/net/octeontx/base/octeontx_io.h | |
| parent | b63264c8342e6a1b6971c79550d2af2024b6a4de (diff) | |
New upstream version 18.11-rc1upstream/18.11-rc1
Change-Id: Iaa71986dd6332e878d8f4bf493101b2bbc6313bb
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'drivers/net/octeontx/base/octeontx_io.h')
| -rw-r--r-- | drivers/net/octeontx/base/octeontx_io.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/octeontx/base/octeontx_io.h b/drivers/net/octeontx/base/octeontx_io.h index d51ded23..04b9ce19 100644 --- a/drivers/net/octeontx/base/octeontx_io.h +++ b/drivers/net/octeontx/base/octeontx_io.h @@ -10,7 +10,7 @@ #include <rte_io.h> -/* In Cavium OcteonTX SoC, all accesses to the device registers are +/* In Cavium OCTEON TX SoC, all accesses to the device registers are * implicitly strongly ordered. So, The relaxed version of IO operation is * safe to use with out any IO memory barriers. */ |