diff options
author | 2018-08-14 18:52:30 +0100 | |
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committer | 2018-08-14 18:53:17 +0100 | |
commit | b63264c8342e6a1b6971c79550d2af2024b6a4de (patch) | |
tree | 83114aac64286fe616506c0b3dfaec2ab86ef835 /drivers/net/sfc/sfc_ef10.h | |
parent | ca33590b6af032bff57d9cc70455660466a654b2 (diff) |
New upstream version 18.08upstream/18.08
Change-Id: I32fdf5e5016556d9c0a6d88ddaf1fc468961790a
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'drivers/net/sfc/sfc_ef10.h')
-rw-r--r-- | drivers/net/sfc/sfc_ef10.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/sfc/sfc_ef10.h b/drivers/net/sfc/sfc_ef10.h index ace6a1dd..a73e0bde 100644 --- a/drivers/net/sfc/sfc_ef10.h +++ b/drivers/net/sfc/sfc_ef10.h @@ -79,6 +79,40 @@ sfc_ef10_ev_present(const efx_qword_t ev) ~EFX_QWORD_FIELD(ev, EFX_DWORD_1); } + +/** + * Alignment requirement for value written to RX WPTR: + * the WPTR must be aligned to an 8 descriptor boundary. + */ +#define SFC_EF10_RX_WPTR_ALIGN 8u + +static inline void +sfc_ef10_rx_qpush(volatile void *doorbell, unsigned int added, + unsigned int ptr_mask) +{ + efx_dword_t dword; + + /* Hardware has alignment restriction for WPTR */ + RTE_BUILD_BUG_ON(SFC_RX_REFILL_BULK % SFC_EF10_RX_WPTR_ALIGN != 0); + SFC_ASSERT(RTE_ALIGN(added, SFC_EF10_RX_WPTR_ALIGN) == added); + + EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, added & ptr_mask); + + /* DMA sync to device is not required */ + + /* + * rte_write32() has rte_io_wmb() which guarantees that the STORE + * operations (i.e. Rx and event descriptor updates) that precede + * the rte_io_wmb() call are visible to NIC before the STORE + * operations that follow it (i.e. doorbell write). + */ + rte_write32(dword.ed_u32[0], doorbell); +} + + +const uint32_t * sfc_ef10_supported_ptypes_get(uint32_t tunnel_encaps); + + #ifdef __cplusplus } #endif |