New upstream version 17.11~rc4

Change-Id: I5cc288310eaa28cb8c2e475afce5e19f8c08ba1e
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>

33 files changed, 337 insertions, 144 deletions

diff --git a/drivers/bus/pci/bsd/pci.c b/drivers/bus/pci/bsd/pci.c
index facc4b12..b8e21784 100644
--- a/drivers/bus/pci/bsd/pci.c
+++ b/drivers/bus/pci/bsd/pci.c
@@ -75,7 +75,7 @@
 
 /**
  * @file
- * PCI probing under linux
+ * PCI probing under BSD
  *
  * This code is used to simulate a PCI probe by parsing information in
  * sysfs. Moreover, when a registered driver matches a device, the
diff --git a/drivers/net/ark/ark_ethdev_rx.c b/drivers/net/ark/ark_ethdev_rx.c
index a3c0377c..987d085e 100644
--- a/drivers/net/ark/ark_ethdev_rx.c
+++ b/drivers/net/ark/ark_ethdev_rx.c
@@ -356,7 +356,7 @@ eth_ark_rx_jumbo(struct ark_rx_queue *queue,
 
 	uint16_t remaining;
 	uint16_t data_len;
-	uint8_t segments;
+	uint16_t segments;
 
 	/* first buf populated by called */
 	mbuf_prev = mbuf0;
diff --git a/drivers/net/bnxt/bnxt.h b/drivers/net/bnxt/bnxt.h
index 646fe79e..8ab1c7f8 100644
--- a/drivers/net/bnxt/bnxt.h
+++ b/drivers/net/bnxt/bnxt.h
@@ -164,6 +164,8 @@ struct bnxt_link_info {
 	uint16_t		auto_link_speed;
 	uint16_t		auto_link_speed_mask;
 	uint32_t		preemphasis;
+	uint8_t			phy_type;
+	uint8_t			media_type;
 };
 
 #define BNXT_COS_QUEUE_COUNT	8
diff --git a/drivers/net/bnxt/bnxt_cpr.c b/drivers/net/bnxt/bnxt_cpr.c
index 26b2755e..19c684ca 100644
--- a/drivers/net/bnxt/bnxt_cpr.c
+++ b/drivers/net/bnxt/bnxt_cpr.c
@@ -55,7 +55,7 @@ void bnxt_handle_async_event(struct bnxt *bp,
 	case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_STATUS_CHANGE:
 	case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CHANGE:
 	case HWRM_ASYNC_EVENT_CMPL_EVENT_ID_LINK_SPEED_CFG_CHANGE:
-		bnxt_link_update_op(bp->eth_dev, 0);
+		bnxt_link_update_op(bp->eth_dev, 1);
 		break;
 	default:
 		RTE_LOG(DEBUG, PMD, "handle_async_event id = 0x%x\n", event_id);
diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c
index e8c7d0e7..3b6813cb 100644
--- a/drivers/net/bnxt/bnxt_ethdev.c
+++ b/drivers/net/bnxt/bnxt_ethdev.c
@@ -146,6 +146,7 @@ static const struct rte_pci_id bnxt_pci_id_map[] = {
 	ETH_RSS_NONFRAG_IPV6_UDP)
 
 static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
+static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 
 /***********************/
 
@@ -370,6 +371,7 @@ static int bnxt_init_chip(struct bnxt *bp)
 			goto err_out;
 		}
 	}
+	bnxt_print_link_info(bp->eth_dev);
 
 	return 0;
 
@@ -533,20 +535,6 @@ static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 	return 0;
 }
 
-static inline int
-rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
-				struct rte_eth_link *link)
-{
-	struct rte_eth_link *dst = &eth_dev->data->dev_link;
-	struct rte_eth_link *src = link;
-
-	if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
-					*(uint64_t *)src) == 0)
-		return 1;
-
-	return 0;
-}
-
 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 {
 	struct rte_eth_link *link = &eth_dev->data->dev_link;
@@ -585,7 +573,7 @@ static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 	if (rc)
 		goto error;
 
-	bnxt_link_update_op(eth_dev, 0);
+	bnxt_link_update_op(eth_dev, 1);
 
 	if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 		vlan_mask |= ETH_VLAN_FILTER_MASK;
@@ -607,9 +595,14 @@ error:
 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 {
 	struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
+	int rc = 0;
 
-	eth_dev->data->dev_link.link_status = 1;
-	bnxt_set_hwrm_link_config(bp, true);
+	if (!bp->link_info.link_up)
+		rc = bnxt_set_hwrm_link_config(bp, true);
+	if (!rc)
+		eth_dev->data->dev_link.link_status = 1;
+
+	bnxt_print_link_info(eth_dev);
 	return 0;
 }
 
@@ -619,6 +612,8 @@ static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 
 	eth_dev->data->dev_link.link_status = 0;
 	bnxt_set_hwrm_link_config(bp, false);
+	bp->link_info.link_up = 0;
+
 	return 0;
 }
 
@@ -760,7 +755,8 @@ out:
 	/* Timed out or success */
 	if (new.link_status != eth_dev->data->dev_link.link_status ||
 	new.link_speed != eth_dev->data->dev_link.link_speed) {
-		rte_bnxt_atomic_write_link_status(eth_dev, &new);
+		memcpy(&eth_dev->data->dev_link, &new,
+			sizeof(struct rte_eth_link));
 		bnxt_print_link_info(eth_dev);
 	}
 
@@ -1956,25 +1952,29 @@ parse_ntuple_filter(struct bnxt *bp,
 }
 
 static struct bnxt_filter_info*
-bnxt_match_ntuple_filter(struct bnxt_vnic_info *vnic,
+bnxt_match_ntuple_filter(struct bnxt *bp,
 			 struct bnxt_filter_info *bfilter)
 {
 	struct bnxt_filter_info *mfilter = NULL;
+	int i;
 
-	STAILQ_FOREACH(mfilter, &vnic->filter, next) {
-		if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
-		    bfilter->src_ipaddr_mask[0] ==
-		    mfilter->src_ipaddr_mask[0] &&
-		    bfilter->src_port == mfilter->src_port &&
-		    bfilter->src_port_mask == mfilter->src_port_mask &&
-		    bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
-		    bfilter->dst_ipaddr_mask[0] ==
-		    mfilter->dst_ipaddr_mask[0] &&
-		    bfilter->dst_port == mfilter->dst_port &&
-		    bfilter->dst_port_mask == mfilter->dst_port_mask &&
-		    bfilter->flags == mfilter->flags &&
-		    bfilter->enables == mfilter->enables)
-			return mfilter;
+	for (i = bp->nr_vnics - 1; i >= 0; i--) {
+		struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
+		STAILQ_FOREACH(mfilter, &vnic->filter, next) {
+			if (bfilter->src_ipaddr[0] == mfilter->src_ipaddr[0] &&
+			    bfilter->src_ipaddr_mask[0] ==
+			    mfilter->src_ipaddr_mask[0] &&
+			    bfilter->src_port == mfilter->src_port &&
+			    bfilter->src_port_mask == mfilter->src_port_mask &&
+			    bfilter->dst_ipaddr[0] == mfilter->dst_ipaddr[0] &&
+			    bfilter->dst_ipaddr_mask[0] ==
+			    mfilter->dst_ipaddr_mask[0] &&
+			    bfilter->dst_port == mfilter->dst_port &&
+			    bfilter->dst_port_mask == mfilter->dst_port_mask &&
+			    bfilter->flags == mfilter->flags &&
+			    bfilter->enables == mfilter->enables)
+				return mfilter;
+		}
 	}
 	return NULL;
 }
@@ -2023,7 +2023,7 @@ bnxt_cfg_ntuple_filter(struct bnxt *bp,
 	bfilter->ethertype = 0x800;
 	bfilter->enables |= NTUPLE_FLTR_ALLOC_INPUT_EN_ETHERTYPE;
 
-	mfilter = bnxt_match_ntuple_filter(vnic, bfilter);
+	mfilter = bnxt_match_ntuple_filter(bp, bfilter);
 
 	if (mfilter != NULL && filter_op == RTE_ETH_FILTER_ADD) {
 		RTE_LOG(ERR, PMD, "filter exists.");
diff --git a/drivers/net/bnxt/bnxt_hwrm.c b/drivers/net/bnxt/bnxt_hwrm.c
index bf1fb469..d2c800dd 100644
--- a/drivers/net/bnxt/bnxt_hwrm.c
+++ b/drivers/net/bnxt/bnxt_hwrm.c
@@ -550,7 +550,7 @@ int bnxt_hwrm_func_driver_register(struct bnxt *bp)
 	}
 
 	req.async_event_fwd[0] |= rte_cpu_to_le_32(0x1);   /* TODO: Use MACRO */
-	memset(req.async_event_fwd, 0xff, sizeof(req.async_event_fwd));
+	//memset(req.async_event_fwd, 0xff, sizeof(req.async_event_fwd));
 
 	rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
 
@@ -715,34 +715,38 @@ static int bnxt_hwrm_port_phy_cfg(struct bnxt *bp, struct bnxt_link_info *conf)
 	struct hwrm_port_phy_cfg_input req = {0};
 	struct hwrm_port_phy_cfg_output *resp = bp->hwrm_cmd_resp_addr;
 	uint32_t enables = 0;
-	uint32_t link_speed_mask =
-		HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK;
 
 	HWRM_PREP(req, PORT_PHY_CFG);
 
 	if (conf->link_up) {
+		/* Setting Fixed Speed. But AutoNeg is ON, So disable it */
+		if (bp->link_info.auto_mode && conf->link_speed) {
+			req.auto_mode = HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_NONE;
+			RTE_LOG(DEBUG, PMD, "Disabling AutoNeg\n");
+		}
+
 		req.flags = rte_cpu_to_le_32(conf->phy_flags);
 		req.force_link_speed = rte_cpu_to_le_16(conf->link_speed);
+		enables |= HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE;
 		/*
 		 * Note, ChiMP FW 20.2.1 and 20.2.2 return an error when we set
 		 * any auto mode, even "none".
 		 */
 		if (!conf->link_speed) {
-			req.auto_mode = conf->auto_mode;
-			enables |= HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_MODE;
-			if (conf->auto_mode ==
-			    HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK) {
-				req.auto_link_speed_mask =
-					conf->auto_link_speed_mask;
-				enables |= link_speed_mask;
-			}
-			if (bp->link_info.auto_link_speed) {
-				req.auto_link_speed =
-					bp->link_info.auto_link_speed;
-				enables |=
-				HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED;
-			}
+			/* No speeds specified. Enable AutoNeg - all speeds */
+			req.auto_mode =
+				HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_ALL_SPEEDS;
 		}
+		/* AutoNeg - Advertise speeds specified. */
+		if (conf->auto_link_speed_mask) {
+			req.auto_mode =
+				HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK;
+			req.auto_link_speed_mask =
+				conf->auto_link_speed_mask;
+			enables |=
+			HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_LINK_SPEED_MASK;
+		}
+
 		req.auto_duplex = conf->duplex;
 		enables |= HWRM_PORT_PHY_CFG_INPUT_ENABLES_AUTO_DUPLEX;
 		req.auto_pause = conf->auto_pause;
@@ -791,6 +795,8 @@ static int bnxt_hwrm_port_phy_qcfg(struct bnxt *bp,
 	link_info->auto_pause = resp->auto_pause;
 	link_info->force_pause = resp->force_pause;
 	link_info->auto_mode = resp->auto_mode;
+	link_info->phy_type = resp->phy_type;
+	link_info->media_type = resp->media_type;
 
 	link_info->support_speeds = rte_le_to_cpu_16(resp->support_speeds);
 	link_info->auto_link_speed = rte_le_to_cpu_16(resp->auto_link_speed);
@@ -1886,6 +1892,11 @@ static uint16_t bnxt_parse_eth_link_duplex(uint32_t conf_link_speed)
 	return hw_link_duplex;
 }
 
+static uint16_t bnxt_check_eth_link_autoneg(uint32_t conf_link)
+{
+	return (conf_link & ETH_LINK_SPEED_FIXED) ? 0 : 1;
+}
+
 static uint16_t bnxt_parse_eth_link_speed(uint32_t conf_link_speed)
 {
 	uint16_t eth_link_speed = 0;
@@ -2094,7 +2105,7 @@ int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up)
 	int rc = 0;
 	struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 	struct bnxt_link_info link_req;
-	uint16_t speed;
+	uint16_t speed, autoneg;
 
 	if (BNXT_NPAR_PF(bp) || BNXT_VF(bp))
 		return 0;
@@ -2109,20 +2120,28 @@ int bnxt_set_hwrm_link_config(struct bnxt *bp, bool link_up)
 	if (!link_up)
 		goto port_phy_cfg;
 
+	autoneg = bnxt_check_eth_link_autoneg(dev_conf->link_speeds);
 	speed = bnxt_parse_eth_link_speed(dev_conf->link_speeds);
 	link_req.phy_flags = HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESET_PHY;
-	if (speed == 0) {
+	if (autoneg == 1) {
 		link_req.phy_flags |=
 				HWRM_PORT_PHY_CFG_INPUT_FLAGS_RESTART_AUTONEG;
-		link_req.auto_mode =
-				HWRM_PORT_PHY_CFG_INPUT_AUTO_MODE_SPEED_MASK;
 		link_req.auto_link_speed_mask =
 			bnxt_parse_eth_link_speed_mask(bp,
 						       dev_conf->link_speeds);
 	} else {
+		if (bp->link_info.phy_type ==
+		    HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASET ||
+		    bp->link_info.phy_type ==
+		    HWRM_PORT_PHY_QCFG_OUTPUT_PHY_TYPE_BASETE ||
+		    bp->link_info.media_type ==
+		    HWRM_PORT_PHY_QCFG_OUTPUT_MEDIA_TYPE_TP) {
+			RTE_LOG(ERR, PMD, "10GBase-T devices must autoneg\n");
+			return -EINVAL;
+		}
+
 		link_req.phy_flags |= HWRM_PORT_PHY_CFG_INPUT_FLAGS_FORCE;
 		link_req.link_speed = speed;
-		RTE_LOG(INFO, PMD, "Set Link Speed %x\n", speed);
 	}
 	link_req.duplex = bnxt_parse_eth_link_duplex(dev_conf->link_speeds);
 	link_req.auto_pause = bp->link_info.auto_pause;
diff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c
index 02d9e579..91b5bb03 100644
--- a/drivers/net/i40e/i40e_ethdev_vf.c
+++ b/drivers/net/i40e/i40e_ethdev_vf.c
@@ -650,7 +650,8 @@ i40evf_config_irq_map(struct rte_eth_dev *dev)
 	uint32_t vector_id;
 	int i, err;
 
-	if (rte_intr_allow_others(intr_handle))
+	if (dev->data->dev_conf.intr_conf.rxq != 0 &&
+	    rte_intr_allow_others(intr_handle))
 		vector_id = I40E_RX_VEC_START;
 	else
 		vector_id = I40E_MISC_VEC_ID;
diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c
index 8b4f612f..ad06b71e 100644
--- a/drivers/net/i40e/i40e_rxtx.c
+++ b/drivers/net/i40e/i40e_rxtx.c
@@ -1473,13 +1473,10 @@ i40e_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
 		m = tx_pkts[i];
 		ol_flags = m->ol_flags;
 
-		/**
-		 * m->nb_segs is uint8_t, so nb_segs is always less than
-		 * I40E_TX_MAX_SEG.
-		 * We check only a condition for nb_segs > I40E_TX_MAX_MTU_SEG.
-		 */
+		/* Check for m->nb_segs to not exceed the limits. */
 		if (!(ol_flags & PKT_TX_TCP_SEG)) {
-			if (m->nb_segs > I40E_TX_MAX_MTU_SEG) {
+			if (m->nb_segs > I40E_TX_MAX_SEG ||
+			    m->nb_segs > I40E_TX_MAX_MTU_SEG) {
 				rte_errno = -EINVAL;
 				return i;
 			}
diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c
index 012d9ee8..9bc84624 100644
--- a/drivers/net/ixgbe/ixgbe_rxtx.c
+++ b/drivers/net/ixgbe/ixgbe_rxtx.c
@@ -2639,7 +2639,7 @@ ixgbe_dev_tx_queue_setup(struct rte_eth_dev *dev,
 static void __attribute__((cold))
 ixgbe_free_sc_cluster(struct rte_mbuf *m)
 {
-	uint8_t i, nb_segs = m->nb_segs;
+	uint16_t i, nb_segs = m->nb_segs;
 	struct rte_mbuf *next_seg;
 
 	for (i = 0; i < nb_segs; i++) {
diff --git a/drivers/net/liquidio/base/lio_23xx_vf.c b/drivers/net/liquidio/base/lio_23xx_vf.c
index 99780178..e30c20dc 100644
--- a/drivers/net/liquidio/base/lio_23xx_vf.c
+++ b/drivers/net/liquidio/base/lio_23xx_vf.c
@@ -379,6 +379,25 @@ cn23xx_vf_disable_io_queues(struct lio_device *lio_dev)
 	cn23xx_vf_reset_io_queues(lio_dev, num_queues);
 }
 
+void
+cn23xx_vf_ask_pf_to_do_flr(struct lio_device *lio_dev)
+{
+	struct lio_mbox_cmd mbox_cmd;
+
+	memset(&mbox_cmd, 0, sizeof(struct lio_mbox_cmd));
+	mbox_cmd.msg.s.type = LIO_MBOX_REQUEST;
+	mbox_cmd.msg.s.resp_needed = 0;
+	mbox_cmd.msg.s.cmd = LIO_VF_FLR_REQUEST;
+	mbox_cmd.msg.s.len = 1;
+	mbox_cmd.q_no = 0;
+	mbox_cmd.recv_len = 0;
+	mbox_cmd.recv_status = 0;
+	mbox_cmd.fn = NULL;
+	mbox_cmd.fn_arg = 0;
+
+	lio_mbox_write(lio_dev, &mbox_cmd);
+}
+
 static void
 cn23xx_pfvf_hs_callback(struct lio_device *lio_dev,
 			struct lio_mbox_cmd *cmd, void *arg)
diff --git a/drivers/net/liquidio/base/lio_23xx_vf.h b/drivers/net/liquidio/base/lio_23xx_vf.h
index 83dc053a..ad8db0df 100644
--- a/drivers/net/liquidio/base/lio_23xx_vf.h
+++ b/drivers/net/liquidio/base/lio_23xx_vf.h
@@ -87,6 +87,8 @@ int cn23xx_vf_set_io_queues_off(struct lio_device *lio_dev);
 
 #define CN23XX_VF_BUSY_READING_REG_LOOP_COUNT	100000
 
+void cn23xx_vf_ask_pf_to_do_flr(struct lio_device *lio_dev);
+
 int cn23xx_pfvf_handshake(struct lio_device *lio_dev);
 
 int cn23xx_vf_setup_device(struct lio_device  *lio_dev);
diff --git a/drivers/net/liquidio/base/lio_hw_defs.h b/drivers/net/liquidio/base/lio_hw_defs.h
index d4cd23ce..fe5c3bbb 100644
--- a/drivers/net/liquidio/base/lio_hw_defs.h
+++ b/drivers/net/liquidio/base/lio_hw_defs.h
@@ -80,6 +80,9 @@
 /* Max IOQs per LIO Link */
 #define LIO_MAX_IOQS_PER_IF			64
 
+/* Wait time in milliseconds for FLR */
+#define LIO_PCI_FLR_WAIT			100
+
 enum lio_card_type {
 	LIO_23XX /* 23xx */
 };
diff --git a/drivers/net/liquidio/base/lio_mbox.h b/drivers/net/liquidio/base/lio_mbox.h
index f1c5b8ec..b0875d64 100644
--- a/drivers/net/liquidio/base/lio_mbox.h
+++ b/drivers/net/liquidio/base/lio_mbox.h
@@ -43,6 +43,7 @@
 #define LIO_MBOX_DATA_MAX			32
 
 #define LIO_VF_ACTIVE				0x1
+#define LIO_VF_FLR_REQUEST			0x2
 #define LIO_CORES_CRASHED			0x3
 
 /* Macro for Read acknowledgment */
diff --git a/drivers/net/liquidio/lio_ethdev.c b/drivers/net/liquidio/lio_ethdev.c
index 4b189661..84b8a328 100644
--- a/drivers/net/liquidio/lio_ethdev.c
+++ b/drivers/net/liquidio/lio_ethdev.c
@@ -1636,6 +1636,11 @@ lio_dev_close(struct rte_eth_dev *eth_dev)
 		rte_write32(pkt_count, droq->pkts_sent_reg);
 	}
 
+	if (lio_dev->pci_dev->kdrv == RTE_KDRV_IGB_UIO) {
+		cn23xx_vf_ask_pf_to_do_flr(lio_dev);
+		rte_delay_ms(LIO_PCI_FLR_WAIT);
+	}
+
 	/* lio_free_mbox */
 	lio_dev->fn_list.free_mbox(lio_dev);
 
@@ -2009,6 +2014,13 @@ lio_first_time_init(struct lio_device *lio_dev,
 	if (cn23xx_pfvf_handshake(lio_dev))
 		goto error;
 
+	/* Request and wait for device reset. */
+	if (pdev->kdrv == RTE_KDRV_IGB_UIO) {
+		cn23xx_vf_ask_pf_to_do_flr(lio_dev);
+		/* FLR wait time doubled as a precaution. */
+		rte_delay_ms(LIO_PCI_FLR_WAIT * 2);
+	}
+
 	if (cn23xx_vf_set_io_queues_off(lio_dev)) {
 		lio_dev_err(lio_dev, "Setting io queues off failed\n");
 		goto error;
diff --git a/drivers/net/mlx4/mlx4_ethdev.c b/drivers/net/mlx4/mlx4_ethdev.c
index c2ea4db1..2f69e7d4 100644
--- a/drivers/net/mlx4/mlx4_ethdev.c
+++ b/drivers/net/mlx4/mlx4_ethdev.c
@@ -1036,12 +1036,27 @@ mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)
 		RTE_PTYPE_L4_FRAG,
 		RTE_PTYPE_L4_TCP,
 		RTE_PTYPE_L4_UDP,
+		RTE_PTYPE_UNKNOWN
+	};
+	static const uint32_t ptypes_l2tun[] = {
+		/* refers to rxq_cq_to_pkt_type() */
+		RTE_PTYPE_L2_ETHER,
+		RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
+		RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
+		RTE_PTYPE_L4_FRAG,
+		RTE_PTYPE_L4_TCP,
+		RTE_PTYPE_L4_UDP,
 		RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
 		RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
 		RTE_PTYPE_UNKNOWN
 	};
+	struct priv *priv = dev->data->dev_private;
 
-	if (dev->rx_pkt_burst == mlx4_rx_burst)
-		return ptypes;
+	if (dev->rx_pkt_burst == mlx4_rx_burst) {
+		if (priv->hw_csum_l2tun)
+			return ptypes_l2tun;
+		else
+			return ptypes;
+	}
 	return NULL;
 }
diff --git a/drivers/net/mlx4/mlx4_intr.c b/drivers/net/mlx4/mlx4_intr.c
index b17d109a..50d19769 100644
--- a/drivers/net/mlx4/mlx4_intr.c
+++ b/drivers/net/mlx4/mlx4_intr.c
@@ -98,7 +98,7 @@ mlx4_rx_intr_vec_enable(struct priv *priv)
 	struct rte_intr_handle *intr_handle = &priv->intr_handle;
 
 	mlx4_rx_intr_vec_disable(priv);
-	intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
+	intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 	if (intr_handle->intr_vec == NULL) {
 		rte_errno = ENOMEM;
 		ERROR("failed to allocate memory for interrupt vector,"
diff --git a/drivers/net/mlx4/mlx4_rxq.c b/drivers/net/mlx4/mlx4_rxq.c
index 8b97a894..53313c56 100644
--- a/drivers/net/mlx4/mlx4_rxq.c
+++ b/drivers/net/mlx4/mlx4_rxq.c
@@ -750,6 +750,7 @@ mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,
 			 dev->data->dev_conf.rxmode.hw_ip_checksum),
 		.csum_l2tun = (priv->hw_csum_l2tun &&
 			       dev->data->dev_conf.rxmode.hw_ip_checksum),
+		.l2tun_offload = priv->hw_csum_l2tun,
 		.stats = {
 			.idx = idx,
 		},
diff --git a/drivers/net/mlx4/mlx4_rxtx.c b/drivers/net/mlx4/mlx4_rxtx.c
index 3985e06d..2bfa8b1b 100644
--- a/drivers/net/mlx4/mlx4_rxtx.c
+++ b/drivers/net/mlx4/mlx4_rxtx.c
@@ -336,6 +336,7 @@ mlx4_txq_complete(struct txq *txq, const unsigned int elts_n,
 {
 	unsigned int elts_comp = txq->elts_comp;
 	unsigned int elts_tail = txq->elts_tail;
+	unsigned int sq_tail = sq->tail;
 	struct mlx4_cq *cq = &txq->mcq;
 	volatile struct mlx4_cqe *cqe;
 	uint32_t cons_index = cq->cons_index;
@@ -372,13 +373,13 @@ mlx4_txq_complete(struct txq *txq, const unsigned int elts_n,
 			rte_be_to_cpu_16(cqe->wqe_index) & sq->txbb_cnt_mask;
 		do {
 			/* Free next descriptor. */
-			nr_txbbs +=
+			sq_tail += nr_txbbs;
+			nr_txbbs =
 				mlx4_txq_stamp_freed_wqe(sq,
-				     (sq->tail + nr_txbbs) & sq->txbb_cnt_mask,
-				     !!((sq->tail + nr_txbbs) & sq->txbb_cnt));
+				     sq_tail & sq->txbb_cnt_mask,
+				     !!(sq_tail & sq->txbb_cnt));
 			pkts++;
-		} while (((sq->tail + nr_txbbs) & sq->txbb_cnt_mask) !=
-			 new_index);
+		} while ((sq_tail & sq->txbb_cnt_mask) != new_index);
 		cons_index++;
 	} while (1);
 	if (unlikely(pkts == 0))
@@ -386,7 +387,7 @@ mlx4_txq_complete(struct txq *txq, const unsigned int elts_n,
 	/* Update CQ. */
 	cq->cons_index = cons_index;
 	*cq->set_ci_db = rte_cpu_to_be_32(cq->cons_index & MLX4_CQ_DB_CI_MASK);
-	sq->tail = sq->tail + nr_txbbs;
+	sq->tail = sq_tail + nr_txbbs;
 	/* Update the list of packets posted for transmission. */
 	elts_comp -= pkts;
 	assert(elts_comp <= txq->elts_comp);
@@ -751,7 +752,8 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
  *   Packet type for struct rte_mbuf.
  */
 static inline uint32_t
-rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe)
+rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe,
+		   uint32_t l2tun_offload)
 {
 	uint8_t idx = 0;
 	uint32_t pinfo = rte_be_to_cpu_32(cqe->vlan_my_qpn);
@@ -762,7 +764,7 @@ rxq_cq_to_pkt_type(volatile struct mlx4_cqe *cqe)
 	 *  bit[7] - MLX4_CQE_L2_TUNNEL
 	 *  bit[6] - MLX4_CQE_L2_TUNNEL_IPV4
 	 */
-	if (!(pinfo & MLX4_CQE_L2_VLAN_MASK) && (pinfo & MLX4_CQE_L2_TUNNEL))
+	if (l2tun_offload && (pinfo & MLX4_CQE_L2_TUNNEL))
 		idx |= ((pinfo & MLX4_CQE_L2_TUNNEL) >> 20) |
 		       ((pinfo & MLX4_CQE_L2_TUNNEL_IPV4) >> 19);
 	/*
@@ -960,7 +962,8 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
 			}
 			pkt = seg;
 			/* Update packet information. */
-			pkt->packet_type = rxq_cq_to_pkt_type(cqe);
+			pkt->packet_type =
+				rxq_cq_to_pkt_type(cqe, rxq->l2tun_offload);
 			pkt->ol_flags = 0;
 			pkt->pkt_len = len;
 			if (rxq->csum | rxq->csum_l2tun) {
diff --git a/drivers/net/mlx4/mlx4_rxtx.h b/drivers/net/mlx4/mlx4_rxtx.h
index 4acad801..463df2b0 100644
--- a/drivers/net/mlx4/mlx4_rxtx.h
+++ b/drivers/net/mlx4/mlx4_rxtx.h
@@ -80,6 +80,7 @@ struct rxq {
 	volatile uint32_t *rq_db; /**< RQ doorbell record. */
 	uint32_t csum:1; /**< Enable checksum offloading. */
 	uint32_t csum_l2tun:1; /**< Same for L2 tunnels. */
+	uint32_t l2tun_offload:1; /**< L2 tunnel offload is enabled. */
 	struct mlx4_cq mcq;  /**< Info for directly manipulating the CQ. */
 	struct mlx4_rxq_stats stats; /**< Rx queue counters. */
 	unsigned int socket; /**< CPU socket ID for allocations. */
diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c
index c31ea4b6..a3cef689 100644
--- a/drivers/net/mlx5/mlx5_ethdev.c
+++ b/drivers/net/mlx5/mlx5_ethdev.c
@@ -865,39 +865,39 @@ mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev, int wait_to_complete)
 	sc = ecmd->link_mode_masks[0] |
 		((uint64_t)ecmd->link_mode_masks[1] << 32);
 	priv->link_speed_capa = 0;
-	if (sc & ETHTOOL_LINK_MODE_Autoneg_BIT)
+	if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
 		priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
-	if (sc & (ETHTOOL_LINK_MODE_1000baseT_Full_BIT |
-		  ETHTOOL_LINK_MODE_1000baseKX_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_1G;
-	if (sc & (ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT |
-		  ETHTOOL_LINK_MODE_10000baseKR_Full_BIT |
-		  ETHTOOL_LINK_MODE_10000baseR_FEC_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_10G;
-	if (sc & (ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT |
-		  ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_20G;
-	if (sc & (ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_40G;
-	if (sc & (ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_56G;
-	if (sc & (ETHTOOL_LINK_MODE_25000baseCR_Full_BIT |
-		  ETHTOOL_LINK_MODE_25000baseKR_Full_BIT |
-		  ETHTOOL_LINK_MODE_25000baseSR_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_25G;
-	if (sc & (ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT |
-		  ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_50G;
-	if (sc & (ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT |
-		  ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT))
+	if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
+		  MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
 		priv->link_speed_capa |= ETH_LINK_SPEED_100G;
 	dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
 				ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
diff --git a/drivers/net/mlx5/mlx5_flow.c b/drivers/net/mlx5/mlx5_flow.c
index cd99cb07..3df8fba4 100644
--- a/drivers/net/mlx5/mlx5_flow.c
+++ b/drivers/net/mlx5/mlx5_flow.c
@@ -2914,13 +2914,16 @@ priv_fdir_filter_delete(struct priv *priv,
 			flow_h = flow_spec;
 			if (memcmp(spec, flow_spec,
 				   RTE_MIN(attr_h->size, flow_h->size)))
-				continue;
+				goto wrong_flow;
 			spec = (void *)((uintptr_t)attr + attr_h->size);
 			flow_spec = (void *)((uintptr_t)flow_attr +
 					     flow_h->size);
 		}
 		/* At this point, the flow match. */
 		break;
+wrong_flow:
+		/* The flow does not match. */
+		continue;
 	}
 	if (flow)
 		priv_flow_destroy(priv, &priv->flows, flow);
diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c
index 6b29aaee..85399eff 100644
--- a/drivers/net/mlx5/mlx5_rxq.c
+++ b/drivers/net/mlx5/mlx5_rxq.c
@@ -331,7 +331,7 @@ priv_rx_intr_vec_enable(struct priv *priv)
 	if (!priv->dev->data->dev_conf.intr_conf.rxq)
 		return 0;
 	priv_rx_intr_vec_disable(priv);
-	intr_handle->intr_vec = malloc(sizeof(intr_handle->intr_vec[rxqs_n]));
+	intr_handle->intr_vec = malloc(n * sizeof(intr_handle->intr_vec[0]));
 	if (intr_handle->intr_vec == NULL) {
 		ERROR("failed to allocate memory for interrupt vector,"
 		      " Rx interrupts will not be supported");
diff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h
index 218ae831..2fbd10b1 100644
--- a/drivers/net/mlx5/mlx5_utils.h
+++ b/drivers/net/mlx5/mlx5_utils.h
@@ -35,6 +35,7 @@
 #define RTE_PMD_MLX5_UTILS_H_
 
 #include <stddef.h>
+#include <stdint.h>
 #include <stdio.h>
 #include <limits.h>
 #include <assert.h>
@@ -61,6 +62,9 @@
 	 !!(((bf)[((b) / (sizeof((bf)[0]) * CHAR_BIT))] & \
 	     ((size_t)1 << ((b) % (sizeof((bf)[0]) * CHAR_BIT))))))
 
+/* Convert a bit number to the corresponding 64-bit mask */
+#define MLX5_BITSHIFT(v) (UINT64_C(1) << (v))
+
 /* Save and restore errno around argument evaluation. */
 #define ERRNO_SAFE(x) ((errno = (int []){ errno, ((x), 0) }[0]))
 
diff --git a/drivers/net/nfp/nfp_net.c b/drivers/net/nfp/nfp_net.c
index 83dec061..0501156b 100644
--- a/drivers/net/nfp/nfp_net.c
+++ b/drivers/net/nfp/nfp_net.c
@@ -1038,6 +1038,8 @@ nfp_net_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
 
 	/* RTE_ETHDEV_QUEUE_STAT_CNTRS default value is 16 */
 
+	memset(&nfp_dev_stats, 0, sizeof(nfp_dev_stats));
+
 	/* reading per RX ring stats */
 	for (i = 0; i < dev->data->nb_rx_queues; i++) {
 		if (i == RTE_ETHDEV_QUEUE_STAT_CNTRS)
diff --git a/drivers/net/nfp/nfp_nfpu.c b/drivers/net/nfp/nfp_nfpu.c
index 5775d8da..f11afef3 100644
--- a/drivers/net/nfp/nfp_nfpu.c
+++ b/drivers/net/nfp/nfp_nfpu.c
@@ -75,8 +75,13 @@ nfpu_open(struct rte_pci_device *pci_dev, nfpu_desc_t *desc, int nfp)
 	/* barsz in log2 */
 	while (barsz >>= 1)
 		i++;
+
 	barsz = i;
 
+	/* Sanity check: we can assume any bar size less than 1MB an error */
+	if (barsz < 20)
+		return -1;
+
 	/* Getting address for NFP expansion BAR registers */
 	cfg_base = pci_dev->mem_resource[0].addr;
 	cfg_base = (uint8_t *)cfg_base + NFP_CFG_EXP_BAR_CFG_BASE;
diff --git a/drivers/net/nfp/nfp_nspu.c b/drivers/net/nfp/nfp_nspu.c
index 6ba940cb..f9089832 100644
--- a/drivers/net/nfp/nfp_nspu.c
+++ b/drivers/net/nfp/nfp_nspu.c
@@ -341,7 +341,12 @@ nfp_fw_upload(nspu_desc_t *nspu_desc)
 		return -ENOENT;
 	}
 
-	fstat(fw_f, &file_stat);
+	if (fstat(fw_f, &file_stat) < 0) {
+		RTE_LOG(INFO, PMD, "Firmware file %s/%s size is unknown",
+			DEFAULT_FW_PATH, DEFAULT_FW_FILENAME);
+		close(fw_f);
+		return -ENOENT;
+	}
 
 	fsize = file_stat.st_size;
 	RTE_LOG(DEBUG, PMD, "Firmware file with size: %" PRIu64 "\n",
@@ -351,12 +356,14 @@ nfp_fw_upload(nspu_desc_t *nspu_desc)
 		RTE_LOG(INFO, PMD, "fw file too big: %" PRIu64
 				   " bytes (%" PRIu64 " max)",
 				  (uint64_t)fsize, (uint64_t)size);
+		close(fw_f);
 		return -EINVAL;
 	}
 
 	fw_buf = malloc((size_t)size);
 	if (!fw_buf) {
 		RTE_LOG(INFO, PMD, "malloc failed for fw buffer");
+		close(fw_f);
 		return -ENOMEM;
 	}
 	memset(fw_buf, 0, size);
@@ -367,12 +374,14 @@ nfp_fw_upload(nspu_desc_t *nspu_desc)
 				   "Just %" PRIu64 " of %" PRIu64 " bytes read.",
 				   (uint64_t)bytes, (uint64_t)fsize);
 		free(fw_buf);
+		close(fw_f);
 		return -EIO;
 	}
 
 	ret = nspu_command(nspu_desc, NSP_CMD_FW_LOAD, 0, 1, fw_buf, 0, bytes);
 
 	free(fw_buf);
+	close(fw_f);
 
 	return ret;
 }
@@ -411,6 +420,9 @@ nfp_nspu_set_bar_from_symbl(nspu_desc_t *desc, const char *symbl,
 	int ret = 0;
 
 	sym_buf = malloc(desc->buf_size);
+	if (!sym_buf)
+		return -ENOMEM;
+
 	strncpy(sym_buf, symbl, strlen(symbl));
 	ret = nspu_command(desc, NSP_CMD_GET_SYMBOL, 1, 1, sym_buf,
 			   NFP_SYM_DESC_LEN, strlen(symbl));
@@ -554,6 +566,7 @@ nfp_nsp_eth_config(nspu_desc_t *desc, int port, int up)
 			   NSP_ETH_TABLE_SIZE, 0);
 	if (ret) {
 		rte_spinlock_unlock(&desc->nsp_lock);
+		free(entries);
 		return ret;
 	}
 
@@ -574,6 +587,7 @@ nfp_nsp_eth_config(nspu_desc_t *desc, int port, int up)
 
 	if (i == NSP_ETH_MAX_COUNT) {
 		rte_spinlock_unlock(&desc->nsp_lock);
+		free(entries);
 		return -EINVAL;
 	}
 
@@ -598,6 +612,7 @@ nfp_nsp_eth_config(nspu_desc_t *desc, int port, int up)
 				"Hw ethernet port %d configure failed\n", port);
 	}
 	rte_spinlock_unlock(&desc->nsp_lock);
+	free(entries);
 	return ret;
 }
 
@@ -606,10 +621,14 @@ nfp_nsp_eth_read_table(nspu_desc_t *desc, union eth_table_entry **table)
 {
 	int ret;
 
+	if (!table)
+		return -EINVAL;
+
 	RTE_LOG(INFO, PMD, "Reading hw ethernet table...\n");
+
 	/* port 0 allocates the eth table and read it using NSPU */
 	*table = malloc(NSP_ETH_TABLE_SIZE);
-	if (!table)
+	if (!*table)
 		return -ENOMEM;
 
 	ret = nspu_command(desc, NSP_CMD_READ_ETH_TABLE, 1, 0, *table,
diff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c
index 88321451..6f5ba2a9 100644
--- a/drivers/net/qede/qede_ethdev.c
+++ b/drivers/net/qede/qede_ethdev.c
@@ -457,6 +457,7 @@ int qede_activate_vport(struct rte_eth_dev *eth_dev, bool flg)
 	if (IS_VF(edev)) {
 		params.update_tx_switching_flg = 1;
 		params.tx_switching_flg = !flg;
+		DP_INFO(edev, "VF tx-switching is disabled\n");
 	}
 #endif
 	for_each_hwfn(edev, i) {
@@ -469,8 +470,8 @@ int qede_activate_vport(struct rte_eth_dev *eth_dev, bool flg)
 			break;
 		}
 	}
-	DP_INFO(edev, "vport %s VF tx-switch %s\n", flg ? "activated" : "deactivated",
-			params.tx_switching_flg ? "enabled" : "disabled");
+	DP_INFO(edev, "vport is %s\n", flg ? "activated" : "deactivated");
+
 	return rc;
 }
 
diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c
index 8e8536f8..01a24e54 100644
--- a/drivers/net/qede/qede_rxtx.c
+++ b/drivers/net/qede/qede_rxtx.c
@@ -1547,14 +1547,14 @@ next_cqe:
 
 
 /* Populate scatter gather buffer descriptor fields */
-static inline uint8_t
+static inline uint16_t
 qede_encode_sg_bd(struct qede_tx_queue *p_txq, struct rte_mbuf *m_seg,
 		  struct eth_tx_2nd_bd **bd2, struct eth_tx_3rd_bd **bd3)
 {
 	struct qede_tx_queue *txq = p_txq;
 	struct eth_tx_bd *tx_bd = NULL;
 	dma_addr_t mapping;
-	uint8_t nb_segs = 0;
+	uint16_t nb_segs = 0;
 
 	/* Check for scattered buffers */
 	while (m_seg) {
diff --git a/drivers/net/softnic/rte_eth_softnic_tm.c b/drivers/net/softnic/rte_eth_softnic_tm.c
index dbb25143..a4599006 100644
--- a/drivers/net/softnic/rte_eth_softnic_tm.c
+++ b/drivers/net/softnic/rte_eth_softnic_tm.c
@@ -585,7 +585,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 		.non_leaf_nodes_identical = 1,
 		.leaf_nodes_identical = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.shaper_private_supported = 1,
 			.shaper_private_dual_rate_supported = 0,
 			.shaper_private_rate_min = 1,
@@ -599,7 +599,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 			.sched_wfq_weight_max = 1,
 
 			.stats_mask = STATS_MASK_DEFAULT,
-		},
+		} },
 	},
 
 	[TM_NODE_LEVEL_SUBPORT] = {
@@ -609,7 +609,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 		.non_leaf_nodes_identical = 1,
 		.leaf_nodes_identical = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.shaper_private_supported = 1,
 			.shaper_private_dual_rate_supported = 0,
 			.shaper_private_rate_min = 1,
@@ -626,7 +626,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 			.sched_wfq_weight_max = 1,
 #endif
 			.stats_mask = STATS_MASK_DEFAULT,
-		},
+		} },
 	},
 
 	[TM_NODE_LEVEL_PIPE] = {
@@ -636,7 +636,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 		.non_leaf_nodes_identical = 1,
 		.leaf_nodes_identical = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.shaper_private_supported = 1,
 			.shaper_private_dual_rate_supported = 0,
 			.shaper_private_rate_min = 1,
@@ -652,7 +652,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 			.sched_wfq_weight_max = 1,
 
 			.stats_mask = STATS_MASK_DEFAULT,
-		},
+		} },
 	},
 
 	[TM_NODE_LEVEL_TC] = {
@@ -662,7 +662,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 		.non_leaf_nodes_identical = 1,
 		.leaf_nodes_identical = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.shaper_private_supported = 1,
 			.shaper_private_dual_rate_supported = 0,
 			.shaper_private_rate_min = 1,
@@ -678,7 +678,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 			.sched_wfq_weight_max = UINT32_MAX,
 
 			.stats_mask = STATS_MASK_DEFAULT,
-		},
+		} },
 	},
 
 	[TM_NODE_LEVEL_QUEUE] = {
@@ -688,7 +688,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 		.non_leaf_nodes_identical = 0,
 		.leaf_nodes_identical = 1,
 
-		.leaf = {
+		{.leaf = {
 			.shaper_private_supported = 0,
 			.shaper_private_dual_rate_supported = 0,
 			.shaper_private_rate_min = 0,
@@ -700,7 +700,7 @@ static const struct rte_tm_level_capabilities tm_level_cap[] = {
 			.cman_wred_context_shared_n_max = 0,
 
 			.stats_mask = STATS_MASK_QUEUE,
-		},
+		} },
 	},
 };
 
@@ -778,13 +778,13 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 		.shaper_private_rate_max = UINT32_MAX,
 		.shaper_shared_n_max = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.sched_n_children_max = UINT32_MAX,
 			.sched_sp_n_priorities_max = 1,
 			.sched_wfq_n_children_per_group_max = UINT32_MAX,
 			.sched_wfq_n_groups_max = 1,
 			.sched_wfq_weight_max = 1,
-		},
+		} },
 
 		.stats_mask = STATS_MASK_DEFAULT,
 	},
@@ -796,13 +796,13 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 		.shaper_private_rate_max = UINT32_MAX,
 		.shaper_shared_n_max = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.sched_n_children_max = UINT32_MAX,
 			.sched_sp_n_priorities_max = 1,
 			.sched_wfq_n_children_per_group_max = UINT32_MAX,
 			.sched_wfq_n_groups_max = 1,
 			.sched_wfq_weight_max = UINT32_MAX,
-		},
+		} },
 
 		.stats_mask = STATS_MASK_DEFAULT,
 	},
@@ -814,7 +814,7 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 		.shaper_private_rate_max = UINT32_MAX,
 		.shaper_shared_n_max = 0,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.sched_n_children_max =
 				RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
 			.sched_sp_n_priorities_max =
@@ -822,7 +822,7 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 			.sched_wfq_n_children_per_group_max = 1,
 			.sched_wfq_n_groups_max = 0,
 			.sched_wfq_weight_max = 1,
-		},
+		} },
 
 		.stats_mask = STATS_MASK_DEFAULT,
 	},
@@ -834,7 +834,7 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 		.shaper_private_rate_max = UINT32_MAX,
 		.shaper_shared_n_max = 1,
 
-		.nonleaf = {
+		{.nonleaf = {
 			.sched_n_children_max =
 				RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
 			.sched_sp_n_priorities_max = 1,
@@ -842,7 +842,7 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 				RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
 			.sched_wfq_n_groups_max = 1,
 			.sched_wfq_weight_max = UINT32_MAX,
-		},
+		} },
 
 		.stats_mask = STATS_MASK_DEFAULT,
 	},
@@ -855,11 +855,11 @@ static const struct rte_tm_node_capabilities tm_node_cap[] = {
 		.shaper_shared_n_max = 0,
 
 
-		.leaf = {
+		{.leaf = {
 			.cman_head_drop_supported = 0,
 			.cman_wred_context_private_supported = WRED_SUPPORTED,
 			.cman_wred_context_shared_n_max = 0,
-		},
+		} },
 
 		.stats_mask = STATS_MASK_QUEUE,
 	},
diff --git a/drivers/net/szedata2/rte_eth_szedata2.c b/drivers/net/szedata2/rte_eth_szedata2.c
index 403cfdbb..74f151c4 100644
--- a/drivers/net/szedata2/rte_eth_szedata2.c
+++ b/drivers/net/szedata2/rte_eth_szedata2.c
@@ -682,7 +682,7 @@ eth_szedata2_tx(void *queue,
 	uint32_t hwpkt_len;
 	uint32_t unlock_size;
 	uint32_t rem_len;
-	uint8_t mbuf_segs;
+	uint16_t mbuf_segs;
 	uint16_t pkt_left = nb_pkts;
 
 	if (sze_q->sze == NULL || nb_pkts == 0)
diff --git a/drivers/net/virtio/virtio_ethdev.c b/drivers/net/virtio/virtio_ethdev.c
index d2576d5e..e0328f61 100644
--- a/drivers/net/virtio/virtio_ethdev.c
+++ b/drivers/net/virtio/virtio_ethdev.c
@@ -97,6 +97,9 @@ static void virtio_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index);
 static void virtio_mac_addr_set(struct rte_eth_dev *dev,
 				struct ether_addr *mac_addr);
 
+static int virtio_intr_enable(struct rte_eth_dev *dev);
+static int virtio_intr_disable(struct rte_eth_dev *dev);
+
 static int virtio_dev_queue_stats_mapping_set(
 	struct rte_eth_dev *eth_dev,
 	uint16_t queue_id,
@@ -618,7 +621,7 @@ virtio_dev_close(struct rte_eth_dev *dev)
 		virtio_queues_unbind_intr(dev);
 
 	if (intr_conf->lsc || intr_conf->rxq) {
-		rte_intr_disable(dev->intr_handle);
+		virtio_intr_disable(dev);
 		rte_intr_efd_disable(dev->intr_handle);
 		rte_free(dev->intr_handle->intr_vec);
 		dev->intr_handle->intr_vec = NULL;
@@ -1160,6 +1163,34 @@ virtio_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 }
 
 static int
+virtio_intr_enable(struct rte_eth_dev *dev)
+{
+	struct virtio_hw *hw = dev->data->dev_private;
+
+	if (rte_intr_enable(dev->intr_handle) < 0)
+		return -1;
+
+	if (!hw->virtio_user_dev)
+		hw->use_msix = vtpci_msix_detect(RTE_ETH_DEV_TO_PCI(dev));
+
+	return 0;
+}
+
+static int
+virtio_intr_disable(struct rte_eth_dev *dev)
+{
+	struct virtio_hw *hw = dev->data->dev_private;
+
+	if (rte_intr_disable(dev->intr_handle) < 0)
+		return -1;
+
+	if (!hw->virtio_user_dev)
+		hw->use_msix = vtpci_msix_detect(RTE_ETH_DEV_TO_PCI(dev));
+
+	return 0;
+}
+
+static int
 virtio_negotiate_features(struct virtio_hw *hw, uint64_t req_features)
 {
 	uint64_t host_features;
@@ -1228,7 +1259,7 @@ virtio_interrupt_handler(void *param)
 	isr = vtpci_isr(hw);
 	PMD_DRV_LOG(INFO, "interrupt status = %#x", isr);
 
-	if (rte_intr_enable(dev->intr_handle) < 0)
+	if (virtio_intr_enable(dev) < 0)
 		PMD_DRV_LOG(ERR, "interrupt enable failed");
 
 	if (isr & VIRTIO_PCI_ISR_CONFIG) {
@@ -1348,7 +1379,7 @@ virtio_configure_intr(struct rte_eth_dev *dev)
 	 * to change the config size from 20 to 24, or VIRTIO_MSI_QUEUE_VECTOR
 	 * (22) will be ignored.
 	 */
-	if (rte_intr_enable(dev->intr_handle) < 0) {
+	if (virtio_intr_enable(dev) < 0) {
 		PMD_DRV_LOG(ERR, "interrupt enable failed");
 		return -1;
 	}
@@ -1388,7 +1419,8 @@ virtio_init_device(struct rte_eth_dev *eth_dev, uint64_t req_features)
 	}
 
 	/* If host does not support both status and MSI-X then disable LSC */
-	if (vtpci_with_feature(hw, VIRTIO_NET_F_STATUS) && hw->use_msix)
+	if (vtpci_with_feature(hw, VIRTIO_NET_F_STATUS) &&
+	    hw->use_msix != VIRTIO_MSIX_NONE)
 		eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
 	else
 		eth_dev->data->dev_flags &= ~RTE_ETH_DEV_INTR_LSC;
@@ -1588,13 +1620,13 @@ eth_virtio_dev_init(struct rte_eth_dev *eth_dev)
 	if (!hw->virtio_user_dev) {
 		ret = vtpci_init(RTE_ETH_DEV_TO_PCI(eth_dev), hw);
 		if (ret)
-			return ret;
+			goto out;
 	}
 
 	/* reset device and negotiate default features */
 	ret = virtio_init_device(eth_dev, VIRTIO_PMD_DEFAULT_GUEST_FEATURES);
 	if (ret < 0)
-		return ret;
+		goto out;
 
 	/* Setup interrupt callback  */
 	if (eth_dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC)
@@ -1602,6 +1634,10 @@ eth_virtio_dev_init(struct rte_eth_dev *eth_dev)
 			virtio_interrupt_handler, eth_dev);
 
 	return 0;
+
+out:
+	rte_free(eth_dev->data->mac_addrs);
+	return ret;
 }
 
 static int
@@ -1801,9 +1837,9 @@ virtio_dev_start(struct rte_eth_dev *dev)
 	 */
 	if (dev->data->dev_conf.intr_conf.lsc ||
 	    dev->data->dev_conf.intr_conf.rxq) {
-		rte_intr_disable(dev->intr_handle);
+		virtio_intr_disable(dev);
 
-		if (rte_intr_enable(dev->intr_handle) < 0) {
+		if (virtio_intr_enable(dev) < 0) {
 			PMD_DRV_LOG(ERR, "interrupt enable failed");
 			return -EIO;
 		}
@@ -1912,7 +1948,7 @@ virtio_dev_stop(struct rte_eth_dev *dev)
 	PMD_INIT_LOG(DEBUG, "stop");
 
 	if (intr_conf->lsc || intr_conf->rxq)
-		rte_intr_disable(dev->intr_handle);
+		virtio_intr_disable(dev);
 
 	hw->started = 0;
 	memset(&link, 0, sizeof(link));
diff --git a/drivers/net/virtio/virtio_pci.c b/drivers/net/virtio/virtio_pci.c
index 55b717c0..9574498f 100644
--- a/drivers/net/virtio/virtio_pci.c
+++ b/drivers/net/virtio/virtio_pci.c
@@ -57,7 +57,8 @@
  * The remaining space is defined by each driver as the per-driver
  * configuration space.
  */
-#define VIRTIO_PCI_CONFIG(hw) (((hw)->use_msix) ? 24 : 20)
+#define VIRTIO_PCI_CONFIG(hw) \
+		(((hw)->use_msix == VIRTIO_MSIX_ENABLED) ? 24 : 20)
 
 static inline int
 check_vq_phys_addr_ok(struct virtqueue *vq)
@@ -617,7 +618,9 @@ virtio_read_caps(struct rte_pci_device *dev, struct virtio_hw *hw)
 			uint16_t flags = ((uint16_t *)&cap)[1];
 
 			if (flags & PCI_MSIX_ENABLE)
-				hw->use_msix = 1;
+				hw->use_msix = VIRTIO_MSIX_ENABLED;
+			else
+				hw->use_msix = VIRTIO_MSIX_DISABLED;
 		}
 
 		if (cap.cap_vndr != PCI_CAP_ID_VNDR) {
@@ -710,3 +713,39 @@ vtpci_init(struct rte_pci_device *dev, struct virtio_hw *hw)
 
 	return 0;
 }
+
+enum virtio_msix_status
+vtpci_msix_detect(struct rte_pci_device *dev)
+{
+	uint8_t pos;
+	struct virtio_pci_cap cap;
+	int ret;
+
+	ret = rte_pci_read_config(dev, &pos, 1, PCI_CAPABILITY_LIST);
+	if (ret < 0) {
+		PMD_INIT_LOG(DEBUG, "failed to read pci capability list");
+		return VIRTIO_MSIX_NONE;
+	}
+
+	while (pos) {
+		ret = rte_pci_read_config(dev, &cap, sizeof(cap), pos);
+		if (ret < 0) {
+			PMD_INIT_LOG(ERR,
+				"failed to read pci cap at pos: %x", pos);
+			break;
+		}
+
+		if (cap.cap_vndr == PCI_CAP_ID_MSIX) {
+			uint16_t flags = ((uint16_t *)&cap)[1];
+
+			if (flags & PCI_MSIX_ENABLE)
+				return VIRTIO_MSIX_ENABLED;
+			else
+				return VIRTIO_MSIX_DISABLED;
+		}
+
+		pos = cap.cap_next;
+	}
+
+	return VIRTIO_MSIX_NONE;
+}
diff --git a/drivers/net/virtio/virtio_pci.h b/drivers/net/virtio/virtio_pci.h
index 36d452c0..3c5ce66c 100644
--- a/drivers/net/virtio/virtio_pci.h
+++ b/drivers/net/virtio/virtio_pci.h
@@ -314,6 +314,12 @@ struct virtio_net_config {
 /* The alignment to use between consumer and producer parts of vring. */
 #define VIRTIO_PCI_VRING_ALIGN 4096
 
+enum virtio_msix_status {
+	VIRTIO_MSIX_NONE = 0,
+	VIRTIO_MSIX_DISABLED = 1,
+	VIRTIO_MSIX_ENABLED = 2
+};
+
 static inline int
 vtpci_with_feature(struct virtio_hw *hw, uint64_t bit)
 {
@@ -339,6 +345,8 @@ void vtpci_read_dev_config(struct virtio_hw *, size_t, void *, int);
 
 uint8_t vtpci_isr(struct virtio_hw *);
 
+enum virtio_msix_status vtpci_msix_detect(struct rte_pci_device *dev);
+
 extern const struct virtio_pci_ops legacy_ops;
 extern const struct virtio_pci_ops modern_ops;
 extern const struct virtio_pci_ops virtio_user_ops;