diff options
| author |   Luca Boccassi <luca.boccassi@gmail.com> | 2018-07-24 16:52:29 +0100 |
|---|---|---|
| committer | Luca Boccassi <luca.boccassi@gmail.com> | 2018-07-24 16:53:31 +0100 |
| commit | 43192222b329b3c984687235b0081c7fbfe484ba (patch) | |
| tree | 8e74c04b227d5386d40bbd987ddf132b43ddb313 /lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | |
| parent | 18af4227fa5eee002b1a79207935620f6112803e (diff) | |
New upstream version 16.11.7upstream/16.11.7
Change-Id: I1dbe85956ca329c829b0066d16b3f902c237fbd3
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h')
| -rw-r--r-- | lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h index 37f5eff2..790e6fd7 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h @@ -55,7 +55,7 @@ extern "C" { * Guarantees that the LOAD and STORE operations generated before the * barrier occur before the LOAD and STORE operations generated after. */ -#define rte_mb() {asm volatile("sync" : : : "memory"); } +#define rte_mb() asm volatile("sync" : : : "memory") /** * Write memory barrier. |