diff options
| author |   Luca Boccassi <luca.boccassi@gmail.com> | 2017-08-16 18:42:05 +0100 |
|---|---|---|
| committer | Luca Boccassi <luca.boccassi@gmail.com> | 2017-08-16 18:46:04 +0100 |
| commit | f239aed5e674965691846e8ce3f187dd47523689 (patch) | |
| tree | a153a3125c6e183c73871a8ecaa4b285fed5fbd5 /lib/librte_net/rte_net_crc.c | |
| parent | bf7567fd2a5b0b28ab724046143c24561d38d015 (diff) | |
New upstream version 17.08
Change-Id: I288b50990f52646089d6b1f3aaa6ba2f091a51d7
Signed-off-by: Luca Boccassi <luca.boccassi@gmail.com>
Diffstat (limited to 'lib/librte_net/rte_net_crc.c')
| -rw-r--r-- | lib/librte_net/rte_net_crc.c | 39 |
1 files changed, 29 insertions, 10 deletions
diff --git a/lib/librte_net/rte_net_crc.c b/lib/librte_net/rte_net_crc.c index 9d1ee63f..661fe322 100644 --- a/lib/librte_net/rte_net_crc.c +++ b/lib/librte_net/rte_net_crc.c @@ -39,14 +39,16 @@ #include <rte_common.h> #include <rte_net_crc.h> -#if defined(RTE_ARCH_X86_64) \ - && defined(RTE_MACHINE_CPUFLAG_SSE4_2) \ - && defined(RTE_MACHINE_CPUFLAG_PCLMULQDQ) +#if defined(RTE_ARCH_X86_64) && defined(RTE_MACHINE_CPUFLAG_PCLMULQDQ) #define X86_64_SSE42_PCLMULQDQ 1 +#elif defined(RTE_ARCH_ARM64) && defined(RTE_MACHINE_CPUFLAG_PMULL) +#define ARM64_NEON_PMULL 1 #endif #ifdef X86_64_SSE42_PCLMULQDQ #include <net_crc_sse.h> +#elif defined ARM64_NEON_PMULL +#include <net_crc_neon.h> #endif /* crc tables */ @@ -74,6 +76,11 @@ static rte_net_crc_handler handlers_sse42[] = { [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_sse42_handler, [RTE_NET_CRC32_ETH] = rte_crc32_eth_sse42_handler, }; +#elif defined ARM64_NEON_PMULL +static rte_net_crc_handler handlers_neon[] = { + [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_neon_handler, + [RTE_NET_CRC32_ETH] = rte_crc32_eth_neon_handler, +}; #endif /** @@ -116,7 +123,7 @@ crc32_eth_init_lut(uint32_t poly, } } -static inline __attribute__((always_inline)) uint32_t +static __rte_always_inline uint32_t crc32_eth_calc_lut(const uint8_t *data, uint32_t data_len, uint32_t crc, @@ -162,14 +169,21 @@ void rte_net_crc_set_alg(enum rte_net_crc_alg alg) { switch (alg) { - case RTE_NET_CRC_SSE42: #ifdef X86_64_SSE42_PCLMULQDQ + case RTE_NET_CRC_SSE42: handlers = handlers_sse42; -#else - alg = RTE_NET_CRC_SCALAR; -#endif break; +#elif defined ARM64_NEON_PMULL + /* fall-through */ + case RTE_NET_CRC_NEON: + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL)) { + handlers = handlers_neon; + break; + } +#endif + /* fall-through */ case RTE_NET_CRC_SCALAR: + /* fall-through */ default: handlers = handlers_scalar; break; @@ -199,8 +213,13 @@ rte_net_crc_init(void) rte_net_crc_scalar_init(); #ifdef X86_64_SSE42_PCLMULQDQ - alg = RTE_NET_CRC_SSE42; - rte_net_crc_sse42_init(); + alg = RTE_NET_CRC_SSE42; + rte_net_crc_sse42_init(); +#elif defined ARM64_NEON_PMULL + if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL)) { + alg = RTE_NET_CRC_NEON; + rte_net_crc_neon_init(); + } #endif rte_net_crc_set_alg(alg); |