diff options
Diffstat (limited to 'config')
| -rw-r--r-- | config/arm/meson.build | 5 | ||||
| -rw-r--r-- | config/common_armv8a_linuxapp | 4 | ||||
| -rw-r--r-- | config/common_base | 53 | ||||
| -rw-r--r-- | config/common_linuxapp | 12 | ||||
| -rw-r--r-- | config/defconfig_arm64-dpaa-linuxapp-gcc | 3 | ||||
| -rw-r--r-- | config/defconfig_arm64-thunderx-linuxapp-gcc | 2 | ||||
| -rw-r--r-- | config/defconfig_ppc_64-power8-linuxapp-gcc | 1 | ||||
| -rw-r--r-- | config/meson.build | 16 | ||||
| -rw-r--r-- | config/ppc_64/meson.build | 11 | ||||
| -rw-r--r-- | config/rte_config.h | 12 |
10 files changed, 107 insertions, 12 deletions
diff --git a/config/arm/meson.build b/config/arm/meson.build index 40dbc87f..4b23b395 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -53,7 +53,7 @@ flags_cavium = [ ['RTE_MAX_NUMA_NODES', 2], ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128], - ['RTE_RING_USE_C11_MEM_MODEL', false]] + ['RTE_USE_C11_MEM_MODEL', false]] flags_dpaa = [ ['RTE_MACHINE', '"dpaa"'], ['RTE_CACHE_LINE_SIZE', 64], @@ -157,7 +157,8 @@ else endif message(machine_args) -if cc.get_define('__ARM_NEON', args: machine_args) != '' +if (cc.get_define('__ARM_NEON', args: machine_args) != '' or + cc.get_define('__aarch64__', args: machine_args) != '') dpdk_conf.set('RTE_MACHINE_CPUFLAG_NEON', 1) compile_time_cpuflags += ['RTE_CPUFLAG_NEON'] endif diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp index 111c0056..ad88a37b 100644 --- a/config/common_armv8a_linuxapp +++ b/config/common_armv8a_linuxapp @@ -17,6 +17,8 @@ CONFIG_RTE_FORCE_INTRINSICS=y # to address minimum DMA alignment across all arm64 implementations. CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_USE_C11_MEM_MODEL=y + # Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest) # to determine the best threshold in code. Refer to notes in source file # (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info. @@ -29,8 +31,6 @@ CONFIG_RTE_ARCH_ARM64_MEMCPY=n #CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF #CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n -CONFIG_RTE_RING_USE_C11_MEM_MODEL=y - CONFIG_RTE_LIBRTE_FM10K_PMD=n CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n CONFIG_RTE_LIBRTE_AVP_PMD=n diff --git a/config/common_base b/config/common_base index 4bcbaf92..d12ae98b 100644 --- a/config/common_base +++ b/config/common_base @@ -56,11 +56,17 @@ CONFIG_RTE_MAJOR_ABI= CONFIG_RTE_CACHE_LINE_SIZE=64 # +# Memory model +# +CONFIG_RTE_USE_C11_MEM_MODEL=n + +# # Compile Environment Abstraction Layer # CONFIG_RTE_LIBRTE_EAL=y CONFIG_RTE_MAX_LCORE=128 CONFIG_RTE_MAX_NUMA_NODES=8 +CONFIG_RTE_MAX_HEAPS=32 CONFIG_RTE_MAX_MEMSEG_LISTS=64 # each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages # or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller @@ -128,7 +134,7 @@ CONFIG_RTE_MAX_QUEUES_PER_PORT=1024 CONFIG_RTE_LIBRTE_IEEE1588=n CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16 CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y -CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n +CONFIG_RTE_ETHDEV_PROFILE_WITH_VTUNE=n # # Turn off Tx preparation stage @@ -139,6 +145,11 @@ CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n # +# Common libraries, before Bus/PMDs +# +CONFIG_RTE_LIBRTE_COMMON_DPAAX=n + +# # Compile the Intel FPGA bus # CONFIG_RTE_LIBRTE_IFPGA_BUS=y @@ -164,6 +175,11 @@ CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n # +# Compile Aquantia Atlantic PMD driver +# +CONFIG_RTE_LIBRTE_ATLANTIC_PMD=y + +# # Compile AMD PMD # CONFIG_RTE_LIBRTE_AXGBE_PMD=y @@ -218,6 +234,11 @@ CONFIG_RTE_LIBRTE_DPAA2_PMD=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n # +# Compile NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=n + +# # Compile burst-oriented Amazon ENA PMD driver # CONFIG_RTE_LIBRTE_ENA_PMD=y @@ -400,6 +421,11 @@ CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y CONFIG_RTE_LIBRTE_MVPP2_PMD=n # +# Compile Marvell MVNETA PMD driver +# +CONFIG_RTE_LIBRTE_MVNETA_PMD=n + +# # Compile support for VMBus library # CONFIG_RTE_LIBRTE_VMBUS=n @@ -480,6 +506,12 @@ CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n # +# Compile NXP CAAM JR crypto Driver +# +CONFIG_RTE_LIBRTE_PMD_CAAM_JR=n +CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=n + +# # Compile NXP DPAA2 crypto sec driver for CAAM HW # CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n @@ -491,6 +523,11 @@ CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 # +# Compile PMD for Cavium OCTEON TX crypto device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO=y + +# # Compile PMD for QuickAssist based devices - see docs for details # CONFIG_RTE_LIBRTE_PMD_QAT=y @@ -500,6 +537,7 @@ CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n # CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48 CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16 +CONFIG_RTE_PMD_QAT_COMP_IM_BUFFER_SIZE=65536 # # Compile PMD for virtio crypto devices @@ -559,7 +597,6 @@ CONFIG_RTE_LIBRTE_PMD_CCP=n # Compile PMD for Marvell Crypto device # CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n -CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n # # Compile generic security library @@ -602,6 +639,7 @@ CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64 CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32 CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024 CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32 +CONFIG_RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE=32 # # Compile PMD for skeleton event device @@ -615,6 +653,11 @@ CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y # +# Compile PMD for distributed software event device +# +CONFIG_RTE_LIBRTE_PMD_DSW_EVENTDEV=y + +# # Compile PMD for octeontx sso event device # CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y @@ -661,7 +704,6 @@ CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y # Compile librte_ring # CONFIG_RTE_LIBRTE_RING=y -CONFIG_RTE_RING_USE_C11_MEM_MODEL=n # # Compile librte_mempool @@ -746,6 +788,11 @@ CONFIG_RTE_LIBRTE_BITRATE=y CONFIG_RTE_LIBRTE_LATENCY_STATS=y # +# Compile librte_telemetry +# +CONFIG_RTE_LIBRTE_TELEMETRY=n + +# # Compile librte_lpm # CONFIG_RTE_LIBRTE_LPM=y diff --git a/config/common_linuxapp b/config/common_linuxapp index 9c5ea9d8..6c1c8d0f 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -14,6 +14,7 @@ CONFIG_RTE_LIBRTE_KNI=y CONFIG_RTE_LIBRTE_PMD_KNI=y CONFIG_RTE_LIBRTE_VHOST=y CONFIG_RTE_LIBRTE_VHOST_NUMA=y +CONFIG_RTE_LIBRTE_VHOST_POSTCOPY=n CONFIG_RTE_LIBRTE_PMD_VHOST=y CONFIG_RTE_LIBRTE_IFC_PMD=y CONFIG_RTE_LIBRTE_PMD_AF_PACKET=y @@ -29,12 +30,18 @@ CONFIG_RTE_PROC_INFO=y CONFIG_RTE_LIBRTE_VMBUS=y CONFIG_RTE_LIBRTE_NETVSC_PMD=y +# +# Common libraries, before Bus/PMDs +# +CONFIG_RTE_LIBRTE_COMMON_DPAAX=y + # NXP DPAA BUS and drivers CONFIG_RTE_LIBRTE_DPAA_BUS=y CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y CONFIG_RTE_LIBRTE_DPAA_PMD=y CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y +CONFIG_RTE_LIBRTE_PMD_CAAM_JR=y # NXP FSLMC BUS and DPAA2 drivers CONFIG_RTE_LIBRTE_FSLMC_BUS=y @@ -44,3 +51,8 @@ CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=y CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=y + +# +# NXP ENETC PMD Driver +# +CONFIG_RTE_LIBRTE_ENETC_PMD=y diff --git a/config/defconfig_arm64-dpaa-linuxapp-gcc b/config/defconfig_arm64-dpaa-linuxapp-gcc index c47aec0a..544b6770 100644 --- a/config/defconfig_arm64-dpaa-linuxapp-gcc +++ b/config/defconfig_arm64-dpaa-linuxapp-gcc @@ -21,3 +21,6 @@ CONFIG_RTE_PKTMBUF_HEADROOM=128 # NXP DPAA Bus CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n + +# NXP CAAM_JR driver +CONFIG_RTE_LIBRTE_PMD_CAAM_JR_BE=y diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc index 2bed66c6..fd160aa0 100644 --- a/config/defconfig_arm64-thunderx-linuxapp-gcc +++ b/config/defconfig_arm64-thunderx-linuxapp-gcc @@ -7,10 +7,10 @@ CONFIG_RTE_MACHINE="thunderx" CONFIG_RTE_CACHE_LINE_SIZE=128 +CONFIG_RTE_USE_C11_MEM_MODEL=n CONFIG_RTE_MAX_NUMA_NODES=2 CONFIG_RTE_MAX_LCORE=96 CONFIG_RTE_MAX_VFIO_GROUPS=128 -CONFIG_RTE_RING_USE_C11_MEM_MODEL=n # # Compile PMD for octeontx sso event device diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index a52e22ef..8cbf7ed5 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -48,6 +48,7 @@ CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n # Note: Initially, all of the PMD drivers compilation are turned off on Power # Will turn on them only after the successful testing on Power +CONFIG_RTE_LIBRTE_ATLANTIC_PMD=n CONFIG_RTE_LIBRTE_IXGBE_PMD=n CONFIG_RTE_LIBRTE_VIRTIO_PMD=y CONFIG_RTE_LIBRTE_VMXNET3_PMD=n diff --git a/config/meson.build b/config/meson.build index 4d755323..0b710b79 100644 --- a/config/meson.build +++ b/config/meson.build @@ -9,12 +9,21 @@ else endif dpdk_conf.set('RTE_MACHINE', machine) machine_args = [] -machine_args += '-march=' + machine +# ppc64 does not support -march=native +if host_machine.cpu_family().startswith('ppc') and machine == 'native' + machine_args += '-mcpu=' + machine + machine_args += '-mtune=' + machine +else + machine_args += '-march=' + machine +endif toolchain = cc.get_id() dpdk_conf.set_quoted('RTE_TOOLCHAIN', toolchain) dpdk_conf.set('RTE_TOOLCHAIN_' + toolchain.to_upper(), 1) +add_project_link_arguments('-Wl,--no-as-needed', language: 'c') +dpdk_extra_ldflags += '-Wl,--no-as-needed' + # use pthreads add_project_link_arguments('-pthread', language: 'c') dpdk_extra_ldflags += '-pthread' @@ -84,6 +93,8 @@ if host_machine.cpu_family().startswith('x86') arch_subdir = 'x86' elif host_machine.cpu_family().startswith('arm') or host_machine.cpu_family().startswith('aarch') arch_subdir = 'arm' +elif host_machine.cpu_family().startswith('ppc') + arch_subdir = 'ppc_64' endif subdir(arch_subdir) dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) @@ -92,3 +103,6 @@ dpdk_conf.set('RTE_COMPILE_TIME_CPUFLAGS', ','.join(compile_time_cpuflags)) dpdk_conf.set_quoted('RTE_EAL_PMD_PATH', eal_pmd_path) install_headers('rte_config.h', subdir: get_option('include_subdir_arch')) + +# enable VFIO only if it is linux OS +dpdk_conf.set('RTE_EAL_VFIO', host_machine.system() == 'linux') diff --git a/config/ppc_64/meson.build b/config/ppc_64/meson.build new file mode 100644 index 00000000..e207c438 --- /dev/null +++ b/config/ppc_64/meson.build @@ -0,0 +1,11 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright(c) 2018 Luca Boccassi <bluca@debian.org> + +dpdk_conf.set('RTE_ARCH', 'ppc_64') +dpdk_conf.set('RTE_ARCH_PPC_64', 1) +dpdk_conf.set('RTE_ARCH_64', 1) + +# overrides specific to ppc64 +dpdk_conf.set('RTE_MAX_LCORE', 256) +dpdk_conf.set('RTE_MAX_NUMA_NODES', 32) +dpdk_conf.set('RTE_CACHE_LINE_SIZE', 128) diff --git a/config/rte_config.h b/config/rte_config.h index a8e47977..d3732e95 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -20,7 +20,11 @@ /****** library defines ********/ +/* compat defines */ +#define RTE_BUILD_SHARED_LIB + /* EAL defines */ +#define RTE_MAX_HEAPS 32 #define RTE_MAX_MEMSEG_LISTS 128 #define RTE_MAX_MEMSEG_PER_LIST 8192 #define RTE_MAX_MEM_MB_PER_LIST 32768 @@ -31,7 +35,6 @@ #define RTE_MAX_TAILQ 32 #define RTE_LOG_DP_LEVEL RTE_LOG_INFO #define RTE_BACKTRACE 1 -#define RTE_EAL_VFIO 1 #define RTE_MAX_VFIO_CONTAINERS 64 /* bsd module defines */ @@ -66,6 +69,7 @@ #define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 #define RTE_EVENT_ETH_INTR_RING_SIZE 1024 #define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32 +#define RTE_EVENT_ETH_TX_ADAPTER_MAX_INSTANCE 32 /* rawdev defines */ #define RTE_RAWDEV_MAX_DEVS 10 @@ -90,6 +94,7 @@ /* Max. number of QuickAssist devices which can be attached */ #define RTE_PMD_QAT_MAX_PCI_DEVICES 48 #define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16 +#define RTE_PMD_QAT_COMP_IM_BUFFER_SIZE 65536 /* virtio crypto defines */ #define RTE_MAX_VIRTIO_CRYPTO 32 @@ -106,11 +111,12 @@ #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF 64 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF 4 #define RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM 4 -/* interval up to 8160 us, aligned to 2 (or default value) */ -#define RTE_LIBRTE_I40E_ITR_INTERVAL -1 /* Ring net PMD settings */ #define RTE_PMD_RING_MAX_RX_RINGS 16 #define RTE_PMD_RING_MAX_TX_RINGS 16 +/* QEDE PMD defines */ +#define RTE_LIBRTE_QEDE_FW "" + #endif /* _RTE_CONFIG_H_ */ |