diff options
Diffstat (limited to 'config')
| -rw-r--r-- | config/arm/arm64_dpaa2_linuxapp_gcc | 15 | ||||
| -rw-r--r-- | config/arm/arm64_dpaa_linuxapp_gcc | 15 | ||||
| -rw-r--r-- | config/arm/arm64_thunderx_linuxapp_gcc | 1 | ||||
| -rw-r--r-- | config/arm/meson.build | 24 | ||||
| -rw-r--r-- | config/common_armv8a_linuxapp | 58 | ||||
| -rw-r--r-- | config/common_base | 171 | ||||
| -rw-r--r-- | config/common_linuxapp | 21 | ||||
| -rw-r--r-- | config/defconfig_arm-armv7a-linuxapp-gcc | 31 | ||||
| -rw-r--r-- | config/defconfig_arm64-dpaa-linuxapp-gcc | 9 | ||||
| -rw-r--r-- | config/defconfig_arm64-dpaa2-linuxapp-gcc | 22 | ||||
| -rw-r--r-- | config/defconfig_arm64-stingray-linuxapp-gcc | 16 | ||||
| -rw-r--r-- | config/defconfig_i686-native-linuxapp-gcc | 3 | ||||
| -rw-r--r-- | config/defconfig_i686-native-linuxapp-icc | 8 | ||||
| -rw-r--r-- | config/defconfig_x86_x32-native-linuxapp-gcc | 3 | ||||
| -rw-r--r-- | config/meson.build | 21 | ||||
| -rw-r--r-- | config/rte_config.h | 33 |
16 files changed, 268 insertions, 183 deletions
diff --git a/config/arm/arm64_dpaa2_linuxapp_gcc b/config/arm/arm64_dpaa2_linuxapp_gcc new file mode 100644 index 00000000..7ec74ec4 --- /dev/null +++ b/config/arm/arm64_dpaa2_linuxapp_gcc @@ -0,0 +1,15 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-ar' +as = 'aarch64-linux-gnu-as' +strip = 'aarch64-linux-gnu-strip' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = 'dpaa2' diff --git a/config/arm/arm64_dpaa_linuxapp_gcc b/config/arm/arm64_dpaa_linuxapp_gcc new file mode 100644 index 00000000..73a8f0b8 --- /dev/null +++ b/config/arm/arm64_dpaa_linuxapp_gcc @@ -0,0 +1,15 @@ +[binaries] +c = 'aarch64-linux-gnu-gcc' +cpp = 'aarch64-linux-gnu-cpp' +ar = 'aarch64-linux-gnu-ar' +as = 'aarch64-linux-gnu-as' +strip = 'aarch64-linux-gnu-strip' + +[host_machine] +system = 'linux' +cpu_family = 'aarch64' +cpu = 'armv8-a' +endian = 'little' + +[properties] +implementor_id = 'dpaa' diff --git a/config/arm/arm64_thunderx_linuxapp_gcc b/config/arm/arm64_thunderx_linuxapp_gcc index 7ff34af7..967d9d46 100644 --- a/config/arm/arm64_thunderx_linuxapp_gcc +++ b/config/arm/arm64_thunderx_linuxapp_gcc @@ -2,6 +2,7 @@ c = 'aarch64-linux-gnu-gcc' cpp = 'aarch64-linux-gnu-cpp' ar = 'aarch64-linux-gnu-gcc-ar' +strip = 'aarch64-linux-gnu-strip' [host_machine] system = 'linux' diff --git a/config/arm/meson.build b/config/arm/meson.build index 4e788a4e..40dbc87f 100644 --- a/config/arm/meson.build +++ b/config/arm/meson.build @@ -8,7 +8,7 @@ march_opt = '-march=@0@'.format(machine) arm_force_native_march = false machine_args_generic = [ - ['default', ['-march=armv8-a']], + ['default', ['-march=armv8-a+crc+crypto']], ['native', ['-march=native']], ['0xd03', ['-mcpu=cortex-a53']], ['0xd04', ['-mcpu=cortex-a35']], @@ -54,6 +54,17 @@ flags_cavium = [ ['RTE_MAX_LCORE', 96], ['RTE_MAX_VFIO_GROUPS', 128], ['RTE_RING_USE_C11_MEM_MODEL', false]] +flags_dpaa = [ + ['RTE_MACHINE', '"dpaa"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 16]] +flags_dpaa2 = [ + ['RTE_MACHINE', '"dpaa2"'], + ['RTE_CACHE_LINE_SIZE', 64], + ['RTE_MAX_NUMA_NODES', 1], + ['RTE_MAX_LCORE', 16], + ['RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', false]] ## Arm implementer ID (ARM DDI 0487C.a, Section G7.2.106, Page G7-5321) impl_generic = ['Generic armv8', flags_generic, machine_args_generic] @@ -69,15 +80,8 @@ impl_0x51 = ['Qualcomm', flags_generic, machine_args_generic] impl_0x53 = ['Samsung', flags_generic, machine_args_generic] impl_0x56 = ['Marvell', flags_generic, machine_args_generic] impl_0x69 = ['Intel', flags_generic, machine_args_generic] - - -if cc.get_define('__clang__') != '' - dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'clang') - dpdk_conf.set('RTE_TOOLCHAIN_CLANG', 1) -else - dpdk_conf.set_quoted('RTE_TOOLCHAIN', 'gcc') - dpdk_conf.set('RTE_TOOLCHAIN_GCC', 1) -endif +impl_dpaa = ['NXP DPAA', flags_dpaa, machine_args_generic] +impl_dpaa2 = ['NXP DPAA2', flags_dpaa2, machine_args_generic] dpdk_conf.set('RTE_FORCE_INTRINSICS', 1) diff --git a/config/common_armv8a_linuxapp b/config/common_armv8a_linuxapp index 507b28a8..111c0056 100644 --- a/config/common_armv8a_linuxapp +++ b/config/common_armv8a_linuxapp @@ -36,61 +36,3 @@ CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n CONFIG_RTE_LIBRTE_AVP_PMD=n CONFIG_RTE_SCHED_VECTOR=n - -# -# ARMv8 Specific driver compilation flags -# - -# -# Compile NXP DPAA Bus -# -CONFIG_RTE_LIBRTE_DPAA_BUS=y -CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n - -# -# Compile NXP DPAA2 FSL-MC Bus -# -CONFIG_RTE_LIBRTE_FSLMC_BUS=y - -# -# Compile NXP DPAA Mempool -# -CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y - -# -# Compile NXP DPAA2 Mempool -# -CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y - -# -# Compile bust-oriented NXP DPAA PMD -# -CONFIG_RTE_LIBRTE_DPAA_PMD=y - -# -# Compile burst-oriented NXP DPAA2 PMD driver -# -CONFIG_RTE_LIBRTE_DPAA2_PMD=y - -# -# Compile schedule-oriented NXP DPAA Event Dev PMD -# -CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y - -# -# Compile schedule-oriented NXP DPAA2 EVENTDEV driver -# -CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y - -# -# Compile NXP DPAA caam - crypto driver -# -CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y -CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 -CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048 - -# -# Compile NXP DPAA2 crypto sec driver for CAAM HW -# -CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y -CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048 diff --git a/config/common_base b/config/common_base index ad03cf43..4bcbaf92 100644 --- a/config/common_base +++ b/config/common_base @@ -61,7 +61,20 @@ CONFIG_RTE_CACHE_LINE_SIZE=64 CONFIG_RTE_LIBRTE_EAL=y CONFIG_RTE_MAX_LCORE=128 CONFIG_RTE_MAX_NUMA_NODES=8 -CONFIG_RTE_MAX_MEMSEG=256 +CONFIG_RTE_MAX_MEMSEG_LISTS=64 +# each memseg list will be limited to either RTE_MAX_MEMSEG_PER_LIST pages +# or RTE_MAX_MEM_MB_PER_LIST megabytes worth of memory, whichever is smaller +CONFIG_RTE_MAX_MEMSEG_PER_LIST=8192 +CONFIG_RTE_MAX_MEM_MB_PER_LIST=32768 +# a "type" is a combination of page size and NUMA node. total number of memseg +# lists per type will be limited to either RTE_MAX_MEMSEG_PER_TYPE pages (split +# over multiple lists of RTE_MAX_MEMSEG_PER_LIST pages), or +# RTE_MAX_MEM_MB_PER_TYPE megabytes of memory (split over multiple lists of +# RTE_MAX_MEM_MB_PER_LIST), whichever is smaller +CONFIG_RTE_MAX_MEMSEG_PER_TYPE=32768 +CONFIG_RTE_MAX_MEM_MB_PER_TYPE=131072 +# global maximum usable amount of VA, in megabytes +CONFIG_RTE_MAX_MEM_MB=524288 CONFIG_RTE_MAX_MEMZONE=2560 CONFIG_RTE_MAX_TAILQ=32 CONFIG_RTE_ENABLE_ASSERT=n @@ -74,8 +87,10 @@ CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_EAL_VFIO=n CONFIG_RTE_MAX_VFIO_GROUPS=64 +CONFIG_RTE_MAX_VFIO_CONTAINERS=64 CONFIG_RTE_MALLOC_DEBUG=n CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_USE_LIBBSD=n # # Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing. @@ -124,6 +139,11 @@ CONFIG_RTE_ETHDEV_PROFILE_ITT_WASTED_RX_ITERATIONS=n CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n # +# Compile the Intel FPGA bus +# +CONFIG_RTE_LIBRTE_IFPGA_BUS=y + +# # Compile PCI bus driver # CONFIG_RTE_LIBRTE_PCI_BUS=y @@ -144,6 +164,12 @@ CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n # +# Compile AMD PMD +# +CONFIG_RTE_LIBRTE_AXGBE_PMD=y +CONFIG_RTE_LIBRTE_AXGBE_PMD_DEBUG=n + +# # Compile burst-oriented Broadcom PMD driver # CONFIG_RTE_LIBRTE_BNX2X_PMD=n @@ -172,6 +198,7 @@ CONFIG_RTE_LIBRTE_CXGBE_TPUT=y CONFIG_RTE_LIBRTE_DPAA_BUS=n CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=n CONFIG_RTE_LIBRTE_DPAA_PMD=n +CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n # # Compile NXP DPAA2 FSL-MC Bus @@ -188,11 +215,7 @@ CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y # Compile burst-oriented NXP DPAA2 PMD driver # CONFIG_RTE_LIBRTE_DPAA2_PMD=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n # # Compile burst-oriented Amazon ENA PMD driver @@ -241,8 +264,6 @@ CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VM=4 -# interval up to 8160 us, aligned to 2 (or default value) -CONFIG_RTE_LIBRTE_I40E_ITR_INTERVAL=-1 # # Compile burst-oriented FM10K PMD @@ -270,15 +291,14 @@ CONFIG_RTE_LIBRTE_AVF_16BYTE_RX_DESC=n CONFIG_RTE_LIBRTE_MLX4_PMD=n CONFIG_RTE_LIBRTE_MLX4_DEBUG=n CONFIG_RTE_LIBRTE_MLX4_DLOPEN_DEPS=n -CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8 # -# Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD +# Compile burst-oriented Mellanox ConnectX-4, ConnectX-5 & Bluefield +# (MLX5) PMD # CONFIG_RTE_LIBRTE_MLX5_PMD=n CONFIG_RTE_LIBRTE_MLX5_DEBUG=n CONFIG_RTE_LIBRTE_MLX5_DLOPEN_DEPS=n -CONFIG_RTE_LIBRTE_MLX5_TX_MP_CACHE=8 # # Compile burst-oriented Netronome NFP PMD driver @@ -306,11 +326,6 @@ CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n # Compile software PMD backed by SZEDATA2 device # CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n -# -# Defines firmware type address space. -# See documentation for supported values. -# Other values raise compile time error. -CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0 # # Compile burst-oriented Cavium Thunderx NICVF PMD driver @@ -382,7 +397,20 @@ CONFIG_RTE_LIBRTE_PMD_FAILSAFE=y # # Compile Marvell PMD driver # -CONFIG_RTE_LIBRTE_MRVL_PMD=n +CONFIG_RTE_LIBRTE_MVPP2_PMD=n + +# +# Compile support for VMBus library +# +CONFIG_RTE_LIBRTE_VMBUS=n + +# +# Compile native PMD for Hyper-V/Azure +# +CONFIG_RTE_LIBRTE_NETVSC_PMD=n +CONFIG_RTE_LIBRTE_NETVSC_DEBUG_RX=n +CONFIG_RTE_LIBRTE_NETVSC_DEBUG_TX=n +CONFIG_RTE_LIBRTE_NETVSC_DEBUG_DUMP=n # # Compile virtual device driver for NetVSC on Hyper-V/Azure @@ -409,7 +437,7 @@ CONFIG_RTE_PMD_RING_MAX_TX_RINGS=16 # # Compile SOFTNIC PMD # -CONFIG_RTE_LIBRTE_PMD_SOFTNIC=y +CONFIG_RTE_LIBRTE_PMD_SOFTNIC=n # # Compile the TAP PMD @@ -427,6 +455,7 @@ CONFIG_RTE_PMD_PACKET_PREFETCH=y # CONFIG_RTE_LIBRTE_BBDEV=y CONFIG_RTE_BBDEV_MAX_DEVS=128 +CONFIG_RTE_BBDEV_OFFLOAD_COST=n # # Compile PMD for NULL bbdev device @@ -442,7 +471,6 @@ CONFIG_RTE_LIBRTE_PMD_BBDEV_TURBO_SW=n # Compile generic crypto device library # CONFIG_RTE_LIBRTE_CRYPTODEV=y -CONFIG_RTE_LIBRTE_CRYPTODEV_DEBUG=n CONFIG_RTE_CRYPTO_MAX_DEVS=64 # @@ -455,49 +483,47 @@ CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n # Compile NXP DPAA2 crypto sec driver for CAAM HW # CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n # # NXP DPAA caam - crypto driver # CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=n -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n +CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4 # -# Compile PMD for QuickAssist based devices +# Compile PMD for QuickAssist based devices - see docs for details # -CONFIG_RTE_LIBRTE_PMD_QAT=n -CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_TX=n -CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_RX=n -CONFIG_RTE_LIBRTE_PMD_QAT_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_PMD_QAT=y +CONFIG_RTE_LIBRTE_PMD_QAT_SYM=n # -# Number of sessions to create in the session memory pool -# on a single QuickAssist device. +# Max. number of QuickAssist devices, which can be detected and attached # -CONFIG_RTE_QAT_PMD_MAX_NB_SESSIONS=2048 +CONFIG_RTE_PMD_QAT_MAX_PCI_DEVICES=48 +CONFIG_RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS=16 + +# +# Compile PMD for virtio crypto devices +# +CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO=y +# +# Number of maximum virtio crypto devices +# +CONFIG_RTE_MAX_VIRTIO_CRYPTO=32 # # Compile PMD for AESNI backed device # CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n -CONFIG_RTE_LIBRTE_PMD_AESNI_MB_DEBUG=n # # Compile PMD for Software backed device # CONFIG_RTE_LIBRTE_PMD_OPENSSL=n -CONFIG_RTE_LIBRTE_PMD_OPENSSL_DEBUG=n # # Compile PMD for AESNI GCM device # CONFIG_RTE_LIBRTE_PMD_AESNI_GCM=n -CONFIG_RTE_LIBRTE_PMD_AESNI_GCM_DEBUG=n # # Compile PMD for SNOW 3G device @@ -509,19 +535,15 @@ CONFIG_RTE_LIBRTE_PMD_SNOW3G_DEBUG=n # Compile PMD for KASUMI device # CONFIG_RTE_LIBRTE_PMD_KASUMI=n -CONFIG_RTE_LIBRTE_PMD_KASUMI_DEBUG=n # # Compile PMD for ZUC device # CONFIG_RTE_LIBRTE_PMD_ZUC=n -CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n -# # Compile PMD for Crypto Scheduler device # CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y -CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n # # Compile PMD for NULL Crypto device @@ -529,10 +551,15 @@ CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y # +# Compile PMD for AMD CCP crypto device +# +CONFIG_RTE_LIBRTE_PMD_CCP=n + +# # Compile PMD for Marvell Crypto device # -CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO=n -CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n +CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO=n +CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO_DEBUG=n # # Compile generic security library @@ -540,12 +567,41 @@ CONFIG_RTE_LIBRTE_PMD_MRVL_CRYPTO_DEBUG=n CONFIG_RTE_LIBRTE_SECURITY=y # +# Compile generic compression device library +# +CONFIG_RTE_LIBRTE_COMPRESSDEV=y +CONFIG_RTE_COMPRESS_MAX_DEVS=64 + +# +# Compile compressdev unit test +# +CONFIG_RTE_COMPRESSDEV_TEST=n + +# +# Compile PMD for Octeontx ZIPVF compression device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_ZIPVF=y + +# +# Compile PMD for ISA-L compression device +# +CONFIG_RTE_LIBRTE_PMD_ISAL=n + +# +# Compile PMD for ZLIB compression device +# +CONFIG_RTE_LIBRTE_PMD_ZLIB=n + +# # Compile generic event device library # CONFIG_RTE_LIBRTE_EVENTDEV=y CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n CONFIG_RTE_EVENT_MAX_DEVS=16 CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64 +CONFIG_RTE_EVENT_TIMER_ADAPTER_NUM_MAX=32 +CONFIG_RTE_EVENT_ETH_INTR_RING_SIZE=1024 +CONFIG_RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE=32 # # Compile PMD for skeleton event device @@ -587,6 +643,21 @@ CONFIG_RTE_RAWDEV_MAX_DEVS=10 CONFIG_RTE_LIBRTE_PMD_SKELETON_RAWDEV=y # +# Compile PMD for NXP DPAA2 CMDIF raw device +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=n + +# +# Compile PMD for NXP DPAA2 QDMA raw device +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=n + +# +# Compile PMD for Intel FPGA raw device +# +CONFIG_RTE_LIBRTE_PMD_IFPGA_RAWDEV=y + +# # Compile librte_ring # CONFIG_RTE_LIBRTE_RING=y @@ -602,6 +673,8 @@ CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n # # Compile Mempool drivers # +CONFIG_RTE_DRIVER_MEMPOOL_BUCKET=y +CONFIG_RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB=64 CONFIG_RTE_DRIVER_MEMPOOL_RING=y CONFIG_RTE_DRIVER_MEMPOOL_STACK=y @@ -792,6 +865,20 @@ CONFIG_RTE_LIBRTE_VHOST_DEBUG=n CONFIG_RTE_LIBRTE_PMD_VHOST=n # +# Compile IFC driver +# To compile, CONFIG_RTE_LIBRTE_VHOST and CONFIG_RTE_EAL_VFIO +# should be enabled. +# +CONFIG_RTE_LIBRTE_IFC_PMD=n + +# +# Compile librte_bpf +# +CONFIG_RTE_LIBRTE_BPF=y +# allow load BPF from ELF files (requires libelf) +CONFIG_RTE_LIBRTE_BPF_ELF=n + +# # Compile the test application # CONFIG_RTE_APP_TEST=y diff --git a/config/common_linuxapp b/config/common_linuxapp index ff98f235..9c5ea9d8 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -15,7 +15,9 @@ CONFIG_RTE_LIBRTE_PMD_KNI=y CONFIG_RTE_LIBRTE_VHOST=y CONFIG_RTE_LIBRTE_VHOST_NUMA=y CONFIG_RTE_LIBRTE_PMD_VHOST=y +CONFIG_RTE_LIBRTE_IFC_PMD=y CONFIG_RTE_LIBRTE_PMD_AF_PACKET=y +CONFIG_RTE_LIBRTE_PMD_SOFTNIC=y CONFIG_RTE_LIBRTE_PMD_TAP=y CONFIG_RTE_LIBRTE_AVP_PMD=y CONFIG_RTE_LIBRTE_VDEV_NETVSC_PMD=y @@ -23,3 +25,22 @@ CONFIG_RTE_LIBRTE_NFP_PMD=y CONFIG_RTE_LIBRTE_POWER=y CONFIG_RTE_VIRTIO_USER=y CONFIG_RTE_PROC_INFO=y + +CONFIG_RTE_LIBRTE_VMBUS=y +CONFIG_RTE_LIBRTE_NETVSC_PMD=y + +# NXP DPAA BUS and drivers +CONFIG_RTE_LIBRTE_DPAA_BUS=y +CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y +CONFIG_RTE_LIBRTE_DPAA_PMD=y +CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y +CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y + +# NXP FSLMC BUS and DPAA2 drivers +CONFIG_RTE_LIBRTE_FSLMC_BUS=y +CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y +CONFIG_RTE_LIBRTE_DPAA2_PMD=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_CMDIF_RAWDEV=y +CONFIG_RTE_LIBRTE_PMD_DPAA2_QDMA_RAWDEV=y diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc index a20b7a85..13be308d 100644 --- a/config/defconfig_arm-armv7a-linuxapp-gcc +++ b/config/defconfig_arm-armv7a-linuxapp-gcc @@ -1,32 +1,5 @@ -# BSD LICENSE -# -# Copyright (C) 2015 RehiveTech. All right reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# * Neither the name of RehiveTech nor the names of its -# contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (C) 2015 RehiveTech. All right reserved. #include "common_linuxapp" diff --git a/config/defconfig_arm64-dpaa-linuxapp-gcc b/config/defconfig_arm64-dpaa-linuxapp-gcc index 52bfc792..c47aec0a 100644 --- a/config/defconfig_arm64-dpaa-linuxapp-gcc +++ b/config/defconfig_arm64-dpaa-linuxapp-gcc @@ -13,7 +13,7 @@ CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n # # Compile Environment Abstraction Layer # -CONFIG_RTE_MAX_LCORE=4 +CONFIG_RTE_MAX_LCORE=16 CONFIG_RTE_MAX_NUMA_NODES=1 CONFIG_RTE_CACHE_LINE_SIZE=64 CONFIG_RTE_PKTMBUF_HEADROOM=128 @@ -21,10 +21,3 @@ CONFIG_RTE_PKTMBUF_HEADROOM=128 # NXP DPAA Bus CONFIG_RTE_LIBRTE_DPAA_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n - -# -# FSL DPAA caam - crypto driver -# -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA_SEC_DEBUG_RX=n diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc index afdbc347..96f478a0 100644 --- a/config/defconfig_arm64-dpaa2-linuxapp-gcc +++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc @@ -9,9 +9,6 @@ CONFIG_RTE_MACHINE="dpaa2" CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72" -# -# Compile Environment Abstraction Layer -# CONFIG_RTE_MAX_LCORE=16 CONFIG_RTE_MAX_NUMA_NODES=1 CONFIG_RTE_CACHE_LINE_SIZE=64 @@ -22,23 +19,4 @@ CONFIG_RTE_PKTMBUF_HEADROOM=128 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n CONFIG_RTE_LIBRTE_VHOST_NUMA=n -# -# Compile Support Libraries for DPAA2 -# CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=n - -# -# Compile burst-oriented NXP DPAA2 PMD driver -# -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n -CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n - -# -# Compile NXP DPAA2 crypto sec driver for CAAM HW -# -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n diff --git a/config/defconfig_arm64-stingray-linuxapp-gcc b/config/defconfig_arm64-stingray-linuxapp-gcc new file mode 100644 index 00000000..99925072 --- /dev/null +++ b/config/defconfig_arm64-stingray-linuxapp-gcc @@ -0,0 +1,16 @@ +# SPDX-License-Identifier: BSD-3-Clause +# Copyright (C) Broadcom 2017-2018. All rights reserved. +# + +#include "defconfig_arm64-armv8a-linuxapp-gcc" + +# Broadcom - Stingray +CONFIG_RTE_MACHINE="armv8a" +CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72" + +# Doesn't support NUMA +CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n +CONFIG_RTE_LIBRTE_VHOST_NUMA=n + +CONFIG_RTE_EAL_IGB_UIO=y +CONFIG_RTE_KNI_KMOD=n diff --git a/config/defconfig_i686-native-linuxapp-gcc b/config/defconfig_i686-native-linuxapp-gcc index a42ba4f5..1178fe35 100644 --- a/config/defconfig_i686-native-linuxapp-gcc +++ b/config/defconfig_i686-native-linuxapp-gcc @@ -46,3 +46,6 @@ CONFIG_RTE_LIBRTE_PMD_ZUC=n # AVP PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_AVP_PMD=n + +# 32-bit doesn't break up memory in lists, but does have VA allocation limit +CONFIG_RTE_MAX_MEM_MB=2048 diff --git a/config/defconfig_i686-native-linuxapp-icc b/config/defconfig_i686-native-linuxapp-icc index 144ba0ae..016c73f3 100644 --- a/config/defconfig_i686-native-linuxapp-icc +++ b/config/defconfig_i686-native-linuxapp-icc @@ -18,11 +18,6 @@ CONFIG_RTE_TOOLCHAIN_ICC=y CONFIG_RTE_LIBRTE_KNI=n # -# Vectorized PMD is not supported on 32-bit -# -CONFIG_RTE_IXGBE_INC_VECTOR=n - -# # Solarflare PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n @@ -51,3 +46,6 @@ CONFIG_RTE_LIBRTE_PMD_ZUC=n # AVP PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_AVP_PMD=n + +# 32-bit doesn't break up memory in lists, but does have VA allocation limit +CONFIG_RTE_MAX_MEM_MB=2048 diff --git a/config/defconfig_x86_x32-native-linuxapp-gcc b/config/defconfig_x86_x32-native-linuxapp-gcc index b6206a5c..57d000dc 100644 --- a/config/defconfig_x86_x32-native-linuxapp-gcc +++ b/config/defconfig_x86_x32-native-linuxapp-gcc @@ -26,3 +26,6 @@ CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n # AVP PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_AVP_PMD=n + +# 32-bit doesn't break up memory in lists, but does have VA allocation limit +CONFIG_RTE_MAX_MEM_MB=2048 diff --git a/config/meson.build b/config/meson.build index f8c67578..4d755323 100644 --- a/config/meson.build +++ b/config/meson.build @@ -11,6 +11,10 @@ dpdk_conf.set('RTE_MACHINE', machine) machine_args = [] machine_args += '-march=' + machine +toolchain = cc.get_id() +dpdk_conf.set_quoted('RTE_TOOLCHAIN', toolchain) +dpdk_conf.set('RTE_TOOLCHAIN_' + toolchain.to_upper(), 1) + # use pthreads add_project_link_arguments('-pthread', language: 'c') dpdk_extra_ldflags += '-pthread' @@ -38,6 +42,14 @@ if numa_dep.found() and cc.has_header('numaif.h') dpdk_extra_ldflags += '-lnuma' endif +# check for strlcpy +if host_machine.system() == 'linux' and cc.find_library('bsd', + required: false).found() and cc.has_header('bsd/string.h') + dpdk_conf.set('RTE_USE_LIBBSD', 1) + add_project_link_arguments('-lbsd', language: 'c') + dpdk_extra_ldflags += '-lbsd' +endif + # add -include rte_config to cflags add_project_arguments('-include', 'rte_config.h', language: 'c') @@ -45,9 +57,12 @@ add_project_arguments('-include', 'rte_config.h', language: 'c') warning_flags = [ '-Wsign-compare', '-Wcast-qual', - '-Wno-address-of-packed-member', - '-Wno-format-truncation' + '-Wno-address-of-packed-member' ] +if cc.sizeof('void *') == 4 +# for 32-bit, don't warn about casting a 32-bit pointer to 64-bit int - it's fine!! + warning_flags += '-Wno-pointer-to-int-cast' +endif foreach arg: warning_flags if cc.has_argument(arg) add_project_arguments(arg, language: 'c') @@ -61,6 +76,8 @@ dpdk_conf.set('RTE_LIBEAL_USE_HPET', get_option('use_hpet')) dpdk_conf.set('RTE_EAL_ALLOW_INV_SOCKET_ID', get_option('allow_invalid_socket_id')) # values which have defaults which may be overridden dpdk_conf.set('RTE_MAX_VFIO_GROUPS', 64) +dpdk_conf.set('RTE_DRIVER_MEMPOOL_BUCKET_SIZE_KB', 64) +dpdk_conf.set('RTE_LIBRTE_DPAA2_USE_PHYS_IOVA', true) compile_time_cpuflags = [] if host_machine.cpu_family().startswith('x86') diff --git a/config/rte_config.h b/config/rte_config.h index 699878ad..a8e47977 100644 --- a/config/rte_config.h +++ b/config/rte_config.h @@ -21,13 +21,18 @@ /****** library defines ********/ /* EAL defines */ -#define RTE_MAX_MEMSEG 512 +#define RTE_MAX_MEMSEG_LISTS 128 +#define RTE_MAX_MEMSEG_PER_LIST 8192 +#define RTE_MAX_MEM_MB_PER_LIST 32768 +#define RTE_MAX_MEMSEG_PER_TYPE 32768 +#define RTE_MAX_MEM_MB_PER_TYPE 65536 +#define RTE_MAX_MEM_MB 524288 #define RTE_MAX_MEMZONE 2560 #define RTE_MAX_TAILQ 32 -#define RTE_LOG_LEVEL RTE_LOG_INFO #define RTE_LOG_DP_LEVEL RTE_LOG_INFO #define RTE_BACKTRACE 1 #define RTE_EAL_VFIO 1 +#define RTE_MAX_VFIO_CONTAINERS 64 /* bsd module defines */ #define RTE_CONTIGMEM_MAX_NUM_BUFS 64 @@ -52,9 +57,18 @@ #define RTE_CRYPTO_MAX_DEVS 64 #define RTE_CRYPTODEV_NAME_LEN 64 +/* compressdev defines */ +#define RTE_COMPRESS_MAX_DEVS 64 + /* eventdev defines */ #define RTE_EVENT_MAX_DEVS 16 #define RTE_EVENT_MAX_QUEUES_PER_DEV 64 +#define RTE_EVENT_TIMER_ADAPTER_NUM_MAX 32 +#define RTE_EVENT_ETH_INTR_RING_SIZE 1024 +#define RTE_EVENT_CRYPTO_ADAPTER_MAX_INSTANCE 32 + +/* rawdev defines */ +#define RTE_RAWDEV_MAX_DEVS 10 /* ip_fragmentation defines */ #define RTE_LIBRTE_IP_FRAG_MAX_FRAG 4 @@ -72,11 +86,16 @@ /****** driver defines ********/ -/* - * Number of sessions to create in the session memory pool - * on a single QuickAssist device. - */ -#define RTE_QAT_PMD_MAX_NB_SESSIONS 2048 +/* QuickAssist device */ +/* Max. number of QuickAssist devices which can be attached */ +#define RTE_PMD_QAT_MAX_PCI_DEVICES 48 +#define RTE_PMD_QAT_COMP_SGL_MAX_SEGMENTS 16 + +/* virtio crypto defines */ +#define RTE_MAX_VIRTIO_CRYPTO 32 + +/* DPAA SEC max cryptodev devices*/ +#define RTE_LIBRTE_DPAA_MAX_CRYPTODEV 4 /* fm10k defines */ #define RTE_LIBRTE_FM10K_RX_OLFLAGS_ENABLE 1 |