diff options
Diffstat (limited to 'config')
| -rw-r--r-- | config/common_base | 188 | ||||
| -rw-r--r-- | config/common_linuxapp | 4 | ||||
| -rw-r--r-- | config/defconfig_arm-armv7a-linuxapp-gcc | 4 | ||||
| -rw-r--r-- | config/defconfig_arm64-armv8a-linuxapp-gcc | 7 | ||||
| -rw-r--r-- | config/defconfig_arm64-dpaa2-linuxapp-gcc | 42 | ||||
| -rw-r--r-- | config/defconfig_arm64-thunderx-linuxapp-gcc | 10 | ||||
| -rw-r--r-- | config/defconfig_arm64-xgene1-linuxapp-gcc | 1 | ||||
| -rw-r--r-- | config/defconfig_i686-native-linuxapp-gcc | 10 | ||||
| -rw-r--r-- | config/defconfig_i686-native-linuxapp-icc | 10 | ||||
| -rw-r--r-- | config/defconfig_ppc_64-power8-linuxapp-gcc | 4 | ||||
| -rw-r--r-- | config/defconfig_tile-tilegx-linuxapp-gcc | 73 | ||||
| -rw-r--r-- | config/defconfig_x86_64-native-linuxapp-icc | 5 | ||||
| -rw-r--r-- | config/defconfig_x86_x32-native-linuxapp-gcc | 10 |
13 files changed, 265 insertions, 103 deletions
diff --git a/config/common_base b/config/common_base index 4bff83af..8907bea3 100644 --- a/config/common_base +++ b/config/common_base @@ -1,6 +1,6 @@ # BSD LICENSE # -# Copyright(c) 2010-2016 Intel Corporation. All rights reserved. +# Copyright(c) 2010-2017 Intel Corporation. All rights reserved. # All rights reserved. # # Redistribution and use in source and binary forms, with or without @@ -75,6 +75,11 @@ CONFIG_RTE_BUILD_SHARED_LIB=n CONFIG_RTE_NEXT_ABI=y # +# Major ABI to overwrite library specific LIBABIVER +# +CONFIG_RTE_MAJOR_ABI= + +# # Machine's cache line size # CONFIG_RTE_CACHE_LINE_SIZE=64 @@ -89,7 +94,9 @@ CONFIG_RTE_MAX_MEMSEG=256 CONFIG_RTE_MAX_MEMZONE=2560 CONFIG_RTE_MAX_TAILQ=32 CONFIG_RTE_LOG_LEVEL=RTE_LOG_INFO +CONFIG_RTE_LOG_DP_LEVEL=RTE_LOG_INFO CONFIG_RTE_LOG_HISTORY=256 +CONFIG_RTE_BACKTRACE=y CONFIG_RTE_LIBEAL_USE_HPET=n CONFIG_RTE_EAL_ALLOW_INV_SOCKET_ID=n CONFIG_RTE_EAL_ALWAYS_PANIC_ON_ERROR=n @@ -97,6 +104,14 @@ CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_EAL_VFIO=n CONFIG_RTE_MALLOC_DEBUG=n +# +# Recognize/ignore the AVX/AVX512 CPU flags for performance/power testing. +# AVX512 is marked as experimental for now, will enable it after enough +# field test and possible optimization. +# +CONFIG_RTE_ENABLE_AVX=y +CONFIG_RTE_ENABLE_AVX512=n + # Default driver path (or "" to disable) CONFIG_RTE_EAL_PMD_PATH="" @@ -122,6 +137,14 @@ CONFIG_RTE_ETHDEV_QUEUE_STAT_CNTRS=16 CONFIG_RTE_ETHDEV_RXTX_CALLBACKS=y # +# Turn off Tx preparation stage +# +# Warning: rte_ethdev_tx_prepare() can be safely disabled only if using a +# driver which do not implement any Tx preparation. +# +CONFIG_RTE_ETHDEV_TX_PREPARE_NOOP=n + +# # Support NIC bypass logic # CONFIG_RTE_NIC_BYPASS=n @@ -159,20 +182,16 @@ CONFIG_RTE_LIBRTE_IXGBE_DEBUG_TX_FREE=n CONFIG_RTE_LIBRTE_IXGBE_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_IXGBE_PF_DISABLE_STRIP_CRC=n CONFIG_RTE_IXGBE_INC_VECTOR=y -CONFIG_RTE_IXGBE_RX_OLFLAGS_ENABLE=y # # Compile burst-oriented I40E PMD driver # CONFIG_RTE_LIBRTE_I40E_PMD=y -CONFIG_RTE_LIBRTE_I40E_DEBUG_INIT=n CONFIG_RTE_LIBRTE_I40E_DEBUG_RX=n CONFIG_RTE_LIBRTE_I40E_DEBUG_TX=n CONFIG_RTE_LIBRTE_I40E_DEBUG_TX_FREE=n -CONFIG_RTE_LIBRTE_I40E_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_I40E_RX_ALLOW_BULK_ALLOC=y CONFIG_RTE_LIBRTE_I40E_INC_VECTOR=y -CONFIG_RTE_LIBRTE_I40E_RX_OLFLAGS_ENABLE=y CONFIG_RTE_LIBRTE_I40E_16BYTE_RX_DESC=n CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_PF=64 CONFIG_RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF=4 @@ -203,7 +222,7 @@ CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8 CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS=1 # -# Compile burst-oriented Mellanox ConnectX-4 (MLX5) PMD +# Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD # CONFIG_RTE_LIBRTE_MLX5_PMD=n CONFIG_RTE_LIBRTE_MLX5_DEBUG=n @@ -248,6 +267,12 @@ CONFIG_RTE_LIBRTE_NFP_DEBUG=n CONFIG_RTE_LIBRTE_BNXT_PMD=y # +# Compile burst-oriented Solarflare libefx-based PMD +# +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=y +CONFIG_RTE_LIBRTE_SFC_EFX_DEBUG=n + +# # Compile software PMD backed by SZEDATA2 device # CONFIG_RTE_LIBRTE_PMD_SZEDATA2=n @@ -264,7 +289,7 @@ CONFIG_RTE_LIBRTE_PMD_SZEDATA2_AS=0 # # Compile burst-oriented Cavium Thunderx NICVF PMD driver # -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=n +CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n @@ -272,6 +297,38 @@ CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n # +# Compile burst-oriented Cavium LiquidIO PMD driver +# +CONFIG_RTE_LIBRTE_LIO_PMD=y +CONFIG_RTE_LIBRTE_LIO_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_LIO_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_LIO_DEBUG_RX=n +CONFIG_RTE_LIBRTE_LIO_DEBUG_TX=n +CONFIG_RTE_LIBRTE_LIO_DEBUG_MBOX=n +CONFIG_RTE_LIBRTE_LIO_DEBUG_REGS=n + +# +# Compile NXP DPAA2 FSL-MC Bus +# +CONFIG_RTE_LIBRTE_FSLMC_BUS=n + +# +# Compile Support Libraries for NXP DPAA2 +# +CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=n +CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y + +# +# Compile burst-oriented NXP DPAA2 PMD driver +# +CONFIG_RTE_LIBRTE_DPAA2_PMD=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n + +# # Compile burst-oriented VIRTIO PMD driver # CONFIG_RTE_LIBRTE_VIRTIO_PMD=y @@ -315,7 +372,7 @@ CONFIG_RTE_LIBRTE_PMD_BOND=y CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n -# QLogic 10G/25G/40G/100G PMD +# QLogic 10G/25G/40G/50G/100G PMD # CONFIG_RTE_LIBRTE_QEDE_PMD=y CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n @@ -333,6 +390,31 @@ CONFIG_RTE_LIBRTE_QEDE_FW="" CONFIG_RTE_LIBRTE_PMD_AF_PACKET=n # +# Compile ARK PMD +# +CONFIG_RTE_LIBRTE_ARK_PMD=y +CONFIG_RTE_LIBRTE_ARK_PAD_TX=y +CONFIG_RTE_LIBRTE_ARK_DEBUG_RX=n +CONFIG_RTE_LIBRTE_ARK_DEBUG_TX=n +CONFIG_RTE_LIBRTE_ARK_DEBUG_STATS=n +CONFIG_RTE_LIBRTE_ARK_DEBUG_TRACE=n + +# +# Compile WRS accelerated virtual port (AVP) guest PMD driver +# +CONFIG_RTE_LIBRTE_AVP_PMD=n +CONFIG_RTE_LIBRTE_AVP_DEBUG_RX=n +CONFIG_RTE_LIBRTE_AVP_DEBUG_TX=n +CONFIG_RTE_LIBRTE_AVP_DEBUG_DRIVER=y +CONFIG_RTE_LIBRTE_AVP_DEBUG_BUFFERS=n + +# +# Compile the TAP PMD +# It is enabled by default for Linux only. +# +CONFIG_RTE_LIBRTE_PMD_TAP=n + +# # Compile Xen PMD # CONFIG_RTE_LIBRTE_PMD_XENVIRT=n @@ -356,6 +438,20 @@ CONFIG_RTE_CRYPTO_MAX_DEVS=64 CONFIG_RTE_CRYPTODEV_NAME_LEN=64 # +# Compile PMD for ARMv8 Crypto device +# +CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO=n +CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO_DEBUG=n + +# +# Compile NXP DPAA2 crypto sec driver for CAAM HW +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n + +# # Compile PMD for QuickAssist based devices # CONFIG_RTE_LIBRTE_PMD_QAT=n @@ -406,17 +502,46 @@ CONFIG_RTE_LIBRTE_PMD_ZUC=n CONFIG_RTE_LIBRTE_PMD_ZUC_DEBUG=n # +# Compile PMD for Crypto Scheduler device +# +CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER=y +CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER_DEBUG=n + +# # Compile PMD for NULL Crypto device # CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO=y # +# Compile generic event device library +# +CONFIG_RTE_LIBRTE_EVENTDEV=y +CONFIG_RTE_LIBRTE_EVENTDEV_DEBUG=n +CONFIG_RTE_EVENT_MAX_DEVS=16 +CONFIG_RTE_EVENT_MAX_QUEUES_PER_DEV=64 + +# +# Compile PMD for skeleton event device +# +CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV=y +CONFIG_RTE_LIBRTE_PMD_SKELETON_EVENTDEV_DEBUG=n + +# +# Compile PMD for software event device +# +CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV=y +CONFIG_RTE_LIBRTE_PMD_SW_EVENTDEV_DEBUG=n + +# +# Compile PMD for octeontx sso event device +# +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n + +# # Compile librte_ring # CONFIG_RTE_LIBRTE_RING=y -CONFIG_RTE_LIBRTE_RING_DEBUG=n -CONFIG_RTE_RING_SPLIT_PROD_CONS=n -CONFIG_RTE_RING_PAUSE_REP_COUNT=0 # # Compile librte_mempool @@ -426,6 +551,12 @@ CONFIG_RTE_MEMPOOL_CACHE_MAX_SIZE=512 CONFIG_RTE_LIBRTE_MEMPOOL_DEBUG=n # +# Compile Mempool drivers +# +CONFIG_RTE_DRIVER_MEMPOOL_RING=y +CONFIG_RTE_DRIVER_MEMPOOL_STACK=y + +# # Compile librte_mbuf # CONFIG_RTE_LIBRTE_MBUF=y @@ -458,11 +589,31 @@ CONFIG_RTE_LIBRTE_HASH=y CONFIG_RTE_LIBRTE_HASH_DEBUG=n # +# Compile librte_efd +# +CONFIG_RTE_LIBRTE_EFD=y + +# # Compile librte_jobstats # CONFIG_RTE_LIBRTE_JOBSTATS=y # +# Compile the device metrics library +# +CONFIG_RTE_LIBRTE_METRICS=y + +# +# Compile the bitrate statistics library +# +CONFIG_RTE_LIBRTE_BITRATE=y + +# +# Compile the latency statistics library +# +CONFIG_RTE_LIBRTE_LATENCY_STATS=y + +# # Compile librte_lpm # CONFIG_RTE_LIBRTE_LPM=y @@ -543,11 +694,10 @@ CONFIG_RTE_PIPELINE_STATS_COLLECT=n # Compile librte_kni # CONFIG_RTE_LIBRTE_KNI=n +CONFIG_RTE_LIBRTE_PMD_KNI=n CONFIG_RTE_KNI_KMOD=n +CONFIG_RTE_KNI_KMOD_ETHTOOL=n CONFIG_RTE_KNI_PREEMPT_DEFAULT=y -CONFIG_RTE_KNI_VHOST=n -CONFIG_RTE_KNI_VHOST_MAX_CACHE_SIZE=1024 -CONFIG_RTE_KNI_VHOST_VNET_HDR_EN=n # # Compile the pdump library @@ -573,11 +723,6 @@ CONFIG_RTE_LIBRTE_PMD_VHOST=n CONFIG_RTE_LIBRTE_XEN_DOM0=n # -# Enable warning directives -# -CONFIG_RTE_INSECURE_FUNCTION_WARNING=n - -# # Compile the test application # CONFIG_RTE_APP_TEST=y @@ -589,3 +734,8 @@ CONFIG_RTE_APP_TEST_RESOURCE_TAR=n CONFIG_RTE_TEST_PMD=y CONFIG_RTE_TEST_PMD_RECORD_CORE_CYCLES=n CONFIG_RTE_TEST_PMD_RECORD_BURST_STATS=n + +# +# Compile the crypto performance application +# +CONFIG_RTE_APP_CRYPTO_PERF=y diff --git a/config/common_linuxapp b/config/common_linuxapp index 2483dfa5..b3cf41b0 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -39,8 +39,12 @@ CONFIG_RTE_EAL_IGB_UIO=y CONFIG_RTE_EAL_VFIO=y CONFIG_RTE_KNI_KMOD=y CONFIG_RTE_LIBRTE_KNI=y +CONFIG_RTE_LIBRTE_PMD_KNI=y CONFIG_RTE_LIBRTE_VHOST=y CONFIG_RTE_LIBRTE_PMD_VHOST=y CONFIG_RTE_LIBRTE_PMD_AF_PACKET=y +CONFIG_RTE_LIBRTE_PMD_TAP=y +CONFIG_RTE_LIBRTE_AVP_PMD=y +CONFIG_RTE_LIBRTE_NFP_PMD=y CONFIG_RTE_LIBRTE_POWER=y CONFIG_RTE_VIRTIO_USER=y diff --git a/config/defconfig_arm-armv7a-linuxapp-gcc b/config/defconfig_arm-armv7a-linuxapp-gcc index bde6acd9..19607eb6 100644 --- a/config/defconfig_arm-armv7a-linuxapp-gcc +++ b/config/defconfig_arm-armv7a-linuxapp-gcc @@ -61,6 +61,7 @@ CONFIG_RTE_SCHED_VECTOR=n # cannot use those on ARM CONFIG_RTE_KNI_KMOD=n +CONFIG_RTE_LIBRTE_ARK_PMD=n CONFIG_RTE_LIBRTE_EM_PMD=n CONFIG_RTE_LIBRTE_IGB_PMD=n CONFIG_RTE_LIBRTE_CXGBE_PMD=n @@ -70,8 +71,9 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n CONFIG_RTE_LIBRTE_I40E_PMD=n CONFIG_RTE_LIBRTE_IXGBE_PMD=n CONFIG_RTE_LIBRTE_MLX4_PMD=n -CONFIG_RTE_LIBRTE_MPIPE_PMD=n CONFIG_RTE_LIBRTE_VMXNET3_PMD=n CONFIG_RTE_LIBRTE_PMD_XENVIRT=n CONFIG_RTE_LIBRTE_PMD_BNX2X=n CONFIG_RTE_LIBRTE_QEDE_PMD=n +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n +CONFIG_RTE_LIBRTE_AVP_PMD=n diff --git a/config/defconfig_arm64-armv8a-linuxapp-gcc b/config/defconfig_arm64-armv8a-linuxapp-gcc index 6321884c..9f327666 100644 --- a/config/defconfig_arm64-armv8a-linuxapp-gcc +++ b/config/defconfig_arm64-armv8a-linuxapp-gcc @@ -42,8 +42,15 @@ CONFIG_RTE_FORCE_INTRINSICS=y CONFIG_RTE_TOOLCHAIN="gcc" CONFIG_RTE_TOOLCHAIN_GCC=y +# Maximum available cache line size in arm64 implementations. +# Setting to maximum available cache line size in generic config +# to address minimum DMA alignment across all arm64 implementations. +CONFIG_RTE_CACHE_LINE_SIZE=128 + CONFIG_RTE_EAL_IGB_UIO=n CONFIG_RTE_LIBRTE_FM10K_PMD=n +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n +CONFIG_RTE_LIBRTE_AVP_PMD=n CONFIG_RTE_SCHED_VECTOR=n diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc index 66df54c5..314a0ece 100644 --- a/config/defconfig_arm64-dpaa2-linuxapp-gcc +++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc @@ -1,6 +1,7 @@ # BSD LICENSE # -# Copyright(c) 2016 Freescale Semiconductor, Inc. All rights reserved. +# Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved. +# Copyright (c) 2016 NXP. All rights reserved. # # Redistribution and use in source and binary forms, with or without # modification, are permitted provided that the following conditions @@ -40,3 +41,42 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd" # CONFIG_RTE_MAX_LCORE=8 CONFIG_RTE_MAX_NUMA_NODES=1 +CONFIG_RTE_CACHE_LINE_SIZE=64 + +CONFIG_RTE_PKTMBUF_HEADROOM=256 + +# +# Compile Support Libraries for DPAA2 +# +CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y +CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2" +CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y + +# +# Compile NXP DPAA2 FSL-MC Bus +# +CONFIG_RTE_LIBRTE_FSLMC_BUS=y + +# +# Compile burst-oriented NXP DPAA2 PMD driver +# +CONFIG_RTE_LIBRTE_DPAA2_PMD=y +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n +CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n + +# +# Compile NXP DPAA2 crypto sec driver for CAAM HW +# +CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n +CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n + +# +# Number of sessions to create in the session memory pool +# on a single DPAA2 SEC device. +# +CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048 diff --git a/config/defconfig_arm64-thunderx-linuxapp-gcc b/config/defconfig_arm64-thunderx-linuxapp-gcc index a5b1e24c..f64da4cd 100644 --- a/config/defconfig_arm64-thunderx-linuxapp-gcc +++ b/config/defconfig_arm64-thunderx-linuxapp-gcc @@ -38,11 +38,7 @@ CONFIG_RTE_MAX_NUMA_NODES=2 CONFIG_RTE_MAX_LCORE=96 # -# Compile Cavium Thunderx NICVF PMD driver +# Compile PMD for octeontx sso event device # -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_PMD=y -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_INIT=n -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_RX=n -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_TX=n -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_DRIVER=n -CONFIG_RTE_LIBRTE_THUNDERX_NICVF_DEBUG_MBOX=n +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y +CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF_DEBUG=n diff --git a/config/defconfig_arm64-xgene1-linuxapp-gcc b/config/defconfig_arm64-xgene1-linuxapp-gcc index f096166b..d8e54472 100644 --- a/config/defconfig_arm64-xgene1-linuxapp-gcc +++ b/config/defconfig_arm64-xgene1-linuxapp-gcc @@ -32,3 +32,4 @@ #include "defconfig_arm64-armv8a-linuxapp-gcc" CONFIG_RTE_MACHINE="xgene1" +CONFIG_RTE_CACHE_LINE_SIZE=64 diff --git a/config/defconfig_i686-native-linuxapp-gcc b/config/defconfig_i686-native-linuxapp-gcc index 576d5435..9847bdb6 100644 --- a/config/defconfig_i686-native-linuxapp-gcc +++ b/config/defconfig_i686-native-linuxapp-gcc @@ -52,6 +52,11 @@ CONFIG_RTE_LIBRTE_KNI=n CONFIG_RTE_IXGBE_INC_VECTOR=n # +# Solarflare PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n + +# # AES-NI multi-buffer PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n @@ -70,3 +75,8 @@ CONFIG_RTE_LIBRTE_PMD_KASUMI=n # ZUC PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_PMD_ZUC=n + +# +# AVP PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_AVP_PMD=n diff --git a/config/defconfig_i686-native-linuxapp-icc b/config/defconfig_i686-native-linuxapp-icc index 6c902a3e..269e88e9 100644 --- a/config/defconfig_i686-native-linuxapp-icc +++ b/config/defconfig_i686-native-linuxapp-icc @@ -52,6 +52,11 @@ CONFIG_RTE_LIBRTE_KNI=n CONFIG_RTE_IXGBE_INC_VECTOR=n # +# Solarflare PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n + +# # AES-NI multi-buffer PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_PMD_AESNI_MB=n @@ -70,3 +75,8 @@ CONFIG_RTE_LIBRTE_PMD_KASUMI=n # ZUC PMD is not supported on 32-bit # CONFIG_RTE_LIBRTE_PMD_ZUC=n + +# +# AVP PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_AVP_PMD=n diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc index f953e61b..71e4c353 100644 --- a/config/defconfig_ppc_64-power8-linuxapp-gcc +++ b/config/defconfig_ppc_64-power8-linuxapp-gcc @@ -49,10 +49,10 @@ CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n # Note: Initially, all of the PMD drivers compilation are turned off on Power # Will turn on them only after the successful testing on Power CONFIG_RTE_LIBRTE_IXGBE_PMD=n -CONFIG_RTE_LIBRTE_I40E_PMD=n CONFIG_RTE_LIBRTE_VIRTIO_PMD=y CONFIG_RTE_LIBRTE_VMXNET3_PMD=n CONFIG_RTE_LIBRTE_PMD_BOND=n CONFIG_RTE_LIBRTE_ENIC_PMD=n CONFIG_RTE_LIBRTE_FM10K_PMD=n - +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n +CONFIG_RTE_LIBRTE_AVP_PMD=n diff --git a/config/defconfig_tile-tilegx-linuxapp-gcc b/config/defconfig_tile-tilegx-linuxapp-gcc deleted file mode 100644 index 5a50793d..00000000 --- a/config/defconfig_tile-tilegx-linuxapp-gcc +++ /dev/null @@ -1,73 +0,0 @@ -# BSD LICENSE -# -# Copyright (C) EZchip Semiconductor 2015. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# * Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# * Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in -# the documentation and/or other materials provided with the -# distribution. -# * Neither the name of EZchip Semiconductor nor the names of its -# contributors may be used to endorse or promote products derived -# from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS -# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT -# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR -# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT -# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, -# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT -# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE -# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - -#include "common_linuxapp" - -CONFIG_RTE_MACHINE="tilegx" - -CONFIG_RTE_ARCH="tile" -CONFIG_RTE_ARCH_TILE=y -CONFIG_RTE_ARCH_64=y -CONFIG_RTE_ARCH_STRICT_ALIGN=y -CONFIG_RTE_FORCE_INTRINSICS=y - -CONFIG_RTE_TOOLCHAIN="gcc" -CONFIG_RTE_TOOLCHAIN_GCC=y - -CONFIG_RTE_MEMPOOL_ALIGN=128 - -CONFIG_RTE_LIBRTE_MPIPE_PMD=y -CONFIG_RTE_LIBRTE_MPIPE_PMD_DEBUG=n - -# Disable things that we don't support or need -CONFIG_RTE_LIBRTE_EAL_VMWARE_TSC_MAP_SUPPORT=n -CONFIG_RTE_EAL_IGB_UIO=n -CONFIG_RTE_EAL_VFIO=n -CONFIG_RTE_LIBRTE_KNI=n -CONFIG_RTE_KNI_KMOD=n -CONFIG_RTE_LIBRTE_XEN_DOM0=n -CONFIG_RTE_LIBRTE_IGB_PMD=n -CONFIG_RTE_LIBRTE_EM_PMD=n -CONFIG_RTE_LIBRTE_IXGBE_PMD=n -CONFIG_RTE_LIBRTE_I40E_PMD=n -CONFIG_RTE_LIBRTE_FM10K_PMD=n -CONFIG_RTE_LIBRTE_VIRTIO_PMD=n -CONFIG_RTE_LIBRTE_VMXNET3_PMD=n -CONFIG_RTE_LIBRTE_ENIC_PMD=n - -# This following libraries are not available on the tile architecture. -# So they're turned off. -CONFIG_RTE_LIBRTE_LPM=n -CONFIG_RTE_LIBRTE_ACL=n -CONFIG_RTE_LIBRTE_SCHED=n -CONFIG_RTE_LIBRTE_PORT=n -CONFIG_RTE_LIBRTE_TABLE=n -CONFIG_RTE_LIBRTE_PIPELINE=n -CONFIG_RTE_LIBRTE_CXGBE_PMD=n diff --git a/config/defconfig_x86_64-native-linuxapp-icc b/config/defconfig_x86_64-native-linuxapp-icc index bfa8a3da..872d1a1b 100644 --- a/config/defconfig_x86_64-native-linuxapp-icc +++ b/config/defconfig_x86_64-native-linuxapp-icc @@ -41,3 +41,8 @@ CONFIG_RTE_ARCH_64=y CONFIG_RTE_TOOLCHAIN="icc" CONFIG_RTE_TOOLCHAIN_ICC=y + +# +# Solarflare PMD build is not supported using icc toolchain +# +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n diff --git a/config/defconfig_x86_x32-native-linuxapp-gcc b/config/defconfig_x86_x32-native-linuxapp-gcc index 0c26857c..19573cb5 100644 --- a/config/defconfig_x86_x32-native-linuxapp-gcc +++ b/config/defconfig_x86_x32-native-linuxapp-gcc @@ -45,3 +45,13 @@ CONFIG_RTE_TOOLCHAIN_GCC=y # KNI is not supported on 32-bit # CONFIG_RTE_LIBRTE_KNI=n + +# +# Solarflare PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n + +# +# AVP PMD is not supported on 32-bit +# +CONFIG_RTE_LIBRTE_AVP_PMD=n |