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-rw-r--r--doc/guides/cryptodevs/aesni_gcm.rst6
-rw-r--r--doc/guides/cryptodevs/aesni_mb.rst7
-rw-r--r--doc/guides/cryptodevs/dpaa2_sec.rst6
-rw-r--r--doc/guides/cryptodevs/dpaa_sec.rst6
-rw-r--r--doc/guides/cryptodevs/features/aesni_gcm.ini3
-rw-r--r--doc/guides/cryptodevs/features/aesni_mb.ini1
-rw-r--r--doc/guides/cryptodevs/features/default.ini6
-rw-r--r--doc/guides/cryptodevs/features/dpaa2_sec.ini6
-rw-r--r--doc/guides/cryptodevs/features/dpaa_sec.ini6
-rw-r--r--doc/guides/cryptodevs/features/null.ini2
-rw-r--r--doc/guides/cryptodevs/features/openssl.ini14
-rw-r--r--doc/guides/cryptodevs/features/qat.ini6
-rw-r--r--doc/guides/cryptodevs/openssl.rst1
-rw-r--r--doc/guides/cryptodevs/overview.rst33
-rw-r--r--doc/guides/cryptodevs/qat.rst191
-rw-r--r--doc/guides/cryptodevs/scheduler.rst12
16 files changed, 229 insertions, 77 deletions
diff --git a/doc/guides/cryptodevs/aesni_gcm.rst b/doc/guides/cryptodevs/aesni_gcm.rst
index 01590e85..e0346080 100644
--- a/doc/guides/cryptodevs/aesni_gcm.rst
+++ b/doc/guides/cryptodevs/aesni_gcm.rst
@@ -36,8 +36,8 @@ Installation
To build DPDK with the AESNI_GCM_PMD the user is required to download the multi-buffer
library from `here <https://github.com/01org/intel-ipsec-mb>`_
and compile it on their user system before building DPDK.
-The latest version of the library supported by this PMD is v0.49, which
-can be downloaded in `<https://github.com/01org/intel-ipsec-mb/archive/v0.49.zip>`_.
+The latest version of the library supported by this PMD is v0.50, which
+can be downloaded in `<https://github.com/01org/intel-ipsec-mb/archive/v0.50.zip>`_.
.. code-block:: console
@@ -57,7 +57,7 @@ and the external crypto libraries supported by them:
16.04 - 16.11 Multi-buffer library 0.43 - 0.44
17.02 - 17.05 ISA-L Crypto v2.18
17.08 - 18.02 Multi-buffer library 0.46 - 0.48
- 18.05 Multi-buffer library 0.49
+ 18.05+ Multi-buffer library 0.49+
============= ================================
diff --git a/doc/guides/cryptodevs/aesni_mb.rst b/doc/guides/cryptodevs/aesni_mb.rst
index 236828c0..c2929500 100644
--- a/doc/guides/cryptodevs/aesni_mb.rst
+++ b/doc/guides/cryptodevs/aesni_mb.rst
@@ -27,6 +27,7 @@ Cipher algorithms:
* RTE_CRYPTO_CIPHER_AES256_CTR
* RTE_CRYPTO_CIPHER_AES_DOCSISBPI
* RTE_CRYPTO_CIPHER_DES_CBC
+* RTE_CRYPTO_CIPHER_3DES_CBC
* RTE_CRYPTO_CIPHER_DES_DOCSISBPI
Hash algorithms:
@@ -57,8 +58,8 @@ Installation
To build DPDK with the AESNI_MB_PMD the user is required to download the multi-buffer
library from `here <https://github.com/01org/intel-ipsec-mb>`_
and compile it on their user system before building DPDK.
-The latest version of the library supported by this PMD is v0.49, which
-can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v0.49.zip>`_.
+The latest version of the library supported by this PMD is v0.50, which
+can be downloaded from `<https://github.com/01org/intel-ipsec-mb/archive/v0.50.zip>`_.
.. code-block:: console
@@ -80,7 +81,7 @@ and the Multi-Buffer library version supported by them:
17.05 - 17.08 0.45 - 0.48
17.11 0.47 - 0.48
18.02 0.48
- 18.05 0.49
+ 18.05+ 0.49+
============== ============================
diff --git a/doc/guides/cryptodevs/dpaa2_sec.rst b/doc/guides/cryptodevs/dpaa2_sec.rst
index 3ea24c8a..9191704e 100644
--- a/doc/guides/cryptodevs/dpaa2_sec.rst
+++ b/doc/guides/cryptodevs/dpaa2_sec.rst
@@ -148,7 +148,6 @@ Where x is the device object id as configured in resource container.
Limitations
-----------
-* Chained mbufs are not supported.
* Hash followed by Cipher mode is not supported
* Only supports the session-oriented API implementation (session-less APIs are not supported).
@@ -200,11 +199,6 @@ Please note that enabling debugging options may affect system performance.
By default it is only enabled in defconfig_arm64-dpaa2-* config.
Toggle compilation of the ``librte_pmd_dpaa2_sec`` driver.
-* ``CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS``
- By default it is set as 2048 in defconfig_arm64-dpaa2-* config.
- It indicates Number of sessions to create in the session memory pool
- on a single DPAA2 SEC device.
-
Installations
-------------
To compile the DPAA2_SEC PMD for Linux arm64 gcc target, run the
diff --git a/doc/guides/cryptodevs/dpaa_sec.rst b/doc/guides/cryptodevs/dpaa_sec.rst
index c14d6d7b..dd683894 100644
--- a/doc/guides/cryptodevs/dpaa_sec.rst
+++ b/doc/guides/cryptodevs/dpaa_sec.rst
@@ -94,7 +94,6 @@ For blacklisting a DPAA device, following commands can be used.
Limitations
-----------
-* Chained mbufs are not supported.
* Hash followed by Cipher mode is not supported
* Only supports the session-oriented API implementation (session-less APIs are not supported).
@@ -145,11 +144,6 @@ Please note that enabling debugging options may affect system performance.
By default it is only enabled in defconfig_arm64-dpaa-* config.
Toggle compilation of the ``librte_pmd_dpaa_sec`` driver.
-* ``CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS``
- By default it is set as 2048 in defconfig_arm64-dpaa-* config.
- It indicates Number of sessions to create in the session memory pool
- on a single DPAA SEC device.
-
Installations
-------------
To compile the DPAA_SEC PMD for Linux arm64 gcc target, run the
diff --git a/doc/guides/cryptodevs/features/aesni_gcm.ini b/doc/guides/cryptodevs/features/aesni_gcm.ini
index 920b6b6a..b9e9c906 100644
--- a/doc/guides/cryptodevs/features/aesni_gcm.ini
+++ b/doc/guides/cryptodevs/features/aesni_gcm.ini
@@ -10,7 +10,8 @@ CPU AESNI = Y
CPU SSE = Y
CPU AVX = Y
CPU AVX2 = Y
-Mbuf scatter gather = Y
+OOP SGL In LB Out = Y
+OOP LB In LB Out = Y
;
; Supported crypto algorithms of the 'aesni_gcm' crypto driver.
;
diff --git a/doc/guides/cryptodevs/features/aesni_mb.ini b/doc/guides/cryptodevs/features/aesni_mb.ini
index 1e263c2b..f7295745 100644
--- a/doc/guides/cryptodevs/features/aesni_mb.ini
+++ b/doc/guides/cryptodevs/features/aesni_mb.ini
@@ -24,6 +24,7 @@ AES CTR (192) = Y
AES CTR (256) = Y
AES DOCSIS BPI = Y
DES CBC = Y
+3DES CBC = Y
DES DOCSIS BPI = Y
;
diff --git a/doc/guides/cryptodevs/features/default.ini b/doc/guides/cryptodevs/features/default.ini
index 42783887..92a7ccf3 100644
--- a/doc/guides/cryptodevs/features/default.ini
+++ b/doc/guides/cryptodevs/features/default.ini
@@ -18,7 +18,11 @@ CPU AVX512 =
CPU AESNI =
CPU NEON =
CPU ARM CE =
-Mbuf scatter gather =
+In Place SGL =
+OOP SGL In SGL Out =
+OOP SGL In LB Out =
+OOP LB In SGL Out =
+OOP LB In LB Out =
;
; Supported crypto algorithms of a default crypto driver.
diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini b/doc/guides/cryptodevs/features/dpaa2_sec.ini
index 68c9960d..69700df4 100644
--- a/doc/guides/cryptodevs/features/dpaa2_sec.ini
+++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini
@@ -8,7 +8,11 @@ Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
Protocol offload = Y
-Mbuf scatter gather = Y
+In Place SGL = Y
+OOP SGL In SGL Out = Y
+OOP SGL In LB Out = Y
+OOP LB In SGL Out = Y
+OOP LB In LB Out = Y
;
; Supported crypto algorithms of the 'dpaa2_sec' crypto driver.
diff --git a/doc/guides/cryptodevs/features/dpaa_sec.ini b/doc/guides/cryptodevs/features/dpaa_sec.ini
index 260fae72..937b621c 100644
--- a/doc/guides/cryptodevs/features/dpaa_sec.ini
+++ b/doc/guides/cryptodevs/features/dpaa_sec.ini
@@ -8,7 +8,11 @@ Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
Protocol offload = Y
-Mbuf scatter gather = Y
+In Place SGL = Y
+OOP SGL In SGL Out = Y
+OOP SGL In LB Out = Y
+OOP LB In SGL Out = Y
+OOP LB In LB Out = Y
;
; Supported crypto algorithms of the 'dpaa_sec' crypto driver.
diff --git a/doc/guides/cryptodevs/features/null.ini b/doc/guides/cryptodevs/features/null.ini
index a9e172da..ecf5779a 100644
--- a/doc/guides/cryptodevs/features/null.ini
+++ b/doc/guides/cryptodevs/features/null.ini
@@ -6,7 +6,7 @@
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
-Mbuf scatter gather = Y
+In Place SGL = Y
;
; Supported crypto algorithms of the 'null' crypto driver.
diff --git a/doc/guides/cryptodevs/features/openssl.ini b/doc/guides/cryptodevs/features/openssl.ini
index 69156586..b9c0bdcc 100644
--- a/doc/guides/cryptodevs/features/openssl.ini
+++ b/doc/guides/cryptodevs/features/openssl.ini
@@ -6,7 +6,9 @@
[Features]
Symmetric crypto = Y
Sym operation chaining = Y
-Mbuf scatter gather = Y
+OOP SGL In LB Out = Y
+OOP LB In LB Out = Y
+Asymmetric crypto = Y
;
; Supported crypto algorithms of the 'openssl' crypto driver.
@@ -49,3 +51,13 @@ AES GCM (256) = Y
AES CCM (128) = Y
AES CCM (192) = Y
AES CCM (256) = Y
+
+;
+; Supported Asymmetric algorithms of the 'openssl' crypto driver.
+;
+[Asymmetric]
+RSA = Y
+DSA = Y
+Modular Exponentiation = Y
+Modular Inversion = Y
+Diffie-hellman = Y
diff --git a/doc/guides/cryptodevs/features/qat.ini b/doc/guides/cryptodevs/features/qat.ini
index 51ed5967..29d865e0 100644
--- a/doc/guides/cryptodevs/features/qat.ini
+++ b/doc/guides/cryptodevs/features/qat.ini
@@ -7,7 +7,11 @@
Symmetric crypto = Y
Sym operation chaining = Y
HW Accelerated = Y
-Mbuf scatter gather = Y
+In Place SGL = Y
+OOP SGL In SGL Out = Y
+OOP SGL In LB Out = Y
+OOP LB In SGL Out = Y
+OOP LB In LB Out = Y
;
; Supported crypto algorithms of the 'qat' crypto driver.
diff --git a/doc/guides/cryptodevs/openssl.rst b/doc/guides/cryptodevs/openssl.rst
index 427fc807..bdc30f66 100644
--- a/doc/guides/cryptodevs/openssl.rst
+++ b/doc/guides/cryptodevs/openssl.rst
@@ -80,6 +80,7 @@ crypto processing.
Test name is cryptodev_openssl_autotest.
For performance test cryptodev_openssl_perftest can be used.
+For asymmetric crypto operations testing, run cryptodev_openssl_asym_autotest.
To verify real traffic l2fwd-crypto example can be used with this command:
diff --git a/doc/guides/cryptodevs/overview.rst b/doc/guides/cryptodevs/overview.rst
index 493cd5f5..3f776f07 100644
--- a/doc/guides/cryptodevs/overview.rst
+++ b/doc/guides/cryptodevs/overview.rst
@@ -11,14 +11,31 @@ Supported Feature Flags
.. include:: overview_feature_table.txt
-Note, the mbuf scatter gather feature (aka chained mbufs, scatter-gather-lists
-or SGLs) indicate all following combinations are supported unless otherwise called
-out in the Limitations section of each PMD.
-
-* In place operation, input buffer as multiple segments, same buffer used for output
-* Out of place operation, input buffer as single segment and output as multiple segments
-* Out of place operation, input buffer as multiple segments and output as single segment
-* Out of place operation, input buffer as multiple segments and output as multiple segments
+.. Note::
+
+ - "In Place SGL" feature flag stands for "In place Scatter-gather list",
+ which means that an input buffer can consist of multiple segments,
+ being the operation in-place (input address = output address).
+
+ - "OOP SGL In SGL Out" feature flag stands for
+ "Out-of-place Scatter-gather list Input, Scatter-gater list Output",
+ which means pmd supports different scatter-gather styled input and output buffers
+ (i.e. both can consists of multiple segments).
+
+ - "OOP SGL In LB Out" feature flag stands for
+ "Out-of-place Scatter-gather list Input, Linear Buffers Output",
+ which means PMD supports input from scatter-gathered styled buffers,
+ outputting linear buffers (i.e. single segment).
+
+ - "OOP LB In SGL Out" feature flag stands for
+ "Out-of-place Linear Buffers Input, Scatter-gather list Output",
+ which means PMD supports input from linear buffer, outputting
+ scatter-gathered styled buffers.
+
+ - "OOP LB In LB Out" feature flag stands for
+ "Out-of-place Linear Buffers Input, Scatter-gather list Output",
+ which means that Out-of-place operation is supported,
+ with linear input and output buffers.
Supported Cipher Algorithms
diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index 8c8fefaa..bdc58eb2 100644
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -68,12 +68,32 @@ Limitations
* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
-Installation
-------------
+Extra notes on KASUMI F9
+------------------------
+
+When using KASUMI F9 authentication algorithm, the input buffer must be
+constructed according to the 3GPP KASUMI specifications (section 4.4, page 13):
+`<http://cryptome.org/3gpp/35201-900.pdf>`_.
+Input buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)
+concatenated. After the DIRECTION bit, a single '1' bit is appended, followed by
+between 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.
+Note that the actual message can be any length, specified in bits.
+
+Once this buffer is passed this way, when creating the crypto operation,
+length of data to authenticate (op.sym.auth.data.length) must be the length
+of all the items described above, including the padding at the end.
+Also, offset of data to authenticate (op.sym.auth.data.offset)
+must be such that points at the start of the COUNT bytes.
+
+
+Building the DPDK QAT cryptodev PMD
+-----------------------------------
+
-To enable QAT in DPDK, follow the instructions for modifying the compile-time
+To enable QAT crypto in DPDK, follow the instructions for modifying the compile-time
configuration file as described `here <http://dpdk.org/doc/guides/linux_gsg/build_dpdk.html>`_.
+
Quick instructions are as follows:
.. code-block:: console
@@ -81,29 +101,95 @@ Quick instructions are as follows:
cd to the top-level DPDK directory
make config T=x86_64-native-linuxapp-gcc
sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT\)=n,\1=y,' build/.config
+ sed -i 's,\(CONFIG_RTE_LIBRTE_PMD_QAT_SYM\)=n,\1=y,' build/.config
make
-To use the DPDK QAT PMD an SRIOV-enabled QAT kernel driver is required. The VF
-devices exposed by this driver will be used by the QAT PMD. The devices and
-available kernel drivers and device ids are :
+
+.. _qat_kernel_installation:
+
+Dependency on the QAT kernel driver
+-----------------------------------
+
+To use the QAT PMD an SRIOV-enabled QAT kernel driver is required. The VF
+devices created and initialised by this driver will be used by the QAT PMD.
+
+Instructions for installation are below, but first an explanation of the
+relationships between the PF/VF devices and the PMDs visible to
+DPDK applications.
+
+
+Acceleration services - cryptography and compression - are provided to DPDK
+applications via PMDs which register to implement the corresponding
+cryptodev and compressdev APIs.
+
+Each QuickAssist VF device can expose one cryptodev PMD and/or one compressdev PMD.
+These QAT PMDs share the same underlying device and pci-mgmt code, but are
+enumerated independently on their respective APIs and appear as independent
+devices to applications.
+
+.. Note::
+
+ Each VF can only be used by one DPDK process. It is not possible to share
+ the same VF across multiple processes, even if these processes are using
+ different acceleration services.
+
+ Conversely one DPDK process can use one or more QAT VFs and can expose both
+ cryptodev and compressdev instances on each of those VFs.
+
+
+
+Device and driver naming
+------------------------
+
+* The qat cryptodev driver name is "crypto_qat".
+ The rte_cryptodev_devices_get() returns the devices exposed by this driver.
+
+* Each qat crypto device has a unique name, in format
+ <pci bdf>_<service>, e.g. "0000:41:01.0_qat_sym".
+ This name can be passed to rte_cryptodev_get_dev_id() to get the device_id.
+
+.. Note::
+
+ The qat crypto driver name is passed to the dpdk-test-crypto-perf tool in the -devtype parameter.
+
+ The qat crypto device name is in the format of the slave parameter passed to the crypto scheduler.
+
+* The qat compressdev driver name is "comp_qat".
+ The rte_compressdev_devices_get() returns the devices exposed by this driver.
+
+* Each qat compression device has a unique name, in format
+ <pci bdf>_<service>, e.g. "0000:41:01.0_qat_comp".
+ This name can be passed to rte_compressdev_get_dev_id() to get the device_id.
+
+
+Available kernel drivers
+------------------------
+
+Kernel drivers for each device are listed in the following table. Scroll right
+to check that the driver and device supports the servic you require.
+
.. _table_qat_pmds_drivers:
.. table:: QAT device generations, devices and drivers
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
- | Gen | Device | Driver | Kernel Module | Pci Driver | PF Did | #PFs | Vf Did | VFs/PF |
- +=====+==========+========+===============+============+========+======+========+========+
- | 1 | DH895xCC | 01.org | icp_qa_al | n/a | 435 | 1 | 443 | 32 |
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
- | 1 | DH895xCC | 4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 |
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
- | 2 | C62x | 4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 |
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
- | 2 | C3xxx | 4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 |
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
- | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
- +-----+----------+--------+---------------+------------+--------+------+--------+--------+
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | Gen | Device | Driver/ver | Kernel Module | Pci Driver | PF Did | #PFs | VF Did | VFs/PF | cryptodev | compressdev |
+ +=====+==========+===============+===============+============+========+======+========+========+===========+=============+
+ | 1 | DH895xCC | linux/4.4+ | qat_dh895xcc | dh895xcc | 435 | 1 | 443 | 32 | Yes | No |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | No |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | 2 | C62x | linux/4.5+ | qat_c62x | c6xx | 37c8 | 3 | 37c9 | 16 | Yes | No |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | 2 | C3xxx | linux/4.5+ | qat_c3xxx | c3xxx | 19e2 | 1 | 19e3 | 16 | Yes | No |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | Yes | Yes |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
+ | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | Yes | No |
+ +-----+----------+---------------+---------------+------------+--------+------+--------+--------+-----------+-------------+
The ``Driver`` column indicates either the Linux kernel version in which
@@ -196,9 +282,9 @@ Consult the *Getting Started Guide* at the same URL for further information.
The steps below assume you are:
-* Building on a platform with one ``DH895xCC`` device.
-* Using package ``qatmux.l.2.3.0-34.tgz``.
-* On Fedora21 kernel ``3.17.4-301.fc21.x86_64``.
+* Building on a platform with one ``C62x`` device.
+* Using package ``qat1.7.l.4.2.0-000xx.tar.gz``.
+* On Fedora26 kernel ``4.11.11-300.fc26.x86_64``.
In the BIOS ensure that SRIOV is enabled and VT-d is disabled.
@@ -206,21 +292,30 @@ Uninstall any existing QAT driver, for example by running:
* ``./installer.sh uninstall`` in the directory where originally installed.
-* or ``rmmod qat_dh895xcc; rmmod intel_qat``.
Build and install the SRIOV-enabled QAT driver::
mkdir /QAT
cd /QAT
- # Copy qatmux.l.2.3.0-34.tgz to this location
- tar zxof qatmux.l.2.3.0-34.tgz
+ # Copy the package to this location and unpack
+ tar zxof qat1.7.l.4.2.0-000xx.tar.gz
+
+ ./configure --enable-icp-sriov=host
+ make install
+
+You can use ``cat /sys/kernel/debug/qat<your device type and bdf>/version/fw`` to confirm the driver is correctly installed and is using firmware version 4.2.0.
+You can use ``lspci -d:37c9`` to confirm the presence of the 16 VF devices available per ``C62x`` PF.
+
+Confirm the driver is correctly installed and is using firmware version 4.2.0::
+
+ cat /sys/kernel/debug/qat<your device type and bdf>/version/fw
- export ICP_WITHOUT_IOMMU=1
- ./installer.sh install QAT1.6 host
-You can use ``cat /proc/icp_dh895xcc_dev0/version`` to confirm the driver is correctly installed.
-You can use ``lspci -d:443`` to confirm the of the 32 VF devices available per ``DH895xCC`` device.
+Confirm the presence of 48 VF devices - 16 per PF::
+
+ lspci -d:37c9
+
To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_.
@@ -261,6 +356,7 @@ To complete the installation - follow instructions in `Binding the available VFs
sudo yum install zlib-devel
sudo yum install openssl-devel
+ sudo yum install libudev-devel
.. Note::
@@ -343,19 +439,28 @@ Another way to bind the VFs to the DPDK UIO driver is by using the
./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1
-Extra notes on KASUMI F9
-------------------------
+Debugging
+----------------------------------------
-When using KASUMI F9 authentication algorithm, the input buffer must be
-constructed according to the 3GPP KASUMI specifications (section 4.4, page 13):
-`<http://cryptome.org/3gpp/35201-900.pdf>`_.
-Input buffer has to have COUNT (4 bytes), FRESH (4 bytes), MESSAGE and DIRECTION (1 bit)
-concatenated. After the DIRECTION bit, a single '1' bit is appended, followed by
-between 0 and 7 '0' bits, so that the total length of the buffer is multiple of 8 bits.
-Note that the actual message can be any length, specified in bits.
+There are 2 sets of trace available via the dynamic logging feature:
-Once this buffer is passed this way, when creating the crypto operation,
-length of data to authenticate (op.sym.auth.data.length) must be the length
-of all the items described above, including the padding at the end.
-Also, offset of data to authenticate (op.sym.auth.data.offset)
-must be such that points at the start of the COUNT bytes.
+* pmd.qat_dp exposes trace on the data-path.
+* pmd.qat_general exposes all other trace.
+
+pmd.qat exposes both sets of traces.
+They can be enabled using the log-level option (where 8=maximum log level) on
+the process cmdline, e.g. using any of the following::
+
+ --log-level="pmd.qat_general,8"
+ --log-level="pmd.qat_dp,8"
+ --log-level="pmd.qat,8"
+
+.. Note::
+
+ The global RTE_LOG_DP_LEVEL overrides data-path trace so must be set to
+ RTE_LOG_DEBUG to see all the trace. This variable is in config/rte_config.h
+ for meson build and config/common_base for gnu make.
+ Also the dynamic global log level overrides both sets of trace, so e.g. no
+ QAT trace would display in this case::
+
+ --log-level="7" --log-level="pmd.qat_general,8"
diff --git a/doc/guides/cryptodevs/scheduler.rst b/doc/guides/cryptodevs/scheduler.rst
index d67894d5..a754a27e 100644
--- a/doc/guides/cryptodevs/scheduler.rst
+++ b/doc/guides/cryptodevs/scheduler.rst
@@ -71,6 +71,11 @@ two calls:
mode parameter values are specified in the "Cryptodev Scheduler Modes
Overview" section.
+* mode_param: Specify the mode-specific parameter. Some scheduling modes
+ may be initialized with specific parameters other than the default ones,
+ such as the **threshold** packet size of **packet-size-distr** mode. This
+ parameter fulfills the purpose.
+
* ordering: Specify the status of the crypto operations ordering feature.
The value of this parameter can be "enable" or "disable". This feature
is disabled by default.
@@ -132,7 +137,12 @@ operation:
**option_type** must be **CDEV_SCHED_OPTION_THRESHOLD** and **option** should
point to a rte_cryptodev_scheduler_threshold_option structure filled with
appropriate threshold value. Please NOTE this threshold has be a power-of-2
- unsigned integer.
+ unsigned integer. It is possible to use **mode_param** initialization
+ parameter to achieve the same purpose. For example:
+
+ ... --vdev "crypto_scheduler,mode=packet-size-distr,mode_param=threshold:512" ...
+
+ The above parameter will overwrite the threshold value to 512.
* **CDEV_SCHED_MODE_FAILOVER:**