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-rw-r--r--drivers/event/octeontx/Makefile11
-rw-r--r--drivers/event/octeontx/rte_pmd_octeontx_ssovf.h61
-rw-r--r--drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map6
-rw-r--r--drivers/event/octeontx/ssovf_evdev.c130
-rw-r--r--drivers/event/octeontx/ssovf_evdev.h11
-rw-r--r--drivers/event/octeontx/ssovf_mbox.c232
-rw-r--r--drivers/event/octeontx/ssovf_probe.c288
-rw-r--r--drivers/event/octeontx/ssovf_worker.h34
8 files changed, 167 insertions, 606 deletions
diff --git a/drivers/event/octeontx/Makefile b/drivers/event/octeontx/Makefile
index e5661ca8..fdf1b738 100644
--- a/drivers/event/octeontx/Makefile
+++ b/drivers/event/octeontx/Makefile
@@ -38,6 +38,12 @@ include $(RTE_SDK)/mk/rte.vars.mk
LIB = librte_pmd_octeontx_ssovf.a
CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/mempool/octeontx/
+CFLAGS += -I$(RTE_SDK)/drivers/net/octeontx/
+
+LDLIBS += -lrte_eal -lrte_eventdev -lrte_mempool_octeontx
+LDLIBS += -lrte_bus_pci
+LDLIBS += -lrte_bus_vdev
EXPORT_MAP := rte_pmd_octeontx_ssovf_version.map
@@ -48,8 +54,6 @@ LIBABIVER := 1
#
SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_worker.c
SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_evdev.c
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_probe.c
-SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF) += ssovf_mbox.c
ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)
CFLAGS_ssovf_worker.o += -fno-prefetch-loop-arrays
@@ -64,7 +68,4 @@ else
CFLAGS_ssovf_worker.o += -Ofast
endif
-# install this header file
-SYMLINK-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF)-include := rte_pmd_octeontx_ssovf.h
-
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h b/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
deleted file mode 100644
index ba6d5142..00000000
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * BSD LICENSE
- *
- * Copyright (C) Cavium, Inc. 2017.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Cavium, Inc nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef __RTE_PMD_OCTEONTX_SSOVF_H__
-#define __RTE_PMD_OCTEONTX_SSOVF_H__
-
-#include <rte_common.h>
-
-struct octeontx_ssovf_info {
- uint16_t domain; /* Domain id */
- uint8_t total_ssovfs; /* Total sso groups available in domain */
- uint8_t total_ssowvfs;/* Total sso hws available in domain */
-};
-
-enum octeontx_ssovf_type {
- OCTEONTX_SSO_GROUP, /* SSO group vf */
- OCTEONTX_SSO_HWS, /* SSO hardware workslot vf */
-};
-
-struct octeontx_mbox_hdr {
- uint16_t vfid; /* VF index or pf resource index local to the domain */
- uint8_t coproc; /* Coprocessor id */
- uint8_t msg; /* Message id */
- uint8_t res_code; /* Functional layer response code */
-};
-
-int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
-void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
-int octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr,
- void *txdata, uint16_t txlen, void *rxdata, uint16_t rxlen);
-
-#endif /* __RTE_PMD_OCTEONTX_SSOVF_H__ */
diff --git a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
index 3810a03f..5352e7e3 100644
--- a/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
+++ b/drivers/event/octeontx/rte_pmd_octeontx_ssovf_version.map
@@ -1,9 +1,3 @@
DPDK_17.05 {
- global:
-
- octeontx_ssovf_info;
- octeontx_ssovf_bar;
- octeontx_ssovf_mbox_send;
-
local: *;
};
diff --git a/drivers/event/octeontx/ssovf_evdev.c b/drivers/event/octeontx/ssovf_evdev.c
index d829b491..117b1453 100644
--- a/drivers/event/octeontx/ssovf_evdev.c
+++ b/drivers/event/octeontx/ssovf_evdev.c
@@ -36,12 +36,13 @@
#include <rte_debug.h>
#include <rte_dev.h>
#include <rte_eal.h>
+#include <rte_ethdev.h>
+#include <rte_event_eth_rx_adapter.h>
#include <rte_lcore.h>
#include <rte_log.h>
#include <rte_malloc.h>
#include <rte_memory.h>
-#include <rte_memzone.h>
-#include <rte_vdev.h>
+#include <rte_bus_vdev.h>
#include "ssovf_evdev.h"
@@ -155,7 +156,6 @@ ssovf_fastpath_fns_set(struct rte_eventdev *dev)
{
struct ssovf_evdev *edev = ssovf_pmd_priv(dev);
- dev->schedule = NULL;
dev->enqueue = ssows_enq;
dev->enqueue_burst = ssows_enq_burst;
dev->enqueue_new_burst = ssows_enq_new_burst;
@@ -395,6 +395,123 @@ ssows_dump(struct ssows *ws, FILE *f)
fprintf(f, "\tpwqp=0x%"PRIx64"\n", val);
}
+static int
+ssovf_eth_rx_adapter_caps_get(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev, uint32_t *caps)
+{
+ int ret;
+ RTE_SET_USED(dev);
+
+ ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
+ if (ret)
+ *caps = RTE_EVENT_ETH_RX_ADAPTER_SW_CAP;
+ else
+ *caps = RTE_EVENT_ETH_RX_ADAPTER_CAP_INTERNAL_PORT;
+
+ return 0;
+}
+
+static int
+ssovf_eth_rx_adapter_queue_add(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev, int32_t rx_queue_id,
+ const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
+{
+ int ret = 0;
+ const struct octeontx_nic *nic = eth_dev->data->dev_private;
+ pki_mod_qos_t pki_qos;
+ RTE_SET_USED(dev);
+
+ ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
+ if (ret)
+ return -EINVAL;
+
+ if (rx_queue_id >= 0)
+ return -EINVAL;
+
+ if (queue_conf->ev.sched_type == RTE_SCHED_TYPE_PARALLEL)
+ return -ENOTSUP;
+
+ memset(&pki_qos, 0, sizeof(pki_mod_qos_t));
+
+ pki_qos.port_type = 0;
+ pki_qos.index = 0;
+ pki_qos.mmask.f_tag_type = 1;
+ pki_qos.mmask.f_port_add = 1;
+ pki_qos.mmask.f_grp_ok = 1;
+ pki_qos.mmask.f_grp_bad = 1;
+ pki_qos.mmask.f_grptag_ok = 1;
+ pki_qos.mmask.f_grptag_bad = 1;
+
+ pki_qos.tag_type = queue_conf->ev.sched_type;
+ pki_qos.qos_entry.port_add = 0;
+ pki_qos.qos_entry.ggrp_ok = queue_conf->ev.queue_id;
+ pki_qos.qos_entry.ggrp_bad = queue_conf->ev.queue_id;
+ pki_qos.qos_entry.grptag_bad = 0;
+ pki_qos.qos_entry.grptag_ok = 0;
+
+ ret = octeontx_pki_port_modify_qos(nic->port_id, &pki_qos);
+ if (ret < 0)
+ ssovf_log_err("failed to modify QOS, port=%d, q=%d",
+ nic->port_id, queue_conf->ev.queue_id);
+
+ return ret;
+}
+
+static int
+ssovf_eth_rx_adapter_queue_del(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev, int32_t rx_queue_id)
+{
+ int ret = 0;
+ const struct octeontx_nic *nic = eth_dev->data->dev_private;
+ pki_del_qos_t pki_qos;
+ RTE_SET_USED(dev);
+ RTE_SET_USED(rx_queue_id);
+
+ ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
+ if (ret)
+ return -EINVAL;
+
+ pki_qos.port_type = 0;
+ pki_qos.index = 0;
+ memset(&pki_qos, 0, sizeof(pki_del_qos_t));
+ ret = octeontx_pki_port_delete_qos(nic->port_id, &pki_qos);
+ if (ret < 0)
+ ssovf_log_err("Failed to delete QOS port=%d, q=%d",
+ nic->port_id, queue_conf->ev.queue_id);
+ return ret;
+}
+
+static int
+ssovf_eth_rx_adapter_start(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev)
+{
+ int ret;
+ const struct octeontx_nic *nic = eth_dev->data->dev_private;
+ RTE_SET_USED(dev);
+
+ ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
+ if (ret)
+ return 0;
+ octeontx_pki_port_start(nic->port_id);
+ return 0;
+}
+
+
+static int
+ssovf_eth_rx_adapter_stop(const struct rte_eventdev *dev,
+ const struct rte_eth_dev *eth_dev)
+{
+ int ret;
+ const struct octeontx_nic *nic = eth_dev->data->dev_private;
+ RTE_SET_USED(dev);
+
+ ret = strncmp(eth_dev->data->name, "eth_octeontx", 12);
+ if (ret)
+ return 0;
+ octeontx_pki_port_stop(nic->port_id);
+ return 0;
+}
+
static void
ssovf_dump(struct rte_eventdev *dev, FILE *f)
{
@@ -488,6 +605,13 @@ static const struct rte_eventdev_ops ssovf_ops = {
.port_link = ssovf_port_link,
.port_unlink = ssovf_port_unlink,
.timeout_ticks = ssovf_timeout_ticks,
+
+ .eth_rx_adapter_caps_get = ssovf_eth_rx_adapter_caps_get,
+ .eth_rx_adapter_queue_add = ssovf_eth_rx_adapter_queue_add,
+ .eth_rx_adapter_queue_del = ssovf_eth_rx_adapter_queue_del,
+ .eth_rx_adapter_start = ssovf_eth_rx_adapter_start,
+ .eth_rx_adapter_stop = ssovf_eth_rx_adapter_stop,
+
.dump = ssovf_dump,
.dev_start = ssovf_start,
.dev_stop = ssovf_stop,
diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 1cdc8104..b093a3e7 100644
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -33,11 +33,11 @@
#ifndef __SSOVF_EVDEV_H__
#define __SSOVF_EVDEV_H__
-#include <rte_config.h>
#include <rte_eventdev_pmd_vdev.h>
#include <rte_io.h>
-#include "rte_pmd_octeontx_ssovf.h"
+#include <octeontx_mbox.h>
+#include <octeontx_ethdev.h>
#define EVENTDEV_NAME_OCTEONTX_PMD event_octeontx
@@ -58,10 +58,6 @@
RTE_LOG(ERR, EVENTDEV, "[%s] %s() " fmt "\n", \
RTE_STR(EVENTDEV_NAME_OCTEONTX_PMD), __func__, ## args)
-#define PCI_VENDOR_ID_CAVIUM 0x177D
-#define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF 0xA04B
-#define PCI_DEVICE_ID_OCTEONTX_SSOWS_VF 0xA04D
-
#define SSO_MAX_VHGRP (64)
#define SSO_MAX_VHWS (32)
@@ -76,7 +72,6 @@
#define SSO_VHGRP_XAQ_CNT (0x1B0ULL)
#define SSO_VHGRP_AQ_CNT (0x1C0ULL)
#define SSO_VHGRP_AQ_THR (0x1E0ULL)
-#define SSO_VHGRP_PF_MBOX(x) (0x200ULL | ((x) << 3))
/* BAR2 */
#define SSO_VHGRP_OP_ADD_WORK0 (0x00ULL)
@@ -107,8 +102,6 @@
#define SSOW_VHWS_OP_GET_WORK0 (0x80000ULL)
#define SSOW_VHWS_OP_GET_WORK1 (0x80008ULL)
-#define SSOW_BAR4_LEN (64 * 1024)
-
/* Mailbox message constants */
#define SSO_COPROC 0x2
diff --git a/drivers/event/octeontx/ssovf_mbox.c b/drivers/event/octeontx/ssovf_mbox.c
deleted file mode 100644
index 764414b5..00000000
--- a/drivers/event/octeontx/ssovf_mbox.c
+++ /dev/null
@@ -1,232 +0,0 @@
-/*
- * BSD LICENSE
- *
- * Copyright (C) Cavium, Inc. 2017.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Cavium, Inc nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#include <rte_atomic.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_io.h>
-#include <rte_spinlock.h>
-
-#include "ssovf_evdev.h"
-
-/* Mbox operation timeout in seconds */
-#define MBOX_WAIT_TIME_SEC 3
-#define MAX_RAM_MBOX_LEN ((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */)
-
-/* Mbox channel state */
-enum {
- MBOX_CHAN_STATE_REQ = 1,
- MBOX_CHAN_STATE_RES = 0,
-};
-
-/* Response messages */
-enum {
- MBOX_RET_SUCCESS,
- MBOX_RET_INVALID,
- MBOX_RET_INTERNAL_ERR,
-};
-
-struct mbox {
- int init_once;
- uint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */
- uint8_t *reg; /* Store to this register triggers PF mbox interrupt */
- uint16_t tag_own; /* Last tag which was written to own channel */
- rte_spinlock_t lock;
-};
-
-static struct mbox octeontx_mbox;
-
-/*
- * Structure used for mbox synchronization
- * This structure sits at the begin of Mbox RAM and used as main
- * synchronization point for channel communication
- */
-struct mbox_ram_hdr {
- union {
- uint64_t u64;
- struct {
- uint8_t chan_state : 1;
- uint8_t coproc : 7;
- uint8_t msg;
- uint8_t vfid;
- uint8_t res_code;
- uint16_t tag;
- uint16_t len;
- };
- };
-};
-
-static inline void
-mbox_send_request(struct mbox *m, struct octeontx_mbox_hdr *hdr,
- const void *txmsg, uint16_t txsize)
-{
- struct mbox_ram_hdr old_hdr;
- struct mbox_ram_hdr new_hdr = { {0} };
- uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
- uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
-
- /*
- * Initialize the channel with the tag left by last send.
- * On success full mbox send complete, PF increments the tag by one.
- * The sender can validate integrity of PF message with this scheme
- */
- old_hdr.u64 = rte_read64(ram_mbox_hdr);
- m->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */
-
- /* Copy msg body */
- if (txmsg)
- memcpy(ram_mbox_msg, txmsg, txsize);
-
- /* Prepare new hdr */
- new_hdr.chan_state = MBOX_CHAN_STATE_REQ;
- new_hdr.coproc = hdr->coproc;
- new_hdr.msg = hdr->msg;
- new_hdr.vfid = hdr->vfid;
- new_hdr.tag = m->tag_own;
- new_hdr.len = txsize;
-
- /* Write the msg header */
- rte_write64(new_hdr.u64, ram_mbox_hdr);
- rte_io_wmb();
- /* Notify PF about the new msg - write to MBOX reg generates PF IRQ */
- rte_write64(0, m->reg);
-}
-
-static inline int
-mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
- void *rxmsg, uint16_t rxsize)
-{
- int res = 0, wait;
- uint16_t len;
- struct mbox_ram_hdr rx_hdr;
- uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
- uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
-
- /* Wait for response */
- wait = MBOX_WAIT_TIME_SEC * 1000 * 10;
- while (wait > 0) {
- rte_delay_us(100);
- rx_hdr.u64 = rte_read64(ram_mbox_hdr);
- if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
- break;
- --wait;
- }
-
- hdr->res_code = rx_hdr.res_code;
- m->tag_own++;
-
- /* Timeout */
- if (wait <= 0) {
- res = -ETIMEDOUT;
- goto error;
- }
-
- /* Tag mismatch */
- if (m->tag_own != rx_hdr.tag) {
- res = -EINVAL;
- goto error;
- }
-
- /* PF nacked the msg */
- if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
- res = -EBADMSG;
- goto error;
- }
-
- len = RTE_MIN(rx_hdr.len, rxsize);
- if (rxmsg)
- memcpy(rxmsg, ram_mbox_msg, len);
-
- return len;
-
-error:
- ssovf_log_err("Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)",
- m->tag_own, rx_hdr.tag, hdr->coproc, hdr->msg, res,
- hdr->res_code);
- return res;
-}
-
-static inline int
-mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg,
- uint16_t txsize, void *rxmsg, uint16_t rxsize)
-{
- int res = -EINVAL;
-
- if (m->init_once == 0 || hdr == NULL ||
- txsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) {
- ssovf_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
- m->init_once, hdr, txsize, rxsize);
- return res;
- }
-
- rte_spinlock_lock(&m->lock);
-
- mbox_send_request(m, hdr, txmsg, txsize);
- res = mbox_wait_response(m, hdr, rxmsg, rxsize);
-
- rte_spinlock_unlock(&m->lock);
- return res;
-}
-
-static inline int
-mbox_setup(struct mbox *m)
-{
- if (unlikely(m->init_once == 0)) {
- rte_spinlock_init(&m->lock);
- m->ram_mbox_base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, 0, 4);
- m->reg = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, 0, 0);
- m->reg += SSO_VHGRP_PF_MBOX(1);
-
- if (m->ram_mbox_base == NULL || m->reg == NULL) {
- ssovf_log_err("Invalid ram_mbox_base=%p or reg=%p",
- m->ram_mbox_base, m->reg);
- return -EINVAL;
- }
- m->init_once = 1;
- }
- return 0;
-}
-
-int
-octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata,
- uint16_t txlen, void *rxdata, uint16_t rxlen)
-{
- struct mbox *m = &octeontx_mbox;
-
- RTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8);
- if (rte_eal_process_type() != RTE_PROC_PRIMARY || mbox_setup(m))
- return -EINVAL;
-
- return mbox_send(m, hdr, txdata, txlen, rxdata, rxlen);
-}
diff --git a/drivers/event/octeontx/ssovf_probe.c b/drivers/event/octeontx/ssovf_probe.c
deleted file mode 100644
index e1c0c6d5..00000000
--- a/drivers/event/octeontx/ssovf_probe.c
+++ /dev/null
@@ -1,288 +0,0 @@
-/*
- * BSD LICENSE
- *
- * Copyright (C) Cavium, Inc. 2017.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- * * Neither the name of Cavium, Inc nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <rte_atomic.h>
-#include <rte_common.h>
-#include <rte_eal.h>
-#include <rte_io.h>
-#include <rte_pci.h>
-
-#include "ssovf_evdev.h"
-
-struct ssovf_res {
- uint16_t domain;
- uint16_t vfid;
- void *bar0;
- void *bar2;
-};
-
-struct ssowvf_res {
- uint16_t domain;
- uint16_t vfid;
- void *bar0;
- void *bar2;
- void *bar4;
-};
-
-struct ssowvf_identify {
- uint16_t domain;
- uint16_t vfid;
-};
-
-struct ssodev {
- uint8_t total_ssovfs;
- uint8_t total_ssowvfs;
- struct ssovf_res grp[SSO_MAX_VHGRP];
- struct ssowvf_res hws[SSO_MAX_VHWS];
-};
-
-static struct ssodev sdev;
-
-/* Interface functions */
-int
-octeontx_ssovf_info(struct octeontx_ssovf_info *info)
-{
- uint8_t i;
- uint16_t domain;
-
- if (rte_eal_process_type() != RTE_PROC_PRIMARY || info == NULL)
- return -EINVAL;
-
- if (sdev.total_ssovfs == 0 || sdev.total_ssowvfs == 0)
- return -ENODEV;
-
- domain = sdev.grp[0].domain;
- for (i = 0; i < sdev.total_ssovfs; i++) {
- /* Check vfid's are contiguous and belong to same domain */
- if (sdev.grp[i].vfid != i ||
- sdev.grp[i].bar0 == NULL ||
- sdev.grp[i].domain != domain) {
- ssovf_log_err("GRP error, vfid=%d/%d domain=%d/%d %p",
- i, sdev.grp[i].vfid,
- domain, sdev.grp[i].domain,
- sdev.grp[i].bar0);
- return -EINVAL;
- }
- }
-
- for (i = 0; i < sdev.total_ssowvfs; i++) {
- /* Check vfid's are contiguous and belong to same domain */
- if (sdev.hws[i].vfid != i ||
- sdev.hws[i].bar0 == NULL ||
- sdev.hws[i].domain != domain) {
- ssovf_log_err("HWS error, vfid=%d/%d domain=%d/%d %p",
- i, sdev.hws[i].vfid,
- domain, sdev.hws[i].domain,
- sdev.hws[i].bar0);
- return -EINVAL;
- }
- }
-
- info->domain = domain;
- info->total_ssovfs = sdev.total_ssovfs;
- info->total_ssowvfs = sdev.total_ssowvfs;
- return 0;
-}
-
-void*
-octeontx_ssovf_bar(enum octeontx_ssovf_type type, uint8_t id, uint8_t bar)
-{
- if (rte_eal_process_type() != RTE_PROC_PRIMARY ||
- type > OCTEONTX_SSO_HWS)
- return NULL;
-
- if (type == OCTEONTX_SSO_GROUP) {
- if (id >= sdev.total_ssovfs)
- return NULL;
- } else {
- if (id >= sdev.total_ssowvfs)
- return NULL;
- }
-
- if (type == OCTEONTX_SSO_GROUP) {
- switch (bar) {
- case 0:
- return sdev.grp[id].bar0;
- case 2:
- return sdev.grp[id].bar2;
- default:
- return NULL;
- }
- } else {
- switch (bar) {
- case 0:
- return sdev.hws[id].bar0;
- case 2:
- return sdev.hws[id].bar2;
- case 4:
- return sdev.hws[id].bar4;
- default:
- return NULL;
- }
- }
-}
-
-/* SSOWVF pcie device aka event port probe */
-
-static int
-ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
-{
- uint16_t vfid;
- struct ssowvf_res *res;
- struct ssowvf_identify *id;
-
- RTE_SET_USED(pci_drv);
-
- /* For secondary processes, the primary has done all the work */
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
- return 0;
-
- if (pci_dev->mem_resource[0].addr == NULL ||
- pci_dev->mem_resource[2].addr == NULL ||
- pci_dev->mem_resource[4].addr == NULL) {
- ssovf_log_err("Empty bars %p %p %p",
- pci_dev->mem_resource[0].addr,
- pci_dev->mem_resource[2].addr,
- pci_dev->mem_resource[4].addr);
- return -ENODEV;
- }
-
- if (pci_dev->mem_resource[4].len != SSOW_BAR4_LEN) {
- ssovf_log_err("Bar4 len mismatch %d != %d",
- SSOW_BAR4_LEN, (int)pci_dev->mem_resource[4].len);
- return -EINVAL;
- }
-
- id = pci_dev->mem_resource[4].addr;
- vfid = id->vfid;
- if (vfid >= SSO_MAX_VHWS) {
- ssovf_log_err("Invalid vfid(%d/%d)", vfid, SSO_MAX_VHWS);
- return -EINVAL;
- }
-
- res = &sdev.hws[vfid];
- res->vfid = vfid;
- res->bar0 = pci_dev->mem_resource[0].addr;
- res->bar2 = pci_dev->mem_resource[2].addr;
- res->bar4 = pci_dev->mem_resource[4].addr;
- res->domain = id->domain;
-
- sdev.total_ssowvfs++;
- rte_wmb();
- ssovf_log_dbg("Domain=%d hws=%d total_ssowvfs=%d", res->domain,
- res->vfid, sdev.total_ssowvfs);
- return 0;
-}
-
-static const struct rte_pci_id pci_ssowvf_map[] = {
- {
- RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
- PCI_DEVICE_ID_OCTEONTX_SSOWS_VF)
- },
- {
- .vendor_id = 0,
- },
-};
-
-static struct rte_pci_driver pci_ssowvf = {
- .id_table = pci_ssowvf_map,
- .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
- .probe = ssowvf_probe,
-};
-
-RTE_PMD_REGISTER_PCI(octeontx_ssowvf, pci_ssowvf);
-
-/* SSOVF pcie device aka event queue probe */
-
-static int
-ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
-{
- uint64_t val;
- uint16_t vfid;
- uint8_t *idreg;
- struct ssovf_res *res;
-
- RTE_SET_USED(pci_drv);
-
- /* For secondary processes, the primary has done all the work */
- if (rte_eal_process_type() != RTE_PROC_PRIMARY)
- return 0;
-
- if (pci_dev->mem_resource[0].addr == NULL ||
- pci_dev->mem_resource[2].addr == NULL) {
- ssovf_log_err("Empty bars %p %p",
- pci_dev->mem_resource[0].addr,
- pci_dev->mem_resource[2].addr);
- return -ENODEV;
- }
- idreg = pci_dev->mem_resource[0].addr;
- idreg += SSO_VHGRP_AQ_THR;
- val = rte_read64(idreg);
-
- /* Write back the default value of aq_thr */
- rte_write64((1ULL << 33) - 1, idreg);
- vfid = (val >> 16) & 0xffff;
- if (vfid >= SSO_MAX_VHGRP) {
- ssovf_log_err("Invalid vfid (%d/%d)", vfid, SSO_MAX_VHGRP);
- return -EINVAL;
- }
-
- res = &sdev.grp[vfid];
- res->vfid = vfid;
- res->bar0 = pci_dev->mem_resource[0].addr;
- res->bar2 = pci_dev->mem_resource[2].addr;
- res->domain = val & 0xffff;
-
- sdev.total_ssovfs++;
- rte_wmb();
- ssovf_log_dbg("Domain=%d group=%d total_ssovfs=%d", res->domain,
- res->vfid, sdev.total_ssovfs);
- return 0;
-}
-
-static const struct rte_pci_id pci_ssovf_map[] = {
- {
- RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
- PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF)
- },
- {
- .vendor_id = 0,
- },
-};
-
-static struct rte_pci_driver pci_ssovf = {
- .id_table = pci_ssovf_map,
- .drv_flags = RTE_PCI_DRV_NEED_MAPPING,
- .probe = ssovf_probe,
-};
-
-RTE_PMD_REGISTER_PCI(octeontx_ssovf, pci_ssovf);
diff --git a/drivers/event/octeontx/ssovf_worker.h b/drivers/event/octeontx/ssovf_worker.h
index 55f72555..bf76ac88 100644
--- a/drivers/event/octeontx/ssovf_worker.h
+++ b/drivers/event/octeontx/ssovf_worker.h
@@ -34,7 +34,10 @@
#include <rte_common.h>
#include <rte_branch_prediction.h>
+#include <octeontx_mbox.h>
+
#include "ssovf_evdev.h"
+#include "octeontx_rxtx.h"
enum {
SSO_SYNC_ORDERED,
@@ -49,6 +52,28 @@ enum {
/* SSO Operations */
+static __rte_always_inline struct rte_mbuf *
+ssovf_octeontx_wqe_to_pkt(uint64_t work, uint16_t port_id)
+{
+ struct rte_mbuf *mbuf;
+ octtx_wqe_t *wqe = (octtx_wqe_t *)(uintptr_t)work;
+ rte_prefetch_non_temporal(wqe);
+
+ /* Get mbuf from wqe */
+ mbuf = (struct rte_mbuf *)((uintptr_t)wqe -
+ OCTTX_PACKET_WQE_SKIP);
+ mbuf->packet_type =
+ ptype_table[wqe->s.w2.lcty][wqe->s.w2.lety][wqe->s.w2.lfty];
+ mbuf->data_off = RTE_PTR_DIFF(wqe->s.w3.addr, mbuf->buf_addr);
+ mbuf->pkt_len = wqe->s.w1.len;
+ mbuf->data_len = mbuf->pkt_len;
+ mbuf->nb_segs = 1;
+ mbuf->ol_flags = 0;
+ mbuf->port = port_id;
+ rte_mbuf_refcnt_set(mbuf, 1);
+ return mbuf;
+}
+
static __rte_always_inline uint16_t
ssows_get_work(struct ssows *ws, struct rte_event *ev)
{
@@ -61,9 +86,14 @@ ssows_get_work(struct ssows *ws, struct rte_event *ev)
ws->cur_tt = sched_type_queue & 0x3;
ws->cur_grp = sched_type_queue >> 2;
sched_type_queue = sched_type_queue << 38;
-
ev->event = sched_type_queue | (get_work0 & 0xffffffff);
- ev->u64 = get_work1;
+ if (get_work1 && ev->event_type == RTE_EVENT_TYPE_ETHDEV) {
+ ev->mbuf = ssovf_octeontx_wqe_to_pkt(get_work1,
+ (ev->event >> 20) & 0xF);
+ } else {
+ ev->u64 = get_work1;
+ }
+
return !!get_work1;
}