10 files changed, 98 insertions, 585 deletions

diff --git a/drivers/mempool/octeontx/Makefile b/drivers/mempool/octeontx/Makefile
index dfc373e6..a3e1dce8 100644
--- a/drivers/mempool/octeontx/Makefile
+++ b/drivers/mempool/octeontx/Makefile
@@ -10,6 +10,7 @@ include $(RTE_SDK)/mk/rte.vars.mk
 LIB = librte_mempool_octeontx.a
 
 CFLAGS += $(WERROR_FLAGS)
+CFLAGS += -I$(RTE_SDK)/drivers/common/octeontx/
 EXPORT_MAP := rte_mempool_octeontx_version.map
 
 LIBABIVER := 1
@@ -17,8 +18,6 @@ LIBABIVER := 1
 #
 # all source are stored in SRCS-y
 #
-SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += octeontx_ssovf.c
-SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += octeontx_mbox.c
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += octeontx_fpavf.c
 SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += rte_mempool_octeontx.c
 
@@ -36,6 +35,6 @@ CFLAGS_rte_mempool_octeontx.o += -Ofast
 endif
 
 LDLIBS += -lrte_eal -lrte_mempool -lrte_ring -lrte_mbuf
-LDLIBS += -lrte_bus_pci
+LDLIBS += -lrte_bus_pci -lrte_common_octeontx
 
 include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/mempool/octeontx/meson.build b/drivers/mempool/octeontx/meson.build
index 1e894a56..3baaf7db 100644
--- a/drivers/mempool/octeontx/meson.build
+++ b/drivers/mempool/octeontx/meson.build
@@ -1,10 +1,8 @@
 # SPDX-License-Identifier: BSD-3-Clause
 # Copyright(c) 2017 Cavium, Inc
 
-sources = files('octeontx_ssovf.c',
-		'octeontx_mbox.c',
-		'octeontx_fpavf.c',
+sources = files('octeontx_fpavf.c',
 		'rte_mempool_octeontx.c'
 )
 
-deps += ['mbuf', 'bus_pci']
+deps += ['mbuf', 'bus_pci', 'common_octeontx']
diff --git a/drivers/mempool/octeontx/octeontx_fpavf.c b/drivers/mempool/octeontx/octeontx_fpavf.c
index 61c72c7c..4cf387e8 100644
--- a/drivers/mempool/octeontx/octeontx_fpavf.c
+++ b/drivers/mempool/octeontx/octeontx_fpavf.c
@@ -108,17 +108,11 @@ static struct octeontx_fpadev fpadev;
 int octeontx_logtype_fpavf;
 int octeontx_logtype_fpavf_mbox;
 
-RTE_INIT(otx_pool_init_log);
-static void
-otx_pool_init_log(void)
+RTE_INIT(otx_pool_init_log)
 {
 	octeontx_logtype_fpavf = rte_log_register("pmd.mempool.octeontx");
 	if (octeontx_logtype_fpavf >= 0)
 		rte_log_set_level(octeontx_logtype_fpavf, RTE_LOG_NOTICE);
-
-	octeontx_logtype_fpavf_mbox = rte_log_register("pmd.mempool.octeontx.mbox");
-	if (octeontx_logtype_fpavf_mbox >= 0)
-		rte_log_set_level(octeontx_logtype_fpavf_mbox, RTE_LOG_NOTICE);
 }
 
 /* lock is taken by caller */
@@ -247,13 +241,13 @@ octeontx_fpapf_pool_setup(unsigned int gpool, unsigned int buf_size,
 		POOL_LTYPE(0x2) | POOL_STYPE(0) | POOL_SET_NAT_ALIGN |
 		POOL_ENA;
 
-	cfg.aid = 0;
+	cfg.aid = FPA_AURA_IDX(gpool);
 	cfg.pool_cfg = reg;
 	cfg.pool_stack_base = phys_addr;
 	cfg.pool_stack_end = phys_addr + memsz;
 	cfg.aura_cfg = (1 << 9);
 
-	ret = octeontx_ssovf_mbox_send(&hdr, &cfg,
+	ret = octeontx_mbox_send(&hdr, &cfg,
 					sizeof(struct octeontx_mbox_fpa_cfg),
 					&resp, sizeof(resp));
 	if (ret < 0) {
@@ -298,7 +292,7 @@ octeontx_fpapf_pool_destroy(unsigned int gpool_index)
 	cfg.pool_stack_end = 0;
 	cfg.aura_cfg = 0;
 
-	ret = octeontx_ssovf_mbox_send(&hdr, &cfg,
+	ret = octeontx_mbox_send(&hdr, &cfg,
 					sizeof(struct octeontx_mbox_fpa_cfg),
 					&resp, sizeof(resp));
 	if (ret < 0) {
@@ -331,15 +325,16 @@ octeontx_fpapf_aura_attach(unsigned int gpool_index)
 	hdr.vfid = gpool_index;
 	hdr.res_code = 0;
 	memset(&cfg, 0x0, sizeof(struct octeontx_mbox_fpa_cfg));
-	cfg.aid = gpool_index; /* gpool is guara */
+	cfg.aid = FPA_AURA_IDX(gpool_index);
 
-	ret = octeontx_ssovf_mbox_send(&hdr, &cfg,
+	ret = octeontx_mbox_send(&hdr, &cfg,
 					sizeof(struct octeontx_mbox_fpa_cfg),
 					&resp, sizeof(resp));
 	if (ret < 0) {
 		fpavf_log_err("Could not attach fpa ");
 		fpavf_log_err("aura %d to pool %d. Err=%d. FuncErr=%d\n",
-			      gpool_index, gpool_index, ret, hdr.res_code);
+			      FPA_AURA_IDX(gpool_index), gpool_index, ret,
+			      hdr.res_code);
 		ret = -EACCES;
 		goto err;
 	}
@@ -359,14 +354,15 @@ octeontx_fpapf_aura_detach(unsigned int gpool_index)
 		goto err;
 	}
 
-	cfg.aid = gpool_index; /* gpool is gaura */
+	cfg.aid = FPA_AURA_IDX(gpool_index);
 	hdr.coproc = FPA_COPROC;
 	hdr.msg = FPA_DETACHAURA;
 	hdr.vfid = gpool_index;
-	ret = octeontx_ssovf_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0);
+	ret = octeontx_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0);
 	if (ret < 0) {
 		fpavf_log_err("Couldn't detach FPA aura %d Err=%d FuncErr=%d\n",
-			      gpool_index, ret, hdr.res_code);
+			      FPA_AURA_IDX(gpool_index), ret,
+			      hdr.res_code);
 		ret = -EINVAL;
 	}
 
@@ -410,7 +406,7 @@ octeontx_fpapf_start_count(uint16_t gpool_index)
 	hdr.coproc = FPA_COPROC;
 	hdr.msg = FPA_START_COUNT;
 	hdr.vfid = gpool_index;
-	ret = octeontx_ssovf_mbox_send(&hdr, NULL, 0, NULL, 0);
+	ret = octeontx_mbox_send(&hdr, NULL, 0, NULL, 0);
 	if (ret < 0) {
 		fpavf_log_err("Could not start buffer counting for ");
 		fpavf_log_err("FPA pool %d. Err=%d. FuncErr=%d\n",
@@ -473,6 +469,7 @@ octeontx_fpa_bufpool_free_count(uintptr_t handle)
 {
 	uint64_t cnt, limit, avail;
 	uint8_t gpool;
+	uint16_t gaura;
 	uintptr_t pool_bar;
 
 	if (unlikely(!octeontx_fpa_handle_valid(handle)))
@@ -480,14 +477,16 @@ octeontx_fpa_bufpool_free_count(uintptr_t handle)
 
 	/* get the gpool */
 	gpool = octeontx_fpa_bufpool_gpool(handle);
+	/* get the aura */
+	gaura = octeontx_fpa_bufpool_gaura(handle);
 
 	/* Get pool bar address from handle */
 	pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
 
 	cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
-				FPA_VF_VHAURA_CNT(gpool)));
+				FPA_VF_VHAURA_CNT(gaura)));
 	limit = fpavf_read64((void *)((uintptr_t)pool_bar +
-				FPA_VF_VHAURA_CNT_LIMIT(gpool)));
+				FPA_VF_VHAURA_CNT_LIMIT(gaura)));
 
 	avail = fpavf_read64((void *)((uintptr_t)pool_bar +
 				FPA_VF_VHPOOL_AVAILABLE(gpool)));
@@ -500,6 +499,7 @@ octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,
 				unsigned int buf_offset, int node_id)
 {
 	unsigned int gpool;
+	unsigned int gaura;
 	uintptr_t gpool_handle;
 	uintptr_t pool_bar;
 	int res;
@@ -549,16 +549,18 @@ octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,
 		goto error_pool_destroy;
 	}
 
+	gaura = FPA_AURA_IDX(gpool);
+
 	/* Release lock */
 	rte_spinlock_unlock(&fpadev.lock);
 
 	/* populate AURA registers */
 	fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
-			 FPA_VF_VHAURA_CNT(gpool)));
+			 FPA_VF_VHAURA_CNT(gaura)));
 	fpavf_write64(object_count, (void *)((uintptr_t)pool_bar +
-			 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
+			 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
 	fpavf_write64(object_count + 1, (void *)((uintptr_t)pool_bar +
-			 FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
+			 FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
 
 	octeontx_fpapf_start_count(gpool);
 
@@ -585,6 +587,7 @@ octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
 	uint64_t sz;
 	uint64_t cnt, avail;
 	uint8_t gpool;
+	uint16_t gaura;
 	uintptr_t pool_bar;
 	int ret;
 
@@ -598,13 +601,15 @@ octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
 
 	/* get the pool */
 	gpool = octeontx_fpa_bufpool_gpool(handle);
+	/* get the aura */
+	gaura = octeontx_fpa_bufpool_gaura(handle);
 
 	/* Get pool bar address from handle */
 	pool_bar = handle & ~(uint64_t)FPA_GPOOL_MASK;
 
 	 /* Check for no outstanding buffers */
 	cnt = fpavf_read64((void *)((uintptr_t)pool_bar +
-					FPA_VF_VHAURA_CNT(gpool)));
+					FPA_VF_VHAURA_CNT(gaura)));
 	if (cnt) {
 		fpavf_log_dbg("buffer exist in pool cnt %" PRId64 "\n", cnt);
 		return -EBUSY;
@@ -617,9 +622,9 @@ octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
 
 	/* Prepare to empty the entire POOL */
 	fpavf_write64(avail, (void *)((uintptr_t)pool_bar +
-			 FPA_VF_VHAURA_CNT_LIMIT(gpool)));
+			 FPA_VF_VHAURA_CNT_LIMIT(gaura)));
 	fpavf_write64(avail + 1, (void *)((uintptr_t)pool_bar +
-			 FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
+			 FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
 
 	/* Empty the pool */
 	/* Invalidate the POOL */
@@ -631,11 +636,11 @@ octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
 		/* Yank a buffer from the pool */
 		node = (void *)(uintptr_t)
 			fpavf_read64((void *)
-				    (pool_bar + FPA_VF_VHAURA_OP_ALLOC(gpool)));
+				    (pool_bar + FPA_VF_VHAURA_OP_ALLOC(gaura)));
 
 		if (node == NULL) {
 			fpavf_log_err("GAURA[%u] missing %" PRIx64 " buf\n",
-				      gpool, avail);
+				      gaura, avail);
 			break;
 		}
 
@@ -669,9 +674,9 @@ octeontx_fpa_bufpool_destroy(uintptr_t handle, int node_id)
 
 	/* Deactivate the AURA */
 	fpavf_write64(0, (void *)((uintptr_t)pool_bar +
-			FPA_VF_VHAURA_CNT_LIMIT(gpool)));
+			FPA_VF_VHAURA_CNT_LIMIT(gaura)));
 	fpavf_write64(0, (void *)((uintptr_t)pool_bar +
-			FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));
+			FPA_VF_VHAURA_CNT_THRESHOLD(gaura)));
 
 	ret = octeontx_fpapf_aura_detach(gpool);
 	if (ret) {
diff --git a/drivers/mempool/octeontx/octeontx_fpavf.h b/drivers/mempool/octeontx/octeontx_fpavf.h
index b76f40e7..b00be137 100644
--- a/drivers/mempool/octeontx/octeontx_fpavf.h
+++ b/drivers/mempool/octeontx/octeontx_fpavf.h
@@ -14,6 +14,7 @@
 
 #define	FPA_VF_MAX			32
 #define FPA_GPOOL_MASK			(FPA_VF_MAX-1)
+#define FPA_GAURA_SHIFT			4
 
 /* FPA VF register offsets */
 #define FPA_VF_INT(x)			(0x200ULL | ((x) << 22))
@@ -36,6 +37,7 @@
 #define FPA_VF_FREE_ADDRS_S(x, y, z)	\
 	((x) | (((y) & 0x1ff) << 3) | ((((z) & 1)) << 14))
 
+#define FPA_AURA_IDX(gpool)			(gpool << FPA_GAURA_SHIFT)
 /* FPA VF register offsets from VF_BAR4, size 2 MByte */
 #define	FPA_VF_MSIX_VEC_ADDR		0x00000
 #define	FPA_VF_MSIX_VEC_CTL		0x00008
@@ -102,4 +104,11 @@ octeontx_fpa_bufpool_gpool(uintptr_t handle)
 {
 	return (uint8_t)handle & FPA_GPOOL_MASK;
 }
+
+static __rte_always_inline uint16_t
+octeontx_fpa_bufpool_gaura(uintptr_t handle)
+{
+	return octeontx_fpa_bufpool_gpool(handle) << FPA_GAURA_SHIFT;
+}
+
 #endif	/* __OCTEONTX_FPAVF_H__ */
diff --git a/drivers/mempool/octeontx/octeontx_mbox.c b/drivers/mempool/octeontx/octeontx_mbox.c
deleted file mode 100644
index f8cb6a45..00000000
--- a/drivers/mempool/octeontx/octeontx_mbox.c
+++ /dev/null
@@ -1,214 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 Cavium, Inc
- */
-
-#include <string.h>
-
-#include <rte_atomic.h>
-#include <rte_common.h>
-#include <rte_cycles.h>
-#include <rte_io.h>
-#include <rte_spinlock.h>
-
-#include "octeontx_mbox.h"
-#include "octeontx_pool_logs.h"
-
-/* Mbox operation timeout in seconds */
-#define MBOX_WAIT_TIME_SEC	3
-#define MAX_RAM_MBOX_LEN	((SSOW_BAR4_LEN >> 1) - 8 /* Mbox header */)
-
-/* Mbox channel state */
-enum {
-	MBOX_CHAN_STATE_REQ = 1,
-	MBOX_CHAN_STATE_RES = 0,
-};
-
-/* Response messages */
-enum {
-	MBOX_RET_SUCCESS,
-	MBOX_RET_INVALID,
-	MBOX_RET_INTERNAL_ERR,
-};
-
-struct mbox {
-	int init_once;
-	uint8_t *ram_mbox_base; /* Base address of mbox message stored in ram */
-	uint8_t *reg; /* Store to this register triggers PF mbox interrupt */
-	uint16_t tag_own; /* Last tag which was written to own channel */
-	rte_spinlock_t lock;
-};
-
-static struct mbox octeontx_mbox;
-
-/*
- * Structure used for mbox synchronization
- * This structure sits at the begin of Mbox RAM and used as main
- * synchronization point for channel communication
- */
-struct mbox_ram_hdr {
-	union {
-		uint64_t u64;
-		struct {
-			uint8_t chan_state : 1;
-			uint8_t coproc : 7;
-			uint8_t msg;
-			uint8_t vfid;
-			uint8_t res_code;
-			uint16_t tag;
-			uint16_t len;
-		};
-	};
-};
-
-static inline void
-mbox_msgcpy(volatile uint8_t *d, volatile const uint8_t *s, uint16_t size)
-{
-	uint16_t i;
-
-	for (i = 0; i < size; i++)
-		d[i] = s[i];
-}
-
-static inline void
-mbox_send_request(struct mbox *m, struct octeontx_mbox_hdr *hdr,
-			const void *txmsg, uint16_t txsize)
-{
-	struct mbox_ram_hdr old_hdr;
-	struct mbox_ram_hdr new_hdr = { {0} };
-	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
-	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
-
-	/*
-	 * Initialize the channel with the tag left by last send.
-	 * On success full mbox send complete, PF increments the tag by one.
-	 * The sender can validate integrity of PF message with this scheme
-	 */
-	old_hdr.u64 = rte_read64(ram_mbox_hdr);
-	m->tag_own = (old_hdr.tag + 2) & (~0x1ul); /* next even number */
-
-	/* Copy msg body */
-	if (txmsg)
-		mbox_msgcpy(ram_mbox_msg, txmsg, txsize);
-
-	/* Prepare new hdr */
-	new_hdr.chan_state = MBOX_CHAN_STATE_REQ;
-	new_hdr.coproc = hdr->coproc;
-	new_hdr.msg = hdr->msg;
-	new_hdr.vfid = hdr->vfid;
-	new_hdr.tag = m->tag_own;
-	new_hdr.len = txsize;
-
-	/* Write the msg header */
-	rte_write64(new_hdr.u64, ram_mbox_hdr);
-	rte_smp_wmb();
-	/* Notify PF about the new msg - write to MBOX reg generates PF IRQ */
-	rte_write64(0, m->reg);
-}
-
-static inline int
-mbox_wait_response(struct mbox *m, struct octeontx_mbox_hdr *hdr,
-			void *rxmsg, uint16_t rxsize)
-{
-	int res = 0, wait;
-	uint16_t len;
-	struct mbox_ram_hdr rx_hdr;
-	uint64_t *ram_mbox_hdr = (uint64_t *)m->ram_mbox_base;
-	uint8_t *ram_mbox_msg = m->ram_mbox_base + sizeof(struct mbox_ram_hdr);
-
-	/* Wait for response */
-	wait = MBOX_WAIT_TIME_SEC * 1000 * 10;
-	while (wait > 0) {
-		rte_delay_us(100);
-		rx_hdr.u64 = rte_read64(ram_mbox_hdr);
-		if (rx_hdr.chan_state == MBOX_CHAN_STATE_RES)
-			break;
-		--wait;
-	}
-
-	hdr->res_code = rx_hdr.res_code;
-	m->tag_own++;
-
-	/* Timeout */
-	if (wait <= 0) {
-		res = -ETIMEDOUT;
-		goto error;
-	}
-
-	/* Tag mismatch */
-	if (m->tag_own != rx_hdr.tag) {
-		res = -EINVAL;
-		goto error;
-	}
-
-	/* PF nacked the msg */
-	if (rx_hdr.res_code != MBOX_RET_SUCCESS) {
-		res = -EBADMSG;
-		goto error;
-	}
-
-	len = RTE_MIN(rx_hdr.len, rxsize);
-	if (rxmsg)
-		mbox_msgcpy(rxmsg, ram_mbox_msg, len);
-
-	return len;
-
-error:
-	mbox_log_err("Failed to send mbox(%d/%d) coproc=%d msg=%d ret=(%d,%d)",
-			m->tag_own, rx_hdr.tag, hdr->coproc, hdr->msg, res,
-			hdr->res_code);
-	return res;
-}
-
-static inline int
-mbox_send(struct mbox *m, struct octeontx_mbox_hdr *hdr, const void *txmsg,
-		uint16_t txsize, void *rxmsg, uint16_t rxsize)
-{
-	int res = -EINVAL;
-
-	if (m->init_once == 0 || hdr == NULL ||
-		txsize > MAX_RAM_MBOX_LEN || rxsize > MAX_RAM_MBOX_LEN) {
-		mbox_log_err("Invalid init_once=%d hdr=%p txsz=%d rxsz=%d",
-				m->init_once, hdr, txsize, rxsize);
-		return res;
-	}
-
-	rte_spinlock_lock(&m->lock);
-
-	mbox_send_request(m, hdr, txmsg, txsize);
-	res = mbox_wait_response(m, hdr, rxmsg, rxsize);
-
-	rte_spinlock_unlock(&m->lock);
-	return res;
-}
-
-static inline int
-mbox_setup(struct mbox *m)
-{
-	if (unlikely(m->init_once == 0)) {
-		rte_spinlock_init(&m->lock);
-		m->ram_mbox_base = octeontx_ssovf_bar(OCTEONTX_SSO_HWS, 0, 4);
-		m->reg = octeontx_ssovf_bar(OCTEONTX_SSO_GROUP, 0, 0);
-		m->reg += SSO_VHGRP_PF_MBOX(1);
-
-		if (m->ram_mbox_base == NULL || m->reg == NULL) {
-			mbox_log_err("Invalid ram_mbox_base=%p or reg=%p",
-				m->ram_mbox_base, m->reg);
-			return -EINVAL;
-		}
-		m->init_once = 1;
-	}
-	return 0;
-}
-
-int
-octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr, void *txdata,
-				 uint16_t txlen, void *rxdata, uint16_t rxlen)
-{
-	struct mbox *m = &octeontx_mbox;
-
-	RTE_BUILD_BUG_ON(sizeof(struct mbox_ram_hdr) != 8);
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY || mbox_setup(m))
-		return -EINVAL;
-
-	return mbox_send(m, hdr, txdata, txlen, rxdata, rxlen);
-}
diff --git a/drivers/mempool/octeontx/octeontx_mbox.h b/drivers/mempool/octeontx/octeontx_mbox.h
deleted file mode 100644
index 1b056071..00000000
--- a/drivers/mempool/octeontx/octeontx_mbox.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 Cavium, Inc
- */
-
-#ifndef __OCTEONTX_MBOX_H__
-#define __OCTEONTX_MBOX_H__
-
-#include <rte_common.h>
-
-#define SSOW_BAR4_LEN			(64 * 1024)
-#define SSO_VHGRP_PF_MBOX(x)		(0x200ULL | ((x) << 3))
-
-struct octeontx_ssovf_info {
-	uint16_t domain; /* Domain id */
-	uint8_t total_ssovfs; /* Total sso groups available in domain */
-	uint8_t total_ssowvfs;/* Total sso hws available in domain */
-};
-
-enum octeontx_ssovf_type {
-	OCTEONTX_SSO_GROUP, /* SSO group vf */
-	OCTEONTX_SSO_HWS,  /* SSO hardware workslot vf */
-};
-
-struct octeontx_mbox_hdr {
-	uint16_t vfid;  /* VF index or pf resource index local to the domain */
-	uint8_t coproc; /* Coprocessor id */
-	uint8_t msg;    /* Message id */
-	uint8_t res_code; /* Functional layer response code */
-};
-
-int octeontx_ssovf_info(struct octeontx_ssovf_info *info);
-void *octeontx_ssovf_bar(enum octeontx_ssovf_type, uint8_t id, uint8_t bar);
-int octeontx_ssovf_mbox_send(struct octeontx_mbox_hdr *hdr,
-		void *txdata, uint16_t txlen, void *rxdata, uint16_t rxlen);
-
-#endif /* __OCTEONTX_MBOX_H__ */
diff --git a/drivers/mempool/octeontx/octeontx_pool_logs.h b/drivers/mempool/octeontx/octeontx_pool_logs.h
index 95865192..7b4e1b38 100644
--- a/drivers/mempool/octeontx/octeontx_pool_logs.h
+++ b/drivers/mempool/octeontx/octeontx_pool_logs.h
@@ -11,21 +11,12 @@
 	rte_log(RTE_LOG_ ## level, octeontx_logtype_fpavf,\
 			"%s() line %u: " fmt "\n", __func__, __LINE__, ## args)
 
-#define MBOX_LOG(level, fmt, args...) \
-	rte_log(RTE_LOG_ ## level, octeontx_logtype_fpavf_mbox,\
-			"%s() line %u: " fmt "\n", __func__, __LINE__, ## args)
-
 #define fpavf_log_info(fmt, ...) FPAVF_LOG(INFO, fmt, ##__VA_ARGS__)
 #define fpavf_log_dbg(fmt, ...) FPAVF_LOG(DEBUG, fmt, ##__VA_ARGS__)
 #define fpavf_log_err(fmt, ...) FPAVF_LOG(ERR, fmt, ##__VA_ARGS__)
 #define fpavf_func_trace fpavf_log_dbg
 
-#define mbox_log_info(fmt, ...) MBOX_LOG(INFO, fmt, ##__VA_ARGS__)
-#define mbox_log_dbg(fmt, ...) MBOX_LOG(DEBUG, fmt, ##__VA_ARGS__)
-#define mbox_log_err(fmt, ...) MBOX_LOG(ERR, fmt, ##__VA_ARGS__)
-#define mbox_func_trace mbox_log_dbg
 
 extern int octeontx_logtype_fpavf;
-extern int octeontx_logtype_fpavf_mbox;
 
 #endif /* __OCTEONTX_POOL_LOGS_H__*/
diff --git a/drivers/mempool/octeontx/octeontx_ssovf.c b/drivers/mempool/octeontx/octeontx_ssovf.c
deleted file mode 100644
index 97b24066..00000000
--- a/drivers/mempool/octeontx/octeontx_ssovf.c
+++ /dev/null
@@ -1,271 +0,0 @@
-/* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2017 Cavium, Inc
- */
-
-#include <rte_atomic.h>
-#include <rte_common.h>
-#include <rte_eal.h>
-#include <rte_io.h>
-#include <rte_pci.h>
-#include <rte_bus_pci.h>
-
-#include "octeontx_mbox.h"
-#include "octeontx_pool_logs.h"
-
-#define PCI_VENDOR_ID_CAVIUM              0x177D
-#define PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF  0xA04B
-#define PCI_DEVICE_ID_OCTEONTX_SSOWS_VF   0xA04D
-
-#define SSO_MAX_VHGRP                     (64)
-#define SSO_MAX_VHWS                      (32)
-
-#define SSO_VHGRP_AQ_THR                  (0x1E0ULL)
-
-struct ssovf_res {
-	uint16_t domain;
-	uint16_t vfid;
-	void *bar0;
-	void *bar2;
-};
-
-struct ssowvf_res {
-	uint16_t domain;
-	uint16_t vfid;
-	void *bar0;
-	void *bar2;
-	void *bar4;
-};
-
-struct ssowvf_identify {
-	uint16_t domain;
-	uint16_t vfid;
-};
-
-struct ssodev {
-	uint8_t total_ssovfs;
-	uint8_t total_ssowvfs;
-	struct ssovf_res grp[SSO_MAX_VHGRP];
-	struct ssowvf_res hws[SSO_MAX_VHWS];
-};
-
-static struct ssodev sdev;
-
-/* Interface functions */
-int
-octeontx_ssovf_info(struct octeontx_ssovf_info *info)
-{
-	uint8_t i;
-	uint16_t domain;
-
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY || info == NULL)
-		return -EINVAL;
-
-	if (sdev.total_ssovfs == 0 || sdev.total_ssowvfs == 0)
-		return -ENODEV;
-
-	domain = sdev.grp[0].domain;
-	for (i = 0; i < sdev.total_ssovfs; i++) {
-		/* Check vfid's are contiguous and belong to same domain */
-		if (sdev.grp[i].vfid != i ||
-			sdev.grp[i].bar0 == NULL ||
-			sdev.grp[i].domain != domain) {
-			mbox_log_err("GRP error, vfid=%d/%d domain=%d/%d %p",
-				i, sdev.grp[i].vfid,
-				domain, sdev.grp[i].domain,
-				sdev.grp[i].bar0);
-			return -EINVAL;
-		}
-	}
-
-	for (i = 0; i < sdev.total_ssowvfs; i++) {
-		/* Check vfid's are contiguous and belong to same domain */
-		if (sdev.hws[i].vfid != i ||
-			sdev.hws[i].bar0 == NULL ||
-			sdev.hws[i].domain != domain) {
-			mbox_log_err("HWS error, vfid=%d/%d domain=%d/%d %p",
-				i, sdev.hws[i].vfid,
-				domain, sdev.hws[i].domain,
-				sdev.hws[i].bar0);
-			return -EINVAL;
-		}
-	}
-
-	info->domain = domain;
-	info->total_ssovfs = sdev.total_ssovfs;
-	info->total_ssowvfs = sdev.total_ssowvfs;
-	return 0;
-}
-
-void*
-octeontx_ssovf_bar(enum octeontx_ssovf_type type, uint8_t id, uint8_t bar)
-{
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY ||
-			type > OCTEONTX_SSO_HWS)
-		return NULL;
-
-	if (type == OCTEONTX_SSO_GROUP) {
-		if (id >= sdev.total_ssovfs)
-			return NULL;
-	} else {
-		if (id >= sdev.total_ssowvfs)
-			return NULL;
-	}
-
-	if (type == OCTEONTX_SSO_GROUP) {
-		switch (bar) {
-		case 0:
-			return sdev.grp[id].bar0;
-		case 2:
-			return sdev.grp[id].bar2;
-		default:
-			return NULL;
-		}
-	} else {
-		switch (bar) {
-		case 0:
-			return sdev.hws[id].bar0;
-		case 2:
-			return sdev.hws[id].bar2;
-		case 4:
-			return sdev.hws[id].bar4;
-		default:
-			return NULL;
-		}
-	}
-}
-
-/* SSOWVF pcie device aka event port probe */
-
-static int
-ssowvf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
-{
-	uint16_t vfid;
-	struct ssowvf_res *res;
-	struct ssowvf_identify *id;
-
-	RTE_SET_USED(pci_drv);
-
-	/* For secondary processes, the primary has done all the work */
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-		return 0;
-
-	if (pci_dev->mem_resource[0].addr == NULL ||
-			pci_dev->mem_resource[2].addr == NULL ||
-			pci_dev->mem_resource[4].addr == NULL) {
-		mbox_log_err("Empty bars %p %p %p",
-				pci_dev->mem_resource[0].addr,
-				pci_dev->mem_resource[2].addr,
-				pci_dev->mem_resource[4].addr);
-		return -ENODEV;
-	}
-
-	if (pci_dev->mem_resource[4].len != SSOW_BAR4_LEN) {
-		mbox_log_err("Bar4 len mismatch %d != %d",
-			SSOW_BAR4_LEN, (int)pci_dev->mem_resource[4].len);
-		return -EINVAL;
-	}
-
-	id = pci_dev->mem_resource[4].addr;
-	vfid = id->vfid;
-	if (vfid >= SSO_MAX_VHWS) {
-		mbox_log_err("Invalid vfid(%d/%d)", vfid, SSO_MAX_VHWS);
-		return -EINVAL;
-	}
-
-	res = &sdev.hws[vfid];
-	res->vfid = vfid;
-	res->bar0 = pci_dev->mem_resource[0].addr;
-	res->bar2 = pci_dev->mem_resource[2].addr;
-	res->bar4 = pci_dev->mem_resource[4].addr;
-	res->domain = id->domain;
-
-	sdev.total_ssowvfs++;
-	rte_wmb();
-	mbox_log_dbg("Domain=%d hws=%d total_ssowvfs=%d", res->domain,
-			res->vfid, sdev.total_ssowvfs);
-	return 0;
-}
-
-static const struct rte_pci_id pci_ssowvf_map[] = {
-	{
-		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
-				PCI_DEVICE_ID_OCTEONTX_SSOWS_VF)
-	},
-	{
-		.vendor_id = 0,
-	},
-};
-
-static struct rte_pci_driver pci_ssowvf = {
-	.id_table = pci_ssowvf_map,
-	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
-	.probe = ssowvf_probe,
-};
-
-RTE_PMD_REGISTER_PCI(octeontx_ssowvf, pci_ssowvf);
-
-/* SSOVF pcie device aka event queue probe */
-
-static int
-ssovf_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
-{
-	uint64_t val;
-	uint16_t vfid;
-	uint8_t *idreg;
-	struct ssovf_res *res;
-
-	RTE_SET_USED(pci_drv);
-
-	/* For secondary processes, the primary has done all the work */
-	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
-		return 0;
-
-	if (pci_dev->mem_resource[0].addr == NULL ||
-			pci_dev->mem_resource[2].addr == NULL) {
-		mbox_log_err("Empty bars %p %p",
-			pci_dev->mem_resource[0].addr,
-			pci_dev->mem_resource[2].addr);
-		return -ENODEV;
-	}
-	idreg = pci_dev->mem_resource[0].addr;
-	idreg += SSO_VHGRP_AQ_THR;
-	val = rte_read64(idreg);
-
-	/* Write back the default value of aq_thr */
-	rte_write64((1ULL << 33) - 1, idreg);
-	vfid = (val >> 16) & 0xffff;
-	if (vfid >= SSO_MAX_VHGRP) {
-		mbox_log_err("Invalid vfid (%d/%d)", vfid, SSO_MAX_VHGRP);
-		return -EINVAL;
-	}
-
-	res = &sdev.grp[vfid];
-	res->vfid = vfid;
-	res->bar0 = pci_dev->mem_resource[0].addr;
-	res->bar2 = pci_dev->mem_resource[2].addr;
-	res->domain = val & 0xffff;
-
-	sdev.total_ssovfs++;
-	rte_wmb();
-	mbox_log_dbg("Domain=%d group=%d total_ssovfs=%d", res->domain,
-			res->vfid, sdev.total_ssovfs);
-	return 0;
-}
-
-static const struct rte_pci_id pci_ssovf_map[] = {
-	{
-		RTE_PCI_DEVICE(PCI_VENDOR_ID_CAVIUM,
-				PCI_DEVICE_ID_OCTEONTX_SSOGRP_VF)
-	},
-	{
-		.vendor_id = 0,
-	},
-};
-
-static struct rte_pci_driver pci_ssovf = {
-	.id_table = pci_ssovf_map,
-	.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
-	.probe = ssovf_probe,
-};
-
-RTE_PMD_REGISTER_PCI(octeontx_ssovf, pci_ssovf);
diff --git a/drivers/mempool/octeontx/rte_mempool_octeontx.c b/drivers/mempool/octeontx/rte_mempool_octeontx.c
index d143d05c..ab94dfe9 100644
--- a/drivers/mempool/octeontx/rte_mempool_octeontx.c
+++ b/drivers/mempool/octeontx/rte_mempool_octeontx.c
@@ -126,28 +126,66 @@ octeontx_fpavf_get_count(const struct rte_mempool *mp)
 	return octeontx_fpa_bufpool_free_count(pool);
 }
 
-static int
-octeontx_fpavf_get_capabilities(const struct rte_mempool *mp,
-				unsigned int *flags)
+static ssize_t
+octeontx_fpavf_calc_mem_size(const struct rte_mempool *mp,
+			     uint32_t obj_num, uint32_t pg_shift,
+			     size_t *min_chunk_size, size_t *align)
 {
-	RTE_SET_USED(mp);
-	*flags |= (MEMPOOL_F_CAPA_PHYS_CONTIG |
-			MEMPOOL_F_CAPA_BLK_ALIGNED_OBJECTS);
-	return 0;
+	ssize_t mem_size;
+
+	/*
+	 * Simply need space for one more object to be able to
+	 * fulfil alignment requirements.
+	 */
+	mem_size = rte_mempool_op_calc_mem_size_default(mp, obj_num + 1,
+							pg_shift,
+							min_chunk_size, align);
+	if (mem_size >= 0) {
+		/*
+		 * Memory area which contains objects must be physically
+		 * contiguous.
+		 */
+		*min_chunk_size = mem_size;
+	}
+
+	return mem_size;
 }
 
 static int
-octeontx_fpavf_register_memory_area(const struct rte_mempool *mp,
-				    char *vaddr, rte_iova_t paddr, size_t len)
+octeontx_fpavf_populate(struct rte_mempool *mp, unsigned int max_objs,
+			void *vaddr, rte_iova_t iova, size_t len,
+			rte_mempool_populate_obj_cb_t *obj_cb, void *obj_cb_arg)
 {
-	RTE_SET_USED(paddr);
+	size_t total_elt_sz;
+	size_t off;
 	uint8_t gpool;
 	uintptr_t pool_bar;
+	int ret;
+
+	if (iova == RTE_BAD_IOVA)
+		return -EINVAL;
+
+	total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
+
+	/* align object start address to a multiple of total_elt_sz */
+	off = total_elt_sz - ((uintptr_t)vaddr % total_elt_sz);
+
+	if (len < off)
+		return -EINVAL;
+
+	vaddr = (char *)vaddr + off;
+	iova += off;
+	len -= off;
 
 	gpool = octeontx_fpa_bufpool_gpool(mp->pool_id);
 	pool_bar = mp->pool_id & ~(uint64_t)FPA_GPOOL_MASK;
 
-	return octeontx_fpavf_pool_set_range(pool_bar, len, vaddr, gpool);
+	ret = octeontx_fpavf_pool_set_range(pool_bar, len, vaddr, gpool);
+	if (ret < 0)
+		return ret;
+
+	return rte_mempool_op_populate_default(mp, max_objs, vaddr, iova, len,
+					       obj_cb, obj_cb_arg);
 }
 
 static struct rte_mempool_ops octeontx_fpavf_ops = {
@@ -157,8 +195,8 @@ static struct rte_mempool_ops octeontx_fpavf_ops = {
 	.enqueue = octeontx_fpavf_enqueue,
 	.dequeue = octeontx_fpavf_dequeue,
 	.get_count = octeontx_fpavf_get_count,
-	.get_capabilities = octeontx_fpavf_get_capabilities,
-	.register_memory_area = octeontx_fpavf_register_memory_area,
+	.calc_mem_size = octeontx_fpavf_calc_mem_size,
+	.populate = octeontx_fpavf_populate,
 };
 
 MEMPOOL_REGISTER_OPS(octeontx_fpavf_ops);
diff --git a/drivers/mempool/octeontx/rte_mempool_octeontx_version.map b/drivers/mempool/octeontx/rte_mempool_octeontx_version.map
index fe8cdeca..a7530317 100644
--- a/drivers/mempool/octeontx/rte_mempool_octeontx_version.map
+++ b/drivers/mempool/octeontx/rte_mempool_octeontx_version.map
@@ -1,9 +1,3 @@
 DPDK_17.11 {
-	global:
-
-	octeontx_ssovf_info;
-	octeontx_ssovf_bar;
-	octeontx_ssovf_mbox_send;
-
 	local: *;
 };