diff options
Diffstat (limited to 'drivers/net/dpaa')
-rw-r--r-- | drivers/net/dpaa/Makefile | 1 | ||||
-rw-r--r-- | drivers/net/dpaa/dpaa_ethdev.c | 152 | ||||
-rw-r--r-- | drivers/net/dpaa/dpaa_ethdev.h | 5 | ||||
-rw-r--r-- | drivers/net/dpaa/dpaa_rxtx.c | 100 | ||||
-rw-r--r-- | drivers/net/dpaa/dpaa_rxtx.h | 5 |
5 files changed, 185 insertions, 78 deletions
diff --git a/drivers/net/dpaa/Makefile b/drivers/net/dpaa/Makefile index d7a0a50c..1c4f7d91 100644 --- a/drivers/net/dpaa/Makefile +++ b/drivers/net/dpaa/Makefile @@ -38,6 +38,7 @@ LDLIBS += -lrte_bus_dpaa LDLIBS += -lrte_mempool_dpaa LDLIBS += -lrte_eal -lrte_mbuf -lrte_mempool -lrte_ring LDLIBS += -lrte_ethdev -lrte_net -lrte_kvargs +LDLIBS += -lrte_common_dpaax # install this header file SYMLINK-$(CONFIG_RTE_LIBRTE_DPAA_PMD)-include := rte_pmd_dpaa.h diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c index 7a950ac0..d0572b3d 100644 --- a/drivers/net/dpaa/dpaa_ethdev.c +++ b/drivers/net/dpaa/dpaa_ethdev.c @@ -47,16 +47,15 @@ /* Supported Rx offloads */ static uint64_t dev_rx_offloads_sup = - DEV_RX_OFFLOAD_JUMBO_FRAME; + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_SCATTER; /* Rx offloads which cannot be disabled */ static uint64_t dev_rx_offloads_nodis = DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | DEV_RX_OFFLOAD_TCP_CKSUM | - DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_CRC_STRIP | - DEV_RX_OFFLOAD_SCATTER; + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM; /* Supported Tx offloads */ static uint64_t dev_tx_offloads_sup; @@ -148,11 +147,30 @@ dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu) struct dpaa_if *dpaa_intf = dev->data->dev_private; uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE; + uint32_t buffsz = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM; PMD_INIT_FUNC_TRACE(); if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN) return -EINVAL; + /* + * Refuse mtu that requires the support of scattered packets + * when this feature has not been enabled before. + */ + if (dev->data->min_rx_buf_size && + !dev->data->scattered_rx && frame_size > buffsz) { + DPAA_PMD_ERR("SG not enabled, will not fit in one buffer"); + return -EINVAL; + } + + /* check <seg size> * <max_seg> >= max_frame */ + if (dev->data->min_rx_buf_size && dev->data->scattered_rx && + (frame_size > buffsz * DPAA_SGT_MAX_ENTRIES)) { + DPAA_PMD_ERR("Too big to fit for Max SG list %d", + buffsz * DPAA_SGT_MAX_ENTRIES); + return -EINVAL; + } + if (frame_size > ETHER_MAX_LEN) dev->data->dev_conf.rxmode.offloads &= DEV_RX_OFFLOAD_JUMBO_FRAME; @@ -194,15 +212,32 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev) } if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) { + uint32_t max_len; + + DPAA_PMD_DEBUG("enabling jumbo"); + if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= - DPAA_MAX_RX_PKT_LEN) { - fman_if_set_maxfrm(dpaa_intf->fif, - dev->data->dev_conf.rxmode.max_rx_pkt_len); - return 0; - } else { - return -1; + DPAA_MAX_RX_PKT_LEN) + max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len; + else { + DPAA_PMD_INFO("enabling jumbo override conf max len=%d " + "supported is %d", + dev->data->dev_conf.rxmode.max_rx_pkt_len, + DPAA_MAX_RX_PKT_LEN); + max_len = DPAA_MAX_RX_PKT_LEN; } + + fman_if_set_maxfrm(dpaa_intf->fif, max_len); + dev->data->mtu = max_len + - ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE; } + + if (rx_offloads & DEV_RX_OFFLOAD_SCATTER) { + DPAA_PMD_DEBUG("enabling scatter mode"); + fman_if_set_sg(dpaa_intf->fif, 1); + dev->data->scattered_rx = 1; + } + return 0; } @@ -300,15 +335,21 @@ static void dpaa_eth_dev_info(struct rte_eth_dev *dev, dev_info->max_rx_queues = dpaa_intf->nb_rx_queues; dev_info->max_tx_queues = dpaa_intf->nb_tx_queues; - dev_info->min_rx_bufsize = DPAA_MIN_RX_BUF_SIZE; dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN; dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER; dev_info->max_hash_mac_addrs = 0; dev_info->max_vfs = 0; dev_info->max_vmdq_pools = ETH_16_POOLS; dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL; - dev_info->speed_capa = (ETH_LINK_SPEED_1G | - ETH_LINK_SPEED_10G); + + if (dpaa_intf->fif->mac_type == fman_mac_1g) + dev_info->speed_capa = ETH_LINK_SPEED_1G; + else if (dpaa_intf->fif->mac_type == fman_mac_10g) + dev_info->speed_capa = (ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G); + else + DPAA_PMD_ERR("invalid link_speed: %s, %d", + dpaa_intf->name, dpaa_intf->fif->mac_type); + dev_info->rx_offload_capa = dev_rx_offloads_sup | dev_rx_offloads_nodis; dev_info->tx_offload_capa = dev_tx_offloads_sup | @@ -514,6 +555,7 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, struct qm_mcc_initfq opts = {0}; u32 flags = 0; int ret; + u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM; PMD_INIT_FUNC_TRACE(); @@ -527,6 +569,28 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)", queue_idx, rxq->fqid); + /* Max packet can fit in single buffer */ + if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= buffsz) { + ; + } else if (dev->data->dev_conf.rxmode.offloads & + DEV_RX_OFFLOAD_SCATTER) { + if (dev->data->dev_conf.rxmode.max_rx_pkt_len > + buffsz * DPAA_SGT_MAX_ENTRIES) { + DPAA_PMD_ERR("max RxPkt size %d too big to fit " + "MaxSGlist %d", + dev->data->dev_conf.rxmode.max_rx_pkt_len, + buffsz * DPAA_SGT_MAX_ENTRIES); + rte_errno = EOVERFLOW; + return -rte_errno; + } + } else { + DPAA_PMD_WARN("The requested maximum Rx packet size (%u) is" + " larger than a single mbuf (%u) and scattered" + " mode has not been requested", + dev->data->dev_conf.rxmode.max_rx_pkt_len, + buffsz - RTE_PKTMBUF_HEADROOM); + } + if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) { struct fman_if_ic_params icp; uint32_t fd_offset; @@ -553,10 +617,13 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, fman_if_set_bp(dpaa_intf->fif, mp->size, dpaa_intf->bp_info->bpid, bp_size); dpaa_intf->valid = 1; - DPAA_PMD_INFO("if =%s - fd_offset = %d offset = %d", - dpaa_intf->name, fd_offset, - fman_if_get_fdoff(dpaa_intf->fif)); + DPAA_PMD_DEBUG("if:%s fd_offset = %d offset = %d", + dpaa_intf->name, fd_offset, + fman_if_get_fdoff(dpaa_intf->fif)); } + DPAA_PMD_DEBUG("if:%s sg_on = %d, max_frm =%d", dpaa_intf->name, + fman_if_get_sg_enable(dpaa_intf->fif), + dev->data->dev_conf.rxmode.max_rx_pkt_len); /* checking if push mode only, no error check for now */ if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) { dpaa_push_queue_idx++; @@ -594,8 +661,13 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx, "ret:%d(%s)", rxq->fqid, ret, strerror(ret)); return ret; } - rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb; - rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare; + if (dpaa_svr_family == SVR_LS1043A_FAMILY) { + rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb_no_prefetch; + } else { + rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb; + rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare; + } + rxq->is_static = true; } dev->data->rx_queues[queue_idx] = rxq; @@ -630,7 +702,8 @@ dpaa_eth_eventq_attach(const struct rte_eth_dev *dev, struct qm_mcc_initfq opts = {0}; if (dpaa_push_mode_max_queue) - DPAA_PMD_WARN("PUSH mode already enabled for first %d queues.\n" + DPAA_PMD_WARN("PUSH mode q and EVENTDEV are not compatible\n" + "PUSH mode already enabled for first %d queues.\n" "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n", dpaa_push_mode_max_queue); @@ -1012,7 +1085,7 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx, { struct qm_mcc_initfq opts = {0}; int ret; - u32 flags = 0; + u32 flags = QMAN_FQ_FLAG_NO_ENQUEUE; struct qm_mcc_initcgr cgr_opts = { .we_mask = QM_CGR_WE_CS_THRES | QM_CGR_WE_CSTD_EN | @@ -1025,15 +1098,18 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx, PMD_INIT_FUNC_TRACE(); - ret = qman_reserve_fqid(fqid); - if (ret) { - DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d", - fqid, ret); - return -EINVAL; + if (fqid) { + ret = qman_reserve_fqid(fqid); + if (ret) { + DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d", + fqid, ret); + return -EINVAL; + } + } else { + flags |= QMAN_FQ_FLAG_DYNAMIC_FQID; } - DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid); - ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq); + ret = qman_create_fq(fqid, flags, fq); if (ret) { DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d", fqid, ret); @@ -1052,7 +1128,7 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx, if (ret) { DPAA_PMD_WARN( "rx taildrop init fail on rx fqid 0x%x(ret=%d)", - fqid, ret); + fq->fqid, ret); goto without_cgr; } opts.we_mask |= QM_INITFQ_WE_CGID; @@ -1060,7 +1136,7 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx, opts.fqd.fq_ctrl |= QM_FQCTRL_CGE; } without_cgr: - ret = qman_init_fq(fq, flags, &opts); + ret = qman_init_fq(fq, 0, &opts); if (ret) DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret); return ret; @@ -1213,7 +1289,7 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev) if (default_q) fqid = cfg->rx_def; else - fqid = DPAA_PCD_FQID_START + dpaa_intf->ifid * + fqid = DPAA_PCD_FQID_START + dpaa_intf->fif->mac_idx * DPAA_PCD_FQID_MULTIPLIER + loop; if (dpaa_intf->cgr_rx) @@ -1304,6 +1380,9 @@ dpaa_dev_init(struct rte_eth_dev *eth_dev) fman_if_reset_mcast_filter_table(fman_intf); /* Reset interface statistics */ fman_if_stats_reset(fman_intf); + /* Disable SG by default */ + fman_if_set_sg(fman_intf, 0); + fman_if_set_maxfrm(fman_intf, ETHER_MAX_LEN + VLAN_TAG_SIZE); return 0; @@ -1360,10 +1439,6 @@ dpaa_dev_uninit(struct rte_eth_dev *dev) rte_free(dpaa_intf->tx_queues); dpaa_intf->tx_queues = NULL; - /* free memory for storing MAC addresses */ - rte_free(dev->data->mac_addrs); - dev->data->mac_addrs = NULL; - dev->dev_ops = NULL; dev->rx_pkt_burst = NULL; dev->tx_pkt_burst = NULL; @@ -1372,7 +1447,7 @@ dpaa_dev_uninit(struct rte_eth_dev *dev) } static int -rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, +rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused, struct rte_dpaa_device *dpaa_dev) { int diag; @@ -1456,7 +1531,6 @@ rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, } eth_dev->device = &dpaa_dev->device; - eth_dev->device->driver = &dpaa_drv->driver; dpaa_dev->eth_dev = eth_dev; /* Invoke PMD device initialization function */ @@ -1466,9 +1540,6 @@ rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv, return 0; } - if (rte_eal_process_type() == RTE_PROC_PRIMARY) - rte_free(eth_dev->data->dev_private); - rte_eth_dev_release_port(eth_dev); return diag; } @@ -1483,9 +1554,6 @@ rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev) eth_dev = dpaa_dev->eth_dev; dpaa_dev_uninit(eth_dev); - if (rte_eal_process_type() == RTE_PROC_PRIMARY) - rte_free(eth_dev->data->dev_private); - rte_eth_dev_release_port(eth_dev); return 0; diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h index c79b9f86..2fc72317 100644 --- a/drivers/net/dpaa/dpaa_ethdev.h +++ b/drivers/net/dpaa/dpaa_ethdev.h @@ -39,9 +39,10 @@ /* Alignment to use for cpu-local structs to avoid coherency problems. */ #define MAX_CACHELINE 64 -#define DPAA_MIN_RX_BUF_SIZE 512 #define DPAA_MAX_RX_PKT_LEN 10240 +#define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */ + /* RX queue tail drop threshold (CGR Based) in frame count */ #define CGR_RX_PERFQ_THRESH 256 @@ -63,7 +64,7 @@ #define DPAA_PCD_FQID_START 0x400 #define DPAA_PCD_FQID_MULTIPLIER 0x100 #define DPAA_DEFAULT_NUM_PCD_QUEUES 1 -#define DPAA_MAX_NUM_PCD_QUEUES 32 +#define DPAA_MAX_NUM_PCD_QUEUES 4 #define DPAA_IF_TX_PRIORITY 3 #define DPAA_IF_RX_PRIORITY 0 diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c index 168b77e4..c4471c22 100644 --- a/drivers/net/dpaa/dpaa_rxtx.c +++ b/drivers/net/dpaa/dpaa_rxtx.c @@ -306,8 +306,6 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid) int i = 0; uint8_t fd_offset = fd->offset; - DPAA_DP_LOG(DEBUG, "Received an SG frame"); - vaddr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); if (!vaddr) { DPAA_PMD_ERR("unable to convert physical address"); @@ -349,6 +347,8 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid) } prev_seg = cur_seg; } + DPAA_DP_LOG(DEBUG, "Received an SG frame len =%d, num_sg =%d", + first_seg->pkt_len, first_seg->nb_segs); dpaa_eth_packet_info(first_seg, vaddr); rte_pktmbuf_free_seg(temp); @@ -367,22 +367,21 @@ dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid) uint16_t offset; uint32_t length; - DPAA_DP_LOG(DEBUG, " FD--->MBUF"); - if (unlikely(format == qm_fd_sg)) return dpaa_eth_sg_to_mbuf(fd, ifid); - ptr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); - - rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); - offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> DPAA_FD_OFFSET_SHIFT; length = fd->opaque & DPAA_FD_LENGTH_MASK; + DPAA_DP_LOG(DEBUG, " FD--->MBUF off %d len = %d", offset, length); + /* Ignoring case when format != qm_fd_contig */ dpaa_display_frame(fd); + ptr = DPAA_MEMPOOL_PTOV(bp_info, qm_fd_addr(fd)); mbuf = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); + /* Prefetch the Parse results and packet data to L1 */ + rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); mbuf->data_off = offset; mbuf->data_len = length; @@ -398,8 +397,9 @@ dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid) return mbuf; } +/* Specific for LS1043 */ void -dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, +dpaa_rx_cb_no_prefetch(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs) { struct rte_mbuf *mbuf; @@ -411,17 +411,13 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, uint32_t length; uint8_t format; - if (dpaa_svr_family != SVR_LS1046A_FAMILY) { - bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); - ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); - rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); - bufs[0] = (struct rte_mbuf *)((char *)ptr - - bp_info->meta_data_size); - } + bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[0]->fd.bpid); + ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[0]->fd)); + rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); + bufs[0] = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); for (i = 0; i < num_bufs; i++) { - if (dpaa_svr_family != SVR_LS1046A_FAMILY && - i < num_bufs - 1) { + if (i < num_bufs - 1) { bp_info = DPAA_BPID_TO_POOL_INFO(dqrr[i + 1]->fd.bpid); ptr = rte_dpaa_mem_ptov(qm_fd_addr(&dqrr[i + 1]->fd)); rte_prefetch0((void *)((uint8_t *)ptr + @@ -458,6 +454,46 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, } } +void +dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, + void **bufs, int num_bufs) +{ + struct rte_mbuf *mbuf; + const struct qm_fd *fd; + struct dpaa_if *dpaa_intf; + uint16_t offset, i; + uint32_t length; + uint8_t format; + + for (i = 0; i < num_bufs; i++) { + fd = &dqrr[i]->fd; + dpaa_intf = fq[0]->dpaa_intf; + + format = (fd->opaque & DPAA_FD_FORMAT_MASK) >> + DPAA_FD_FORMAT_SHIFT; + if (unlikely(format == qm_fd_sg)) { + bufs[i] = dpaa_eth_sg_to_mbuf(fd, dpaa_intf->ifid); + continue; + } + + offset = (fd->opaque & DPAA_FD_OFFSET_MASK) >> + DPAA_FD_OFFSET_SHIFT; + length = fd->opaque & DPAA_FD_LENGTH_MASK; + + mbuf = bufs[i]; + mbuf->data_off = offset; + mbuf->data_len = length; + mbuf->pkt_len = length; + mbuf->port = dpaa_intf->ifid; + + mbuf->nb_segs = 1; + mbuf->ol_flags = 0; + mbuf->next = NULL; + rte_mbuf_refcnt_set(mbuf, 1); + dpaa_eth_packet_info(mbuf, mbuf->buf_addr); + } +} + void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs) { struct dpaa_bp_info *bp_info = DPAA_BPID_TO_POOL_INFO(dq->fd.bpid); @@ -468,8 +504,7 @@ void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs) * So we prefetch the annoation beforehand, so that it is available * in cache when accessed. */ - if (dpaa_svr_family == SVR_LS1046A_FAMILY) - rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); + rte_prefetch0((void *)((uint8_t *)ptr + DEFAULT_RX_ICEOF)); *bufs = (struct rte_mbuf *)((char *)ptr - bp_info->meta_data_size); } @@ -870,6 +905,19 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) DPAA_TX_BURST_SIZE : nb_bufs; for (loop = 0; loop < frames_to_send; loop++) { mbuf = *(bufs++); + seqn = mbuf->seqn; + if (seqn != DPAA_INVALID_MBUF_SEQN) { + index = seqn - 1; + if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { + flags[loop] = + ((index & QM_EQCR_DCA_IDXMASK) << 8); + flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; + DPAA_PER_LCORE_DQRR_SIZE--; + DPAA_PER_LCORE_DQRR_HELD &= + ~(1 << index); + } + } + if (likely(RTE_MBUF_DIRECT(mbuf))) { mp = mbuf->pool; bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp); @@ -916,18 +964,6 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs) goto send_pkts; } } - seqn = mbuf->seqn; - if (seqn != DPAA_INVALID_MBUF_SEQN) { - index = seqn - 1; - if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) { - flags[loop] = - ((index & QM_EQCR_DCA_IDXMASK) << 8); - flags[loop] |= QMAN_ENQUEUE_FLAG_DCA; - DPAA_PER_LCORE_DQRR_SIZE--; - DPAA_PER_LCORE_DQRR_HELD &= - ~(1 << index); - } - } } send_pkts: diff --git a/drivers/net/dpaa/dpaa_rxtx.h b/drivers/net/dpaa/dpaa_rxtx.h index d3e63516..75b093c1 100644 --- a/drivers/net/dpaa/dpaa_rxtx.h +++ b/drivers/net/dpaa/dpaa_rxtx.h @@ -32,8 +32,6 @@ /* L4 Type field: TCP */ #define DPAA_L4_PARSE_RESULT_TCP 0x20 -#define DPAA_SGT_MAX_ENTRIES 16 /* maximum number of entries in SG Table */ - #define DPAA_MAX_DEQUEUE_NUM_FRAMES 63 /** <Maximum number of frames to be dequeued in a single rx call*/ @@ -272,4 +270,7 @@ void dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs); void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs); + +void dpaa_rx_cb_no_prefetch(struct qman_fq **fq, + struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs); #endif |