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-rw-r--r--drivers/net/octeontx/base/meson.build6
-rw-r--r--drivers/net/octeontx/base/octeontx_io.h2
2 files changed, 6 insertions, 2 deletions
diff --git a/drivers/net/octeontx/base/meson.build b/drivers/net/octeontx/base/meson.build
index 09f657ab..a06a2c89 100644
--- a/drivers/net/octeontx/base/meson.build
+++ b/drivers/net/octeontx/base/meson.build
@@ -13,8 +13,12 @@ foreach d: depends
static_objs += [get_variable('static_rte_' + d)]
endforeach
+c_args = cflags
+if allow_experimental_apis
+ c_args += '-DALLOW_EXPERIMENTAL_API'
+endif
base_lib = static_library('octeontx_base', sources,
- c_args: cflags,
+ c_args: c_args,
dependencies: static_objs,
)
diff --git a/drivers/net/octeontx/base/octeontx_io.h b/drivers/net/octeontx/base/octeontx_io.h
index d51ded23..04b9ce19 100644
--- a/drivers/net/octeontx/base/octeontx_io.h
+++ b/drivers/net/octeontx/base/octeontx_io.h
@@ -10,7 +10,7 @@
#include <rte_io.h>
-/* In Cavium OcteonTX SoC, all accesses to the device registers are
+/* In Cavium OCTEON TX SoC, all accesses to the device registers are
* implicitly strongly ordered. So, The relaxed version of IO operation is
* safe to use with out any IO memory barriers.
*/