summaryrefslogtreecommitdiffstats
path: root/drivers/net/thunderx/nicvf_struct.h
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/thunderx/nicvf_struct.h')
-rw-r--r--drivers/net/thunderx/nicvf_struct.h29
1 files changed, 17 insertions, 12 deletions
diff --git a/drivers/net/thunderx/nicvf_struct.h b/drivers/net/thunderx/nicvf_struct.h
index d4a83c37..dd52f38e 100644
--- a/drivers/net/thunderx/nicvf_struct.h
+++ b/drivers/net/thunderx/nicvf_struct.h
@@ -55,25 +55,27 @@ union mbuf_initializer {
};
struct nicvf_rxq {
+ MARKER rxq_fastpath_data_start;
+ uint8_t rbptr_offset;
+ uint16_t rx_free_thresh;
+ uint32_t head;
+ uint32_t qlen_mask;
+ int32_t recv_buffers;
+ int32_t available_space;
uint64_t mbuf_phys_off;
uintptr_t cq_status;
uintptr_t cq_door;
- union mbuf_initializer mbuf_initializer;
- nicvf_iova_addr_t phys;
- union cq_entry_t *desc;
struct nicvf_rbdr *shared_rbdr;
- struct nicvf *nic;
struct rte_mempool *pool;
- uint32_t head;
- uint32_t qlen_mask;
- int32_t available_space;
- int32_t recv_buffers;
- uint16_t rx_free_thresh;
- uint16_t queue_id;
- uint16_t precharge_cnt;
+ union cq_entry_t *desc;
+ union mbuf_initializer mbuf_initializer;
+ MARKER rxq_fastpath_data_end;
uint8_t rx_drop_en;
+ uint16_t precharge_cnt;
uint16_t port_id;
- uint8_t rbptr_offset;
+ uint16_t queue_id;
+ struct nicvf *nic;
+ nicvf_iova_addr_t phys;
} __rte_cache_aligned;
struct nicvf {
@@ -85,6 +87,8 @@ struct nicvf {
bool loopback_supported;
bool pf_acked:1;
bool pf_nacked:1;
+ bool offload_cksum:1;
+ bool vlan_strip:1;
uint64_t hwcap;
uint8_t link_up;
uint8_t duplex;
@@ -99,6 +103,7 @@ struct nicvf {
struct rte_intr_handle intr_handle;
uint8_t cpi_alg;
uint16_t mtu;
+ int skip_bytes;
bool vlan_filter_en;
uint8_t mac_addr[ETHER_ADDR_LEN];
/* secondary queue set support */
> 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405 406 407 408 409 410 411 412 413 414 415 416 417 418 419 420 421 422 423 424 425 426 427 428 429 430 431 432 433 434 435 436 437 438 439 440 441 442 443 444 445 446 447 448 449 450 451 452 453 454 455 456 457 458 459 460 461 462 463 464 465 466 467 468 469 470 471 472 473 474 475 476 477 478 479 480 481 482 483 484 485 486 487 488 489 490 491 492 493 494 495 496 497 498 499 500 501 502 503 504 505 506 507 508 509 510 511 512 513 514 515 516 517 518 519 520 521 522 523 524 525 526 527 528 529 530 531 532 533 534 535 536 537 538 539 540 541 542 543 544 545 546 547 548 549 550 551 552 553 554 555 556 557 558 559 560 561 562 563 564 565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592 593 594 595 596 597 598 599 600 601 602 603 604 605 606 607 608 609 610 611 612 613 614 615 616 617 618 619 620 621 622 623 624 625 626 627 628 629 630 631 632 633 634 635 636 637 638 639 640 641 642 643 644 645 646 647 648 649 650 651 652 653 654 655 656 657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674 675 676 677 678 679 680 681 682 683 684 685 686 687 688 689 690 691 692 693 694 695 696 697 698 699 700 701 702 703 704 705 706 707 708 709 710 711 712 713 714 715 716 717 718 719 720 721 722 723 724 725 726 727 728 729 730 731 732 733 734 735 736 737 738 739 740 741 742 743 744 745 746 747 748 749 750 751 752 753 754 755 756 757 758 759 760 761 762 763 764 765 766 767 768 769 770 771 772 773 774 775 776 777 778 779 780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805 806 807 808 809 810 811 812 813 814 815 816 817 818 819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835 836 837 838 839 840 841 842 843 844 845 846 847 848 849 850 851 852 853 854 855 856 857 858 859 860 861 862 863 864 865 866 867 868 869 870 871 872 873 874 875 876 877 878 879 880 881 882 883 884 885 886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902 903 904 905 906 907 908 909 910 911 912 913 914 915 916 917 918 919 920 921 922 923 924 925 926 927 928 929 930 931 932 933 934 935 936 937 938 939 940 941 942 943 944 945 946 947 948 949 950 951 952 953 954 955 956 957 958 959 960 961 962 963 964 965 966 967 968 969 970 971 972 973 974 975 976 977 978 979 980 981 982 983 984 985 986 987 988 989 990 991 992 993 994 995 996 997 998 999 1000 1001 1002 1003 1004 1005 1006 1007 1008 1009 1010 1011 1012 1013 1014 1015 1016 1017 1018 1019 1020 1021 1022 1023 1024 1025 1026 1027 1028 1029 1030 1031 1032 1033 1034 1035 1036 1037 1038 1039 1040 1041 1042 1043 1044 1045 1046 1047 1048 1049 1050 1051 1052 1053 1054 1055 1056 1057 1058 1059 1060 1061 1062 1063 1064 1065 1066 1067 1068 1069 1070 1071 1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108 1109 1110 1111 1112 1113 1114 1115 1116 1117 1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135 1136 1137 1138 1139 1140 1141 1142 1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155 1156 1157 1158 1159 1160 1161 1162 1163 1164 1165 1166 1167 1168 1169 1170 1171 1172 1173 1174 1175 1176 1177 1178 1179 1180 1181 1182 1183 1184 1185 1186 1187 1188 1189 1190 1191 1192 1193 1194 1195 1196 1197 1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246 1247 1248 1249 1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272 1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290 1291 1292 1293 1294 1295 1296 1297 1298 1299 1300 1301 1302 1303 1304 1305 1306 1307 1308 1309 1310 1311 1312 1313 1314 1315 1316 1317 1318 1319 1320 1321 1322 1323 1324 1325 1326 1327 1328 1329 1330 1331 1332 1333 1334 1335 1336 1337 1338 1339 1340 1341 1342 1343 1344 1345 1346 1347 1348 1349 1350 1351 1352 1353 1354 1355 1356 1357 1358 1359 1360 1361 1362 1363 1364 1365 1366 1367 1368 1369 1370 1371 1372 1373 1374 1375 1376 1377 1378 1379 1380 1381 1382 1383 1384 1385 1386 1387 1388 1389 1390 1391 1392 1393 1394 1395 1396 1397 1398 1399 1400 1401 1402 1403 1404 1405 1406 1407 1408 1409 1410 1411 1412 1413 1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425 1426 1427 1428 1429 1430 1431 1432 1433 1434 1435 1436 1437 1438 1439 1440 1441 1442 1443 1444 1445 1446 1447 1448 1449 1450 1451 1452 1453 1454 1455 1456 1457 1458 1459 1460 1461 1462 1463 1464 1465 1466 1467 1468 1469 1470 1471 1472 1473 1474 1475 1476 1477 1478 1479 1480 1481 1482 1483 1484 1485 1486 1487 1488 1489 1490 1491 1492 1493 1494 1495 1496 1497 1498 1499 1500 1501 1502 1503 1504 1505 1506 1507 1508 1509 1510 1511 1512 1513 1514 1515 1516 1517 1518 1519 1520 1521 1522 1523 1524 1525 1526 1527 1528 1529 1530 1531 1532 1533 1534 1535 1536 1537 1538 1539 1540 1541 1542 1543 1544 1545 1546 1547 1548 1549 1550 1551 1552 1553 1554 1555 1556 1557 1558 1559 1560 1561 1562 1563 1564 1565 1566 1567 1568 1569 1570 1571 1572 1573 1574 1575 1576 1577 1578 1579 1580 1581 1582 1583 1584 1585 1586 1587 1588 1589 1590 1591 1592 1593 1594 1595 1596 1597 1598 1599 1600 1601 1602 1603 1604 1605 1606 1607 1608 1609 1610 1611 1612 1613 1614 1615 1616 1617 1618 1619 1620 1621 1622 1623 1624 1625 1626 1627 1628 1629 1630 1631 1632 1633 1634 1635 1636 1637 1638 1639 1640 1641 1642 1643 1644 1645 1646 1647 1648 1649 1650 1651 1652 1653 1654 1655 1656 1657 1658 1659 1660 1661 1662 1663 1664 1665 1666 1667 1668 1669 1670 1671 1672 1673 1674 1675 1676 1677 1678 1679 1680 1681 1682 1683 1684 1685 1686 1687 1688 1689 1690 1691 1692 1693 1694 1695 1696 1697 1698 1699 1700 1701 1702 1703 1704 1705 1706 1707 1708 1709 1710 1711 1712 1713 1714 1715 1716 1717 1718 1719 1720 1721 1722 1723 1724 1725 1726 1727 1728 1729 1730 1731 1732 1733 1734 1735 1736 1737 1738 1739 1740 1741 1742 1743 1744 1745 1746 1747 1748 1749 1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764 1765 1766 1767 1768 1769 1770 1771 1772 1773 1774 1775 1776 1777 1778 1779 1780 1781 1782 1783 1784 1785 1786 1787 1788 1789 1790 1791 1792 1793 1794 1795 1796 1797 1798 1799 1800 1801 1802 1803 1804 1805 1806 1807 1808 1809 1810 1811 1812 1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824 1825 1826 1827 1828 1829 1830 1831 1832 1833 1834 1835 1836 1837 1838 1839 1840 1841 1842 1843 1844 1845 1846 1847 1848 1849 1850 1851 1852 1853 1854 1855 1856 1857 1858 1859 1860 1861 1862 1863 1864 1865 1866 1867 1868 1869 1870 1871 1872 1873 1874 1875 1876 1877 1878 1879 1880 1881 1882 1883 1884 1885 1886 1887 1888 1889 1890 1891 1892 1893 1894 1895 1896 1897 1898 1899 1900 1901 1902 1903 1904 1905 1906 1907 1908 1909 1910 1911 1912 1913 1914 1915 1916 1917 1918 1919 1920 1921 1922 1923 1924 1925 1926 1927 1928 1929 1930 1931 1932 1933 1934 1935 1936 1937 1938 1939 1940 1941 1942 1943 1944 1945 1946 1947 1948 1949 1950 1951 1952 1953 1954 1955 1956 1957 1958 1959 1960 1961 1962 1963 1964 1965 1966 1967 1968 1969 1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986 1987 1988 1989 1990 1991 1992 1993 1994 1995 1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022 2023 2024 2025 2026 2027 2028 2029 2030 2031 2032 2033 2034 2035 2036 2037 2038 2039 2040 2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052 2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063 2064 2065 2066 2067 2068 2069 2070 2071 2072 2073 2074 2075 2076 2077 2078 2079 2080 2081 2082 2083 2084 2085 2086 2087 2088 2089 2090 2091 2092 2093 2094 2095 2096 2097 2098 2099 2100 2101 2102 2103 2104 2105 2106 2107 2108 2109 2110 2111 2112 2113 2114 2115 2116 2117 2118 2119 2120 2121 2122 2123 2124 2125 2126 2127 2128 2129 2130 2131 2132 2133 2134 2135 2136 2137 2138 2139 2140 2141 2142 2143 2144 2145 2146 2147 2148 2149 2150 2151 2152 2153 2154 2155 2156 2157 2158 2159 2160 2161 2162 2163 2164 2165 2166 2167 2168 2169 2170 2171 2172 2173 2174 2175 2176 2177 2178 2179 2180 2181 2182 2183 2184 2185 2186 2187 2188 2189 2190 2191 2192 2193 2194 2195 2196 2197 2198 2199 2200 2201 2202 2203 2204 2205 2206 2207 2208 2209 2210 2211 2212 2213 2214 2215 2216 2217 2218 2219 2220 2221 2222 2223 2224 2225 2226 2227 2228 2229 2230 2231 2232 2233 2234 2235 2236 2237 2238 2239 2240 2241 2242 2243 2244 2245 2246 2247 2248 2249 2250 2251 2252 2253 2254 2255 2256 2257 2258 2259 2260 2261 2262 2263 2264 2265 2266 2267 2268 2269 2270 2271 2272 2273 2274 2275 2276 2277 2278 2279 2280 2281 2282 2283 2284 2285 2286 2287 2288 2289 2290 2291 2292 2293 2294 2295 2296 2297 2298 2299 2300 2301 2302 2303 2304 2305 2306 2307 2308 2309 2310 2311 2312 2313 2314 2315 2316 2317 2318 2319 2320 2321 2322 2323 2324
/* SPDX-License-Identifier: BSD-3-Clause
 *
 * Copyright (c) 2008-2018 Solarflare Communications Inc.
 * All rights reserved.
 */

#include "efx.h"
#include "efx_impl.h"

#if EFSYS_OPT_MCDI

/*
 * There are three versions of the MCDI interface:
 *  - MCDIv0: Siena BootROM. Transport uses MCDIv1 headers.
 *  - MCDIv1: Siena firmware and Huntington BootROM.
 *  - MCDIv2: EF10 firmware (Huntington/Medford) and Medford BootROM.
 *            Transport uses MCDIv2 headers.
 *
 * MCDIv2 Header NOT_EPOCH flag
 * ----------------------------
 * A new epoch begins at initial startup or after an MC reboot, and defines when
 * the MC should reject stale MCDI requests.
 *
 * The first MCDI request sent by the host should contain NOT_EPOCH=0, and all
 * subsequent requests (until the next MC reboot) should contain NOT_EPOCH=1.
 *
 * After rebooting the MC will fail all requests with NOT_EPOCH=1 by writing a
 * response with ERROR=1 and DATALEN=0 until a request is seen with NOT_EPOCH=0.
 */



#if EFSYS_OPT_SIENA

static const efx_mcdi_ops_t	__efx_mcdi_siena_ops = {
	siena_mcdi_init,		/* emco_init */
	siena_mcdi_send_request,	/* emco_send_request */
	siena_mcdi_poll_reboot,		/* emco_poll_reboot */
	siena_mcdi_poll_response,	/* emco_poll_response */
	siena_mcdi_read_response,	/* emco_read_response */
	siena_mcdi_fini,		/* emco_fini */
	siena_mcdi_feature_supported,	/* emco_feature_supported */
	siena_mcdi_get_timeout,		/* emco_get_timeout */
};

#endif	/* EFSYS_OPT_SIENA */

#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD

static const efx_mcdi_ops_t	__efx_mcdi_ef10_ops = {
	ef10_mcdi_init,			/* emco_init */
	ef10_mcdi_send_request,		/* emco_send_request */
	ef10_mcdi_poll_reboot,		/* emco_poll_reboot */
	ef10_mcdi_poll_response,	/* emco_poll_response */
	ef10_mcdi_read_response,	/* emco_read_response */
	ef10_mcdi_fini,			/* emco_fini */
	ef10_mcdi_feature_supported,	/* emco_feature_supported */
	ef10_mcdi_get_timeout,		/* emco_get_timeout */
};

#endif	/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */



	__checkReturn	efx_rc_t
efx_mcdi_init(
	__in		efx_nic_t *enp,
	__in		const efx_mcdi_transport_t *emtp)
{
	const efx_mcdi_ops_t *emcop;
	efx_rc_t rc;

	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
	EFSYS_ASSERT3U(enp->en_mod_flags, ==, 0);

	switch (enp->en_family) {
#if EFSYS_OPT_SIENA
	case EFX_FAMILY_SIENA:
		emcop = &__efx_mcdi_siena_ops;
		break;
#endif	/* EFSYS_OPT_SIENA */

#if EFSYS_OPT_HUNTINGTON
	case EFX_FAMILY_HUNTINGTON:
		emcop = &__efx_mcdi_ef10_ops;
		break;
#endif	/* EFSYS_OPT_HUNTINGTON */

#if EFSYS_OPT_MEDFORD
	case EFX_FAMILY_MEDFORD:
		emcop = &__efx_mcdi_ef10_ops;
		break;
#endif	/* EFSYS_OPT_MEDFORD */

	default:
		EFSYS_ASSERT(0);
		rc = ENOTSUP;
		goto fail1;
	}

	if (enp->en_features & EFX_FEATURE_MCDI_DMA) {
		/* MCDI requires a DMA buffer in host memory */
		if ((emtp == NULL) || (emtp->emt_dma_mem) == NULL) {
			rc = EINVAL;
			goto fail2;
		}
	}
	enp->en_mcdi.em_emtp = emtp;

	if (emcop != NULL && emcop->emco_init != NULL) {
		if ((rc = emcop->emco_init(enp, emtp)) != 0)
			goto fail3;
	}

	enp->en_mcdi.em_emcop = emcop;
	enp->en_mod_flags |= EFX_MOD_MCDI;

	return (0);

fail3:
	EFSYS_PROBE(fail3);
fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	enp->en_mcdi.em_emcop = NULL;
	enp->en_mcdi.em_emtp = NULL;
	enp->en_mod_flags &= ~EFX_MOD_MCDI;

	return (rc);
}

			void
efx_mcdi_fini(
	__in		efx_nic_t *enp)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;

	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
	EFSYS_ASSERT3U(enp->en_mod_flags, ==, EFX_MOD_MCDI);

	if (emcop != NULL && emcop->emco_fini != NULL)
		emcop->emco_fini(enp);

	emip->emi_port = 0;
	emip->emi_aborted = 0;

	enp->en_mcdi.em_emcop = NULL;
	enp->en_mod_flags &= ~EFX_MOD_MCDI;
}

			void
efx_mcdi_new_epoch(
	__in		efx_nic_t *enp)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efsys_lock_state_t state;

	/* Start a new epoch (allow fresh MCDI requests to succeed) */
	EFSYS_LOCK(enp->en_eslp, state);
	emip->emi_new_epoch = B_TRUE;
	EFSYS_UNLOCK(enp->en_eslp, state);
}

static			void
efx_mcdi_send_request(
	__in		efx_nic_t *enp,
	__in		void *hdrp,
	__in		size_t hdr_len,
	__in		void *sdup,
	__in		size_t sdu_len)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;

	emcop->emco_send_request(enp, hdrp, hdr_len, sdup, sdu_len);
}

static			efx_rc_t
efx_mcdi_poll_reboot(
	__in		efx_nic_t *enp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	efx_rc_t rc;

	rc = emcop->emco_poll_reboot(enp);
	return (rc);
}

static			boolean_t
efx_mcdi_poll_response(
	__in		efx_nic_t *enp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	boolean_t available;

	available = emcop->emco_poll_response(enp);
	return (available);
}

static			void
efx_mcdi_read_response(
	__in		efx_nic_t *enp,
	__out		void *bufferp,
	__in		size_t offset,
	__in		size_t length)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;

	emcop->emco_read_response(enp, bufferp, offset, length);
}

			void
efx_mcdi_request_start(
	__in		efx_nic_t *enp,
	__in		efx_mcdi_req_t *emrp,
	__in		boolean_t ev_cpl)
{
#if EFSYS_OPT_MCDI_LOGGING
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
#endif
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efx_dword_t hdr[2];
	size_t hdr_len;
	unsigned int max_version;
	unsigned int seq;
	unsigned int xflags;
	boolean_t new_epoch;
	efsys_lock_state_t state;

	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	/*
	 * efx_mcdi_request_start() is naturally serialised against both
	 * efx_mcdi_request_poll() and efx_mcdi_ev_cpl()/efx_mcdi_ev_death(),
	 * by virtue of there only being one outstanding MCDI request.
	 * Unfortunately, upper layers may also call efx_mcdi_request_abort()
	 * at any time, to timeout a pending mcdi request, That request may
	 * then subsequently complete, meaning efx_mcdi_ev_cpl() or
	 * efx_mcdi_ev_death() may end up running in parallel with
	 * efx_mcdi_request_start(). This race is handled by ensuring that
	 * %emi_pending_req, %emi_ev_cpl and %emi_seq are protected by the
	 * en_eslp lock.
	 */
	EFSYS_LOCK(enp->en_eslp, state);
	EFSYS_ASSERT(emip->emi_pending_req == NULL);
	emip->emi_pending_req = emrp;
	emip->emi_ev_cpl = ev_cpl;
	emip->emi_poll_cnt = 0;
	seq = emip->emi_seq++ & EFX_MASK32(MCDI_HEADER_SEQ);
	new_epoch = emip->emi_new_epoch;
	max_version = emip->emi_max_version;
	EFSYS_UNLOCK(enp->en_eslp, state);

	xflags = 0;
	if (ev_cpl)
		xflags |= MCDI_HEADER_XFLAGS_EVREQ;

	/*
	 * Huntington firmware supports MCDIv2, but the Huntington BootROM only
	 * supports MCDIv1. Use MCDIv1 headers for MCDIv1 commands where
	 * possible to support this.
	 */
	if ((max_version >= 2) &&
	    ((emrp->emr_cmd > MC_CMD_CMD_SPACE_ESCAPE_7) ||
	    (emrp->emr_in_length > MCDI_CTL_SDU_LEN_MAX_V1) ||
	    (emrp->emr_out_length > MCDI_CTL_SDU_LEN_MAX_V1))) {
		/* Construct MCDI v2 header */
		hdr_len = sizeof (hdr);
		EFX_POPULATE_DWORD_8(hdr[0],
		    MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
		    MCDI_HEADER_RESYNC, 1,
		    MCDI_HEADER_DATALEN, 0,
		    MCDI_HEADER_SEQ, seq,
		    MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
		    MCDI_HEADER_ERROR, 0,
		    MCDI_HEADER_RESPONSE, 0,
		    MCDI_HEADER_XFLAGS, xflags);

		EFX_POPULATE_DWORD_2(hdr[1],
		    MC_CMD_V2_EXTN_IN_EXTENDED_CMD, emrp->emr_cmd,
		    MC_CMD_V2_EXTN_IN_ACTUAL_LEN, emrp->emr_in_length);
	} else {
		/* Construct MCDI v1 header */
		hdr_len = sizeof (hdr[0]);
		EFX_POPULATE_DWORD_8(hdr[0],
		    MCDI_HEADER_CODE, emrp->emr_cmd,
		    MCDI_HEADER_RESYNC, 1,
		    MCDI_HEADER_DATALEN, emrp->emr_in_length,
		    MCDI_HEADER_SEQ, seq,
		    MCDI_HEADER_NOT_EPOCH, new_epoch ? 0 : 1,
		    MCDI_HEADER_ERROR, 0,
		    MCDI_HEADER_RESPONSE, 0,
		    MCDI_HEADER_XFLAGS, xflags);
	}

#if EFSYS_OPT_MCDI_LOGGING
	if (emtp->emt_logger != NULL) {
		emtp->emt_logger(emtp->emt_context, EFX_LOG_MCDI_REQUEST,
		    &hdr[0], hdr_len,
		    emrp->emr_in_buf, emrp->emr_in_length);
	}
#endif /* EFSYS_OPT_MCDI_LOGGING */

	efx_mcdi_send_request(enp, &hdr[0], hdr_len,
	    emrp->emr_in_buf, emrp->emr_in_length);
}


static			void
efx_mcdi_read_response_header(
	__in		efx_nic_t *enp,
	__inout		efx_mcdi_req_t *emrp)
{
#if EFSYS_OPT_MCDI_LOGGING
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
#endif /* EFSYS_OPT_MCDI_LOGGING */
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efx_dword_t hdr[2];
	unsigned int hdr_len;
	unsigned int data_len;
	unsigned int seq;
	unsigned int cmd;
	unsigned int error;
	efx_rc_t rc;

	EFSYS_ASSERT(emrp != NULL);

	efx_mcdi_read_response(enp, &hdr[0], 0, sizeof (hdr[0]));
	hdr_len = sizeof (hdr[0]);

	cmd = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE);
	seq = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_SEQ);
	error = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_ERROR);

	if (cmd != MC_CMD_V2_EXTN) {
		data_len = EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_DATALEN);
	} else {
		efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
		hdr_len += sizeof (hdr[1]);

		cmd = EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_EXTENDED_CMD);
		data_len =
		    EFX_DWORD_FIELD(hdr[1], MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
	}

	if (error && (data_len == 0)) {
		/* The MC has rebooted since the request was sent. */
		EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
		efx_mcdi_poll_reboot(enp);
		rc = EIO;
		goto fail1;
	}
	if ((cmd != emrp->emr_cmd) ||
	    (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
		/* Response is for a different request */
		rc = EIO;
		goto fail2;
	}
	if (error) {
		efx_dword_t err[2];
		unsigned int err_len = MIN(data_len, sizeof (err));
		int err_code = MC_CMD_ERR_EPROTO;
		int err_arg = 0;

		/* Read error code (and arg num for MCDI v2 commands) */
		efx_mcdi_read_response(enp, &err, hdr_len, err_len);

		if (err_len >= (MC_CMD_ERR_CODE_OFST + sizeof (efx_dword_t)))
			err_code = EFX_DWORD_FIELD(err[0], EFX_DWORD_0);
#ifdef WITH_MCDI_V2
		if (err_len >= (MC_CMD_ERR_ARG_OFST + sizeof (efx_dword_t)))
			err_arg = EFX_DWORD_FIELD(err[1], EFX_DWORD_0);
#endif
		emrp->emr_err_code = err_code;
		emrp->emr_err_arg = err_arg;

#if EFSYS_OPT_MCDI_PROXY_AUTH
		if ((err_code == MC_CMD_ERR_PROXY_PENDING) &&
		    (err_len == sizeof (err))) {
			/*
			 * The MCDI request would normally fail with EPERM, but
			 * firmware has forwarded it to an authorization agent
			 * attached to a privileged PF.
			 *
			 * Save the authorization request handle. The client
			 * must wait for a PROXY_RESPONSE event, or timeout.
			 */
			emrp->emr_proxy_handle = err_arg;
		}
#endif /* EFSYS_OPT_MCDI_PROXY_AUTH */

#if EFSYS_OPT_MCDI_LOGGING
		if (emtp->emt_logger != NULL) {
			emtp->emt_logger(emtp->emt_context,
			    EFX_LOG_MCDI_RESPONSE,
			    &hdr[0], hdr_len,
			    &err[0], err_len);
		}
#endif /* EFSYS_OPT_MCDI_LOGGING */

		if (!emrp->emr_quiet) {
			EFSYS_PROBE3(mcdi_err_arg, int, emrp->emr_cmd,
			    int, err_code, int, err_arg);
		}

		rc = efx_mcdi_request_errcode(err_code);
		goto fail3;
	}

	emrp->emr_rc = 0;
	emrp->emr_out_length_used = data_len;
#if EFSYS_OPT_MCDI_PROXY_AUTH
	emrp->emr_proxy_handle = 0;
#endif /* EFSYS_OPT_MCDI_PROXY_AUTH */
	return;

fail3:
fail2:
fail1:
	emrp->emr_rc = rc;
	emrp->emr_out_length_used = 0;
}

static			void
efx_mcdi_finish_response(
	__in		efx_nic_t *enp,
	__in		efx_mcdi_req_t *emrp)
{
#if EFSYS_OPT_MCDI_LOGGING
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
#endif /* EFSYS_OPT_MCDI_LOGGING */
	efx_dword_t hdr[2];
	unsigned int hdr_len;
	size_t bytes;

	if (emrp->emr_out_buf == NULL)
		return;

	/* Read the command header to detect MCDI response format */
	hdr_len = sizeof (hdr[0]);
	efx_mcdi_read_response(enp, &hdr[0], 0, hdr_len);
	if (EFX_DWORD_FIELD(hdr[0], MCDI_HEADER_CODE) == MC_CMD_V2_EXTN) {
		/*
		 * Read the actual payload length. The length given in the event
		 * is only correct for responses with the V1 format.
		 */
		efx_mcdi_read_response(enp, &hdr[1], hdr_len, sizeof (hdr[1]));
		hdr_len += sizeof (hdr[1]);

		emrp->emr_out_length_used = EFX_DWORD_FIELD(hdr[1],
					    MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
	}

	/* Copy payload out into caller supplied buffer */
	bytes = MIN(emrp->emr_out_length_used, emrp->emr_out_length);
	efx_mcdi_read_response(enp, emrp->emr_out_buf, hdr_len, bytes);

#if EFSYS_OPT_MCDI_LOGGING
	if (emtp->emt_logger != NULL) {
		emtp->emt_logger(emtp->emt_context,
		    EFX_LOG_MCDI_RESPONSE,
		    &hdr[0], hdr_len,
		    emrp->emr_out_buf, bytes);
	}
#endif /* EFSYS_OPT_MCDI_LOGGING */
}


	__checkReturn	boolean_t
efx_mcdi_request_poll(
	__in		efx_nic_t *enp)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efx_mcdi_req_t *emrp;
	efsys_lock_state_t state;
	efx_rc_t rc;

	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	/* Serialise against post-watchdog efx_mcdi_ev* */
	EFSYS_LOCK(enp->en_eslp, state);

	EFSYS_ASSERT(emip->emi_pending_req != NULL);
	EFSYS_ASSERT(!emip->emi_ev_cpl);
	emrp = emip->emi_pending_req;

	/* Check for reboot atomically w.r.t efx_mcdi_request_start */
	if (emip->emi_poll_cnt++ == 0) {
		if ((rc = efx_mcdi_poll_reboot(enp)) != 0) {
			emip->emi_pending_req = NULL;
			EFSYS_UNLOCK(enp->en_eslp, state);

			/* Reboot/Assertion */
			if (rc == EIO || rc == EINTR)
				efx_mcdi_raise_exception(enp, emrp, rc);

			goto fail1;
		}
	}

	/* Check if a response is available */
	if (efx_mcdi_poll_response(enp) == B_FALSE) {
		EFSYS_UNLOCK(enp->en_eslp, state);
		return (B_FALSE);
	}

	/* Read the response header */
	efx_mcdi_read_response_header(enp, emrp);

	/* Request complete */
	emip->emi_pending_req = NULL;

	/* Ensure stale MCDI requests fail after an MC reboot. */
	emip->emi_new_epoch = B_FALSE;

	EFSYS_UNLOCK(enp->en_eslp, state);

	if ((rc = emrp->emr_rc) != 0)
		goto fail2;

	efx_mcdi_finish_response(enp, emrp);
	return (B_TRUE);

fail2:
	if (!emrp->emr_quiet)
		EFSYS_PROBE(fail2);
fail1:
	if (!emrp->emr_quiet)
		EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (B_TRUE);
}

	__checkReturn	boolean_t
efx_mcdi_request_abort(
	__in		efx_nic_t *enp)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efx_mcdi_req_t *emrp;
	boolean_t aborted;
	efsys_lock_state_t state;

	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	/*
	 * efx_mcdi_ev_* may have already completed this event, and be
	 * spinning/blocked on the upper layer lock. So it *is* legitimate
	 * to for emi_pending_req to be NULL. If there is a pending event
	 * completed request, then provide a "credit" to allow
	 * efx_mcdi_ev_cpl() to accept a single spurious completion.
	 */
	EFSYS_LOCK(enp->en_eslp, state);
	emrp = emip->emi_pending_req;
	aborted = (emrp != NULL);
	if (aborted) {
		emip->emi_pending_req = NULL;

		/* Error the request */
		emrp->emr_out_length_used = 0;
		emrp->emr_rc = ETIMEDOUT;

		/* Provide a credit for seqno/emr_pending_req mismatches */
		if (emip->emi_ev_cpl)
			++emip->emi_aborted;

		/*
		 * The upper layer has called us, so we don't
		 * need to complete the request.
		 */
	}
	EFSYS_UNLOCK(enp->en_eslp, state);

	return (aborted);
}

			void
efx_mcdi_get_timeout(
	__in		efx_nic_t *enp,
	__in		efx_mcdi_req_t *emrp,
	__out		uint32_t *timeoutp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;

	emcop->emco_get_timeout(enp, emrp, timeoutp);
}

	__checkReturn	efx_rc_t
efx_mcdi_request_errcode(
	__in		unsigned int err)
{

	switch (err) {
		/* MCDI v1 */
	case MC_CMD_ERR_EPERM:
		return (EACCES);
	case MC_CMD_ERR_ENOENT:
		return (ENOENT);
	case MC_CMD_ERR_EINTR:
		return (EINTR);
	case MC_CMD_ERR_EACCES:
		return (EACCES);
	case MC_CMD_ERR_EBUSY:
		return (EBUSY);
	case MC_CMD_ERR_EINVAL:
		return (EINVAL);
	case MC_CMD_ERR_EDEADLK:
		return (EDEADLK);
	case MC_CMD_ERR_ENOSYS:
		return (ENOTSUP);
	case MC_CMD_ERR_ETIME:
		return (ETIMEDOUT);
	case MC_CMD_ERR_ENOTSUP:
		return (ENOTSUP);
	case MC_CMD_ERR_EALREADY:
		return (EALREADY);

		/* MCDI v2 */
	case MC_CMD_ERR_EEXIST:
		return (EEXIST);
#ifdef MC_CMD_ERR_EAGAIN
	case MC_CMD_ERR_EAGAIN:
		return (EAGAIN);
#endif
#ifdef MC_CMD_ERR_ENOSPC
	case MC_CMD_ERR_ENOSPC:
		return (ENOSPC);
#endif
	case MC_CMD_ERR_ERANGE:
		return (ERANGE);

	case MC_CMD_ERR_ALLOC_FAIL:
		return (ENOMEM);
	case MC_CMD_ERR_NO_VADAPTOR:
		return (ENOENT);
	case MC_CMD_ERR_NO_EVB_PORT:
		return (ENOENT);
	case MC_CMD_ERR_NO_VSWITCH:
		return (ENODEV);
	case MC_CMD_ERR_VLAN_LIMIT:
		return (EINVAL);
	case MC_CMD_ERR_BAD_PCI_FUNC:
		return (ENODEV);
	case MC_CMD_ERR_BAD_VLAN_MODE:
		return (EINVAL);
	case MC_CMD_ERR_BAD_VSWITCH_TYPE:
		return (EINVAL);
	case MC_CMD_ERR_BAD_VPORT_TYPE:
		return (EINVAL);
	case MC_CMD_ERR_MAC_EXIST:
		return (EEXIST);

	case MC_CMD_ERR_PROXY_PENDING:
		return (EAGAIN);

	default:
		EFSYS_PROBE1(mc_pcol_error, int, err);
		return (EIO);
	}
}

			void
efx_mcdi_raise_exception(
	__in		efx_nic_t *enp,
	__in_opt	efx_mcdi_req_t *emrp,
	__in		int rc)
{
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
	efx_mcdi_exception_t exception;

	/* Reboot or Assertion failure only */
	EFSYS_ASSERT(rc == EIO || rc == EINTR);

	/*
	 * If MC_CMD_REBOOT causes a reboot (dependent on parameters),
	 * then the EIO is not worthy of an exception.
	 */
	if (emrp != NULL && emrp->emr_cmd == MC_CMD_REBOOT && rc == EIO)
		return;

	exception = (rc == EIO)
		? EFX_MCDI_EXCEPTION_MC_REBOOT
		: EFX_MCDI_EXCEPTION_MC_BADASSERT;

	emtp->emt_exception(emtp->emt_context, exception);
}

			void
efx_mcdi_execute(
	__in		efx_nic_t *enp,
	__inout		efx_mcdi_req_t *emrp)
{
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;

	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	emrp->emr_quiet = B_FALSE;
	emtp->emt_execute(emtp->emt_context, emrp);
}

			void
efx_mcdi_execute_quiet(
	__in		efx_nic_t *enp,
	__inout		efx_mcdi_req_t *emrp)
{
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;

	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	emrp->emr_quiet = B_TRUE;
	emtp->emt_execute(emtp->emt_context, emrp);
}

			void
efx_mcdi_ev_cpl(
	__in		efx_nic_t *enp,
	__in		unsigned int seq,
	__in		unsigned int outlen,
	__in		int errcode)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
	efx_mcdi_req_t *emrp;
	efsys_lock_state_t state;

	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_MCDI);
	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	/*
	 * Serialise against efx_mcdi_request_poll()/efx_mcdi_request_start()
	 * when we're completing an aborted request.
	 */
	EFSYS_LOCK(enp->en_eslp, state);
	if (emip->emi_pending_req == NULL || !emip->emi_ev_cpl ||
	    (seq != ((emip->emi_seq - 1) & EFX_MASK32(MCDI_HEADER_SEQ)))) {
		EFSYS_ASSERT(emip->emi_aborted > 0);
		if (emip->emi_aborted > 0)
			--emip->emi_aborted;
		EFSYS_UNLOCK(enp->en_eslp, state);
		return;
	}

	emrp = emip->emi_pending_req;
	emip->emi_pending_req = NULL;
	EFSYS_UNLOCK(enp->en_eslp, state);

	if (emip->emi_max_version >= 2) {
		/* MCDIv2 response details do not fit into an event. */
		efx_mcdi_read_response_header(enp, emrp);
	} else {
		if (errcode != 0) {
			if (!emrp->emr_quiet) {
				EFSYS_PROBE2(mcdi_err, int, emrp->emr_cmd,
				    int, errcode);
			}
			emrp->emr_out_length_used = 0;
			emrp->emr_rc = efx_mcdi_request_errcode(errcode);
		} else {
			emrp->emr_out_length_used = outlen;
			emrp->emr_rc = 0;
		}
	}
	if (emrp->emr_rc == 0)
		efx_mcdi_finish_response(enp, emrp);

	emtp->emt_ev_cpl(emtp->emt_context);
}

#if EFSYS_OPT_MCDI_PROXY_AUTH

	__checkReturn	efx_rc_t
efx_mcdi_get_proxy_handle(
	__in		efx_nic_t *enp,
	__in		efx_mcdi_req_t *emrp,
	__out		uint32_t *handlep)
{
	efx_rc_t rc;

	_NOTE(ARGUNUSED(enp))

	/*
	 * Return proxy handle from MCDI request that returned with error
	 * MC_MCD_ERR_PROXY_PENDING. This handle is used to wait for a matching
	 * PROXY_RESPONSE event.
	 */
	if ((emrp == NULL) || (handlep == NULL)) {
		rc = EINVAL;
		goto fail1;
	}
	if ((emrp->emr_rc != 0) &&
	    (emrp->emr_err_code == MC_CMD_ERR_PROXY_PENDING)) {
		*handlep = emrp->emr_proxy_handle;
		rc = 0;
	} else {
		*handlep = 0;
		rc = ENOENT;
	}
	return (rc);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);
	return (rc);
}

			void
efx_mcdi_ev_proxy_response(
	__in		efx_nic_t *enp,
	__in		unsigned int handle,
	__in		unsigned int status)
{
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
	efx_rc_t rc;

	/*
	 * Handle results of an authorization request for a privileged MCDI
	 * command. If authorization was granted then we must re-issue the
	 * original MCDI request. If authorization failed or timed out,
	 * then the original MCDI request should be completed with the
	 * result code from this event.
	 */
	rc = (status == 0) ? 0 : efx_mcdi_request_errcode(status);

	emtp->emt_ev_proxy_response(emtp->emt_context, handle, rc);
}
#endif /* EFSYS_OPT_MCDI_PROXY_AUTH */

			void
efx_mcdi_ev_death(
	__in		efx_nic_t *enp,
	__in		int rc)
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	const efx_mcdi_transport_t *emtp = enp->en_mcdi.em_emtp;
	efx_mcdi_req_t *emrp = NULL;
	boolean_t ev_cpl;
	efsys_lock_state_t state;

	/*
	 * The MCDI request (if there is one) has been terminated, either
	 * by a BADASSERT or REBOOT event.
	 *
	 * If there is an outstanding event-completed MCDI operation, then we
	 * will never receive the completion event (because both MCDI
	 * completions and BADASSERT events are sent to the same evq). So
	 * complete this MCDI op.
	 *
	 * This function might run in parallel with efx_mcdi_request_poll()
	 * for poll completed mcdi requests, and also with
	 * efx_mcdi_request_start() for post-watchdog completions.
	 */
	EFSYS_LOCK(enp->en_eslp, state);
	emrp = emip->emi_pending_req;
	ev_cpl = emip->emi_ev_cpl;
	if (emrp != NULL && emip->emi_ev_cpl) {
		emip->emi_pending_req = NULL;

		emrp->emr_out_length_used = 0;
		emrp->emr_rc = rc;
		++emip->emi_aborted;
	}

	/*
	 * Since we're running in parallel with a request, consume the
	 * status word before dropping the lock.
	 */
	if (rc == EIO || rc == EINTR) {
		EFSYS_SPIN(EFX_MCDI_STATUS_SLEEP_US);
		(void) efx_mcdi_poll_reboot(enp);
		emip->emi_new_epoch = B_TRUE;
	}

	EFSYS_UNLOCK(enp->en_eslp, state);

	efx_mcdi_raise_exception(enp, emrp, rc);

	if (emrp != NULL && ev_cpl)
		emtp->emt_ev_cpl(emtp->emt_context);
}

	__checkReturn		efx_rc_t
efx_mcdi_version(
	__in			efx_nic_t *enp,
	__out_ecount_opt(4)	uint16_t versionp[4],
	__out_opt		uint32_t *buildp,
	__out_opt		efx_mcdi_boot_t *statusp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MAX(MC_CMD_GET_VERSION_IN_LEN,
				MC_CMD_GET_VERSION_OUT_LEN),
			    MAX(MC_CMD_GET_BOOT_STATUS_IN_LEN,
				MC_CMD_GET_BOOT_STATUS_OUT_LEN))];
	efx_word_t *ver_words;
	uint16_t version[4];
	uint32_t build;
	efx_mcdi_boot_t status;
	efx_rc_t rc;

	EFSYS_ASSERT3U(enp->en_features, &, EFX_FEATURE_MCDI);

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_VERSION;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_VERSION_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_VERSION_OUT_LEN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	/* bootrom support */
	if (req.emr_out_length_used == MC_CMD_GET_VERSION_V0_OUT_LEN) {
		version[0] = version[1] = version[2] = version[3] = 0;
		build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);

		goto version;
	}

	if (req.emr_out_length_used < MC_CMD_GET_VERSION_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	ver_words = MCDI_OUT2(req, efx_word_t, GET_VERSION_OUT_VERSION);
	version[0] = EFX_WORD_FIELD(ver_words[0], EFX_WORD_0);
	version[1] = EFX_WORD_FIELD(ver_words[1], EFX_WORD_0);
	version[2] = EFX_WORD_FIELD(ver_words[2], EFX_WORD_0);
	version[3] = EFX_WORD_FIELD(ver_words[3], EFX_WORD_0);
	build = MCDI_OUT_DWORD(req, GET_VERSION_OUT_FIRMWARE);

version:
	/* The bootrom doesn't understand BOOT_STATUS */
	if (MC_FW_VERSION_IS_BOOTLOADER(build)) {
		status = EFX_MCDI_BOOT_ROM;
		goto out;
	}

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_BOOT_STATUS;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_BOOT_STATUS_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_BOOT_STATUS_OUT_LEN;

	efx_mcdi_execute_quiet(enp, &req);

	if (req.emr_rc == EACCES) {
		/* Unprivileged functions cannot access BOOT_STATUS */
		status = EFX_MCDI_BOOT_PRIMARY;
		version[0] = version[1] = version[2] = version[3] = 0;
		build = 0;
		goto out;
	}

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail3;
	}

	if (req.emr_out_length_used < MC_CMD_GET_BOOT_STATUS_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail4;
	}

	if (MCDI_OUT_DWORD_FIELD(req, GET_BOOT_STATUS_OUT_FLAGS,
	    GET_BOOT_STATUS_OUT_FLAGS_PRIMARY))
		status = EFX_MCDI_BOOT_PRIMARY;
	else
		status = EFX_MCDI_BOOT_SECONDARY;

out:
	if (versionp != NULL)
		memcpy(versionp, version, sizeof (version));
	if (buildp != NULL)
		*buildp = build;
	if (statusp != NULL)
		*statusp = status;

	return (0);

fail4:
	EFSYS_PROBE(fail4);
fail3:
	EFSYS_PROBE(fail3);
fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_get_capabilities(
	__in		efx_nic_t *enp,
	__out_opt	uint32_t *flagsp,
	__out_opt	uint16_t *rx_dpcpu_fw_idp,
	__out_opt	uint16_t *tx_dpcpu_fw_idp,
	__out_opt	uint32_t *flags2p,
	__out_opt	uint32_t *tso2ncp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_CAPABILITIES_IN_LEN,
			    MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)];
	boolean_t v2_capable;
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_CAPABILITIES;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_CAPABILITIES_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_CAPABILITIES_V2_OUT_LEN;

	efx_mcdi_execute_quiet(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	if (flagsp != NULL)
		*flagsp = MCDI_OUT_DWORD(req, GET_CAPABILITIES_OUT_FLAGS1);

	if (rx_dpcpu_fw_idp != NULL)
		*rx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
					GET_CAPABILITIES_OUT_RX_DPCPU_FW_ID);

	if (tx_dpcpu_fw_idp != NULL)
		*tx_dpcpu_fw_idp = MCDI_OUT_WORD(req,
					GET_CAPABILITIES_OUT_TX_DPCPU_FW_ID);

	if (req.emr_out_length_used < MC_CMD_GET_CAPABILITIES_V2_OUT_LEN)
		v2_capable = B_FALSE;
	else
		v2_capable = B_TRUE;

	if (flags2p != NULL) {
		*flags2p = (v2_capable) ?
			MCDI_OUT_DWORD(req, GET_CAPABILITIES_V2_OUT_FLAGS2) :
			0;
	}

	if (tso2ncp != NULL) {
		*tso2ncp = (v2_capable) ?
			MCDI_OUT_WORD(req,
				GET_CAPABILITIES_V2_OUT_TX_TSO_V2_N_CONTEXTS) :
			0;
	}

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

static	__checkReturn	efx_rc_t
efx_mcdi_do_reboot(
	__in		efx_nic_t *enp,
	__in		boolean_t after_assertion)
{
	uint8_t payload[MAX(MC_CMD_REBOOT_IN_LEN, MC_CMD_REBOOT_OUT_LEN)];
	efx_mcdi_req_t req;
	efx_rc_t rc;

	/*
	 * We could require the caller to have caused en_mod_flags=0 to
	 * call this function. This doesn't help the other port though,
	 * who's about to get the MC ripped out from underneath them.
	 * Since they have to cope with the subsequent fallout of MCDI
	 * failures, we should as well.
	 */
	EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_REBOOT;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_REBOOT_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_REBOOT_OUT_LEN;

	MCDI_IN_SET_DWORD(req, REBOOT_IN_FLAGS,
	    (after_assertion ? MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION : 0));

	efx_mcdi_execute_quiet(enp, &req);

	if (req.emr_rc == EACCES) {
		/* Unprivileged functions cannot reboot the MC. */
		goto out;
	}

	/* A successful reboot request returns EIO. */
	if (req.emr_rc != 0 && req.emr_rc != EIO) {
		rc = req.emr_rc;
		goto fail1;
	}

out:
	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_reboot(
	__in		efx_nic_t *enp)
{
	return (efx_mcdi_do_reboot(enp, B_FALSE));
}

	__checkReturn	efx_rc_t
efx_mcdi_exit_assertion_handler(
	__in		efx_nic_t *enp)
{
	return (efx_mcdi_do_reboot(enp, B_TRUE));
}

	__checkReturn	efx_rc_t
efx_mcdi_read_assertion(
	__in		efx_nic_t *enp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_ASSERTS_IN_LEN,
			    MC_CMD_GET_ASSERTS_OUT_LEN)];
	const char *reason;
	unsigned int flags;
	unsigned int index;
	unsigned int ofst;
	int retry;
	efx_rc_t rc;

	/*
	 * Before we attempt to chat to the MC, we should verify that the MC
	 * isn't in it's assertion handler, either due to a previous reboot,
	 * or because we're reinitializing due to an eec_exception().
	 *
	 * Use GET_ASSERTS to read any assertion state that may be present.
	 * Retry this command twice. Once because a boot-time assertion failure
	 * might cause the 1st MCDI request to fail. And once again because
	 * we might race with efx_mcdi_exit_assertion_handler() running on
	 * partner port(s) on the same NIC.
	 */
	retry = 2;
	do {
		(void) memset(payload, 0, sizeof (payload));
		req.emr_cmd = MC_CMD_GET_ASSERTS;
		req.emr_in_buf = payload;
		req.emr_in_length = MC_CMD_GET_ASSERTS_IN_LEN;
		req.emr_out_buf = payload;
		req.emr_out_length = MC_CMD_GET_ASSERTS_OUT_LEN;

		MCDI_IN_SET_DWORD(req, GET_ASSERTS_IN_CLEAR, 1);
		efx_mcdi_execute_quiet(enp, &req);

	} while ((req.emr_rc == EINTR || req.emr_rc == EIO) && retry-- > 0);

	if (req.emr_rc != 0) {
		if (req.emr_rc == EACCES) {
			/* Unprivileged functions cannot clear assertions. */
			goto out;
		}
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_ASSERTS_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	/* Print out any assertion state recorded */
	flags = MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_GLOBAL_FLAGS);
	if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
		return (0);

	reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
		? "system-level assertion"
		: (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
		? "thread-level assertion"
		: (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
		? "watchdog reset"
		: (flags == MC_CMD_GET_ASSERTS_FLAGS_ADDR_TRAP)
		? "illegal address trap"
		: "unknown assertion";
	EFSYS_PROBE3(mcpu_assertion,
	    const char *, reason, unsigned int,
	    MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_SAVED_PC_OFFS),
	    unsigned int,
	    MCDI_OUT_DWORD(req, GET_ASSERTS_OUT_THREAD_OFFS));

	/* Print out the registers (r1 ... r31) */
	ofst = MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_OFST;
	for (index = 1;
		index < 1 + MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
		index++) {
		EFSYS_PROBE2(mcpu_register, unsigned int, index, unsigned int,
			    EFX_DWORD_FIELD(*MCDI_OUT(req, efx_dword_t, ofst),
					    EFX_DWORD_0));
		ofst += sizeof (efx_dword_t);
	}
	EFSYS_ASSERT(ofst <= MC_CMD_GET_ASSERTS_OUT_LEN);

out:
	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}


/*
 * Internal routines for for specific MCDI requests.
 */

	__checkReturn	efx_rc_t
efx_mcdi_drv_attach(
	__in		efx_nic_t *enp,
	__in		boolean_t attach)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_DRV_ATTACH_IN_LEN,
			    MC_CMD_DRV_ATTACH_EXT_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_DRV_ATTACH;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_DRV_ATTACH_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_DRV_ATTACH_EXT_OUT_LEN;

	/*
	 * Use DONT_CARE for the datapath firmware type to ensure that the
	 * driver can attach to an unprivileged function. The datapath firmware
	 * type to use is controlled by the 'sfboot' utility.
	 */
	MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_NEW_STATE, attach ? 1 : 0);
	MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_UPDATE, 1);
	MCDI_IN_SET_DWORD(req, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_DONT_CARE);

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_DRV_ATTACH_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_get_board_cfg(
	__in			efx_nic_t *enp,
	__out_opt		uint32_t *board_typep,
	__out_opt		efx_dword_t *capabilitiesp,
	__out_ecount_opt(6)	uint8_t mac_addrp[6])
{
	efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
			    MC_CMD_GET_BOARD_CFG_OUT_LENMIN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_BOARD_CFG;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMIN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	if (mac_addrp != NULL) {
		uint8_t *addrp;

		if (emip->emi_port == 1) {
			addrp = MCDI_OUT2(req, uint8_t,
			    GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0);
		} else if (emip->emi_port == 2) {
			addrp = MCDI_OUT2(req, uint8_t,
			    GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1);
		} else {
			rc = EINVAL;
			goto fail3;
		}

		EFX_MAC_ADDR_COPY(mac_addrp, addrp);
	}

	if (capabilitiesp != NULL) {
		if (emip->emi_port == 1) {
			*capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
			    GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
		} else if (emip->emi_port == 2) {
			*capabilitiesp = *MCDI_OUT2(req, efx_dword_t,
			    GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
		} else {
			rc = EINVAL;
			goto fail4;
		}
	}

	if (board_typep != NULL) {
		*board_typep = MCDI_OUT_DWORD(req,
		    GET_BOARD_CFG_OUT_BOARD_TYPE);
	}

	return (0);

fail4:
	EFSYS_PROBE(fail4);
fail3:
	EFSYS_PROBE(fail3);
fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_get_resource_limits(
	__in		efx_nic_t *enp,
	__out_opt	uint32_t *nevqp,
	__out_opt	uint32_t *nrxqp,
	__out_opt	uint32_t *ntxqp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_RESOURCE_LIMITS_IN_LEN,
			    MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_RESOURCE_LIMITS;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_RESOURCE_LIMITS_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_RESOURCE_LIMITS_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	if (nevqp != NULL)
		*nevqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_EVQ);
	if (nrxqp != NULL)
		*nrxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_RXQ);
	if (ntxqp != NULL)
		*ntxqp = MCDI_OUT_DWORD(req, GET_RESOURCE_LIMITS_OUT_TXQ);

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_get_phy_cfg(
	__in		efx_nic_t *enp)
{
	efx_port_t *epp = &(enp->en_port);
	efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_PHY_CFG_IN_LEN,
			    MC_CMD_GET_PHY_CFG_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_PHY_CFG;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_PHY_CFG_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_PHY_CFG_OUT_LEN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_PHY_CFG_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	encp->enc_phy_type = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_TYPE);
#if EFSYS_OPT_NAMES
	(void) strncpy(encp->enc_phy_name,
		MCDI_OUT2(req, char, GET_PHY_CFG_OUT_NAME),
		MIN(sizeof (encp->enc_phy_name) - 1,
		    MC_CMD_GET_PHY_CFG_OUT_NAME_LEN));
#endif	/* EFSYS_OPT_NAMES */
	(void) memset(encp->enc_phy_revision, 0,
	    sizeof (encp->enc_phy_revision));
	memcpy(encp->enc_phy_revision,
		MCDI_OUT2(req, char, GET_PHY_CFG_OUT_REVISION),
		MIN(sizeof (encp->enc_phy_revision) - 1,
		    MC_CMD_GET_PHY_CFG_OUT_REVISION_LEN));
#if EFSYS_OPT_PHY_LED_CONTROL
	encp->enc_led_mask = ((1 << EFX_PHY_LED_DEFAULT) |
			    (1 << EFX_PHY_LED_OFF) |
			    (1 << EFX_PHY_LED_ON));
#endif	/* EFSYS_OPT_PHY_LED_CONTROL */

	/* Get the media type of the fixed port, if recognised. */
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_XAUI == EFX_PHY_MEDIA_XAUI);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_CX4 == EFX_PHY_MEDIA_CX4);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_KX4 == EFX_PHY_MEDIA_KX4);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_XFP == EFX_PHY_MEDIA_XFP);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_SFP_PLUS == EFX_PHY_MEDIA_SFP_PLUS);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_BASE_T == EFX_PHY_MEDIA_BASE_T);
	EFX_STATIC_ASSERT(MC_CMD_MEDIA_QSFP_PLUS == EFX_PHY_MEDIA_QSFP_PLUS);
	epp->ep_fixed_port_type =
		(efx_phy_media_type_t) MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_MEDIA_TYPE);
	if (epp->ep_fixed_port_type >= EFX_PHY_MEDIA_NTYPES)
		epp->ep_fixed_port_type = EFX_PHY_MEDIA_INVALID;

	epp->ep_phy_cap_mask =
		MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_SUPPORTED_CAP);
#if EFSYS_OPT_PHY_FLAGS
	encp->enc_phy_flags_mask = MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_FLAGS);
#endif	/* EFSYS_OPT_PHY_FLAGS */

	encp->enc_port = (uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_PRT);

	/* Populate internal state */
	encp->enc_mcdi_mdio_channel =
		(uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);

#if EFSYS_OPT_PHY_STATS
	encp->enc_mcdi_phy_stat_mask =
		MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_STATS_MASK);
#endif	/* EFSYS_OPT_PHY_STATS */

#if EFSYS_OPT_BIST
	encp->enc_bist_mask = 0;
	if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
	    GET_PHY_CFG_OUT_BIST_CABLE_SHORT))
		encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);
	if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
	    GET_PHY_CFG_OUT_BIST_CABLE_LONG))
		encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);
	if (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,
	    GET_PHY_CFG_OUT_BIST))
		encp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);
#endif  /* EFSYS_OPT_BIST */

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_firmware_update_supported(
	__in			efx_nic_t *enp,
	__out			boolean_t *supportedp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	efx_rc_t rc;

	if (emcop != NULL) {
		if ((rc = emcop->emco_feature_supported(enp,
			    EFX_MCDI_FEATURE_FW_UPDATE, supportedp)) != 0)
			goto fail1;
	} else {
		/* Earlier devices always supported updates */
		*supportedp = B_TRUE;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_macaddr_change_supported(
	__in			efx_nic_t *enp,
	__out			boolean_t *supportedp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	efx_rc_t rc;

	if (emcop != NULL) {
		if ((rc = emcop->emco_feature_supported(enp,
			    EFX_MCDI_FEATURE_MACADDR_CHANGE, supportedp)) != 0)
			goto fail1;
	} else {
		/* Earlier devices always supported MAC changes */
		*supportedp = B_TRUE;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_link_control_supported(
	__in			efx_nic_t *enp,
	__out			boolean_t *supportedp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	efx_rc_t rc;

	if (emcop != NULL) {
		if ((rc = emcop->emco_feature_supported(enp,
			    EFX_MCDI_FEATURE_LINK_CONTROL, supportedp)) != 0)
			goto fail1;
	} else {
		/* Earlier devices always supported link control */
		*supportedp = B_TRUE;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_mac_spoofing_supported(
	__in			efx_nic_t *enp,
	__out			boolean_t *supportedp)
{
	const efx_mcdi_ops_t *emcop = enp->en_mcdi.em_emcop;
	efx_rc_t rc;

	if (emcop != NULL) {
		if ((rc = emcop->emco_feature_supported(enp,
			    EFX_MCDI_FEATURE_MAC_SPOOFING, supportedp)) != 0)
			goto fail1;
	} else {
		/* Earlier devices always supported MAC spoofing */
		*supportedp = B_TRUE;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

#if EFSYS_OPT_BIST

#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
/*
 * Enter bist offline mode. This is a fw mode which puts the NIC into a state
 * where memory BIST tests can be run and not much else can interfere or happen.
 * A reboot is required to exit this mode.
 */
	__checkReturn		efx_rc_t
efx_mcdi_bist_enable_offline(
	__in			efx_nic_t *enp)
{
	efx_mcdi_req_t req;
	efx_rc_t rc;

	EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);
	EFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);

	req.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;
	req.emr_in_buf = NULL;
	req.emr_in_length = 0;
	req.emr_out_buf = NULL;
	req.emr_out_length = 0;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}
#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */

	__checkReturn		efx_rc_t
efx_mcdi_bist_start(
	__in			efx_nic_t *enp,
	__in			efx_bist_type_t type)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN,
			    MC_CMD_START_BIST_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_START_BIST;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_START_BIST_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_START_BIST_OUT_LEN;

	switch (type) {
	case EFX_BIST_TYPE_PHY_NORMAL:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);
		break;
	case EFX_BIST_TYPE_PHY_CABLE_SHORT:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
		    MC_CMD_PHY_BIST_CABLE_SHORT);
		break;
	case EFX_BIST_TYPE_PHY_CABLE_LONG:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
		    MC_CMD_PHY_BIST_CABLE_LONG);
		break;
	case EFX_BIST_TYPE_MC_MEM:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
		    MC_CMD_MC_MEM_BIST);
		break;
	case EFX_BIST_TYPE_SAT_MEM:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
		    MC_CMD_PORT_MEM_BIST);
		break;
	case EFX_BIST_TYPE_REG:
		MCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,
		    MC_CMD_REG_BIST);
		break;
	default:
		EFSYS_ASSERT(0);
	}

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

#endif /* EFSYS_OPT_BIST */


/* Enable logging of some events (e.g. link state changes) */
	__checkReturn	efx_rc_t
efx_mcdi_log_ctrl(
	__in		efx_nic_t *enp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_LOG_CTRL_IN_LEN,
			    MC_CMD_LOG_CTRL_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_LOG_CTRL;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_LOG_CTRL_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_LOG_CTRL_OUT_LEN;

	MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST,
		    MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ);
	MCDI_IN_SET_DWORD(req, LOG_CTRL_IN_LOG_DEST_EVQ, 0);

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}


#if EFSYS_OPT_MAC_STATS

typedef enum efx_stats_action_e {
	EFX_STATS_CLEAR,
	EFX_STATS_UPLOAD,
	EFX_STATS_ENABLE_NOEVENTS,
	EFX_STATS_ENABLE_EVENTS,
	EFX_STATS_DISABLE,
} efx_stats_action_t;

static	__checkReturn	efx_rc_t
efx_mcdi_mac_stats(
	__in		efx_nic_t *enp,
	__in_opt	efsys_mem_t *esmp,
	__in		efx_stats_action_t action,
	__in		uint16_t period_ms)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_MAC_STATS_IN_LEN,
			    MC_CMD_MAC_STATS_OUT_DMA_LEN)];
	int clear = (action == EFX_STATS_CLEAR);
	int upload = (action == EFX_STATS_UPLOAD);
	int enable = (action == EFX_STATS_ENABLE_NOEVENTS);
	int events = (action == EFX_STATS_ENABLE_EVENTS);
	int disable = (action == EFX_STATS_DISABLE);
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_MAC_STATS;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_MAC_STATS_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_MAC_STATS_OUT_DMA_LEN;

	MCDI_IN_POPULATE_DWORD_6(req, MAC_STATS_IN_CMD,
	    MAC_STATS_IN_DMA, upload,
	    MAC_STATS_IN_CLEAR, clear,
	    MAC_STATS_IN_PERIODIC_CHANGE, enable | events | disable,
	    MAC_STATS_IN_PERIODIC_ENABLE, enable | events,
	    MAC_STATS_IN_PERIODIC_NOEVENT, !events,
	    MAC_STATS_IN_PERIOD_MS, (enable | events) ? period_ms : 0);

	if (esmp != NULL) {
		int bytes = MC_CMD_MAC_NSTATS * sizeof (uint64_t);

		EFX_STATIC_ASSERT(MC_CMD_MAC_NSTATS * sizeof (uint64_t) <=
		    EFX_MAC_STATS_SIZE);

		MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_LO,
			    EFSYS_MEM_ADDR(esmp) & 0xffffffff);
		MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_ADDR_HI,
			    EFSYS_MEM_ADDR(esmp) >> 32);
		MCDI_IN_SET_DWORD(req, MAC_STATS_IN_DMA_LEN, bytes);
	} else {
		EFSYS_ASSERT(!upload && !enable && !events);
	}

	/*
	 * NOTE: Do not use EVB_PORT_ID_ASSIGNED when disabling periodic stats,
	 *	 as this may fail (and leave periodic DMA enabled) if the
	 *	 vadapter has already been deleted.
	 */
	MCDI_IN_SET_DWORD(req, MAC_STATS_IN_PORT_ID,
	    (disable ? EVB_PORT_ID_NULL : enp->en_vport_id));

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		/* EF10: Expect ENOENT if no DMA queues are initialised */
		if ((req.emr_rc != ENOENT) ||
		    (enp->en_rx_qcount + enp->en_tx_qcount != 0)) {
			rc = req.emr_rc;
			goto fail1;
		}
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_mac_stats_clear(
	__in		efx_nic_t *enp)
{
	efx_rc_t rc;

	if ((rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_CLEAR, 0)) != 0)
		goto fail1;

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_mac_stats_upload(
	__in		efx_nic_t *enp,
	__in		efsys_mem_t *esmp)
{
	efx_rc_t rc;

	/*
	 * The MC DMAs aggregate statistics for our convenience, so we can
	 * avoid having to pull the statistics buffer into the cache to
	 * maintain cumulative statistics.
	 */
	if ((rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_UPLOAD, 0)) != 0)
		goto fail1;

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn	efx_rc_t
efx_mcdi_mac_stats_periodic(
	__in		efx_nic_t *enp,
	__in		efsys_mem_t *esmp,
	__in		uint16_t period_ms,
	__in		boolean_t events)
{
	efx_rc_t rc;

	/*
	 * The MC DMAs aggregate statistics for our convenience, so we can
	 * avoid having to pull the statistics buffer into the cache to
	 * maintain cumulative statistics.
	 * Huntington uses a fixed 1sec period.
	 * Medford uses a fixed 1sec period before v6.2.1.1033 firmware.
	 */
	if (period_ms == 0)
		rc = efx_mcdi_mac_stats(enp, NULL, EFX_STATS_DISABLE, 0);
	else if (events)
		rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_EVENTS,
		    period_ms);
	else
		rc = efx_mcdi_mac_stats(enp, esmp, EFX_STATS_ENABLE_NOEVENTS,
		    period_ms);

	if (rc != 0)
		goto fail1;

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

#endif	/* EFSYS_OPT_MAC_STATS */

#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD

/*
 * This function returns the pf and vf number of a function.  If it is a pf the
 * vf number is 0xffff.  The vf number is the index of the vf on that
 * function. So if you have 3 vfs on pf 0 the 3 vfs will return (pf=0,vf=0),
 * (pf=0,vf=1), (pf=0,vf=2) aand the pf will return (pf=0, vf=0xffff).
 */
	__checkReturn		efx_rc_t
efx_mcdi_get_function_info(
	__in			efx_nic_t *enp,
	__out			uint32_t *pfp,
	__out_opt		uint32_t *vfp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_FUNCTION_INFO_IN_LEN,
			    MC_CMD_GET_FUNCTION_INFO_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_FUNCTION_INFO;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_FUNCTION_INFO_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_FUNCTION_INFO_OUT_LEN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_GET_FUNCTION_INFO_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	*pfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_PF);
	if (vfp != NULL)
		*vfp = MCDI_OUT_DWORD(req, GET_FUNCTION_INFO_OUT_VF);

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

	__checkReturn		efx_rc_t
efx_mcdi_privilege_mask(
	__in			efx_nic_t *enp,
	__in			uint32_t pf,
	__in			uint32_t vf,
	__out			uint32_t *maskp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_PRIVILEGE_MASK_IN_LEN,
			    MC_CMD_PRIVILEGE_MASK_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_PRIVILEGE_MASK;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_PRIVILEGE_MASK_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_PRIVILEGE_MASK_OUT_LEN;

	MCDI_IN_POPULATE_DWORD_2(req, PRIVILEGE_MASK_IN_FUNCTION,
	    PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
	    PRIVILEGE_MASK_IN_FUNCTION_VF, vf);

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used < MC_CMD_PRIVILEGE_MASK_OUT_LEN) {
		rc = EMSGSIZE;
		goto fail2;
	}

	*maskp = MCDI_OUT_DWORD(req, PRIVILEGE_MASK_OUT_OLD_MASK);

	return (0);

fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */

	__checkReturn		efx_rc_t
efx_mcdi_set_workaround(
	__in			efx_nic_t *enp,
	__in			uint32_t type,
	__in			boolean_t enabled,
	__out_opt		uint32_t *flagsp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_WORKAROUND_IN_LEN,
			    MC_CMD_WORKAROUND_EXT_OUT_LEN)];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_WORKAROUND;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_WORKAROUND_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_WORKAROUND_OUT_LEN;

	MCDI_IN_SET_DWORD(req, WORKAROUND_IN_TYPE, type);
	MCDI_IN_SET_DWORD(req, WORKAROUND_IN_ENABLED, enabled ? 1 : 0);

	efx_mcdi_execute_quiet(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (flagsp != NULL) {
		if (req.emr_out_length_used >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
			*flagsp = MCDI_OUT_DWORD(req, WORKAROUND_EXT_OUT_FLAGS);
		else
			*flagsp = 0;
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}


	__checkReturn		efx_rc_t
efx_mcdi_get_workarounds(
	__in			efx_nic_t *enp,
	__out_opt		uint32_t *implementedp,
	__out_opt		uint32_t *enabledp)
{
	efx_mcdi_req_t req;
	uint8_t payload[MC_CMD_GET_WORKAROUNDS_OUT_LEN];
	efx_rc_t rc;

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_WORKAROUNDS;
	req.emr_in_buf = NULL;
	req.emr_in_length = 0;
	req.emr_out_buf = payload;
	req.emr_out_length = MC_CMD_GET_WORKAROUNDS_OUT_LEN;

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (implementedp != NULL) {
		*implementedp =
		    MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_IMPLEMENTED);
	}

	if (enabledp != NULL) {
		*enabledp = MCDI_OUT_DWORD(req, GET_WORKAROUNDS_OUT_ENABLED);
	}

	return (0);

fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

/*
 * Size of media information page in accordance with SFF-8472 and SFF-8436.
 * It is used in MCDI interface as well.
 */
#define	EFX_PHY_MEDIA_INFO_PAGE_SIZE		0x80

static	__checkReturn		efx_rc_t
efx_mcdi_get_phy_media_info(
	__in			efx_nic_t *enp,
	__in			uint32_t mcdi_page,
	__in			uint8_t offset,
	__in			uint8_t len,
	__out_bcount(len)	uint8_t *data)
{
	efx_mcdi_req_t req;
	uint8_t payload[MAX(MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN,
			    MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(
				EFX_PHY_MEDIA_INFO_PAGE_SIZE))];
	efx_rc_t rc;

	EFSYS_ASSERT((uint32_t)offset + len <= EFX_PHY_MEDIA_INFO_PAGE_SIZE);

	(void) memset(payload, 0, sizeof (payload));
	req.emr_cmd = MC_CMD_GET_PHY_MEDIA_INFO;
	req.emr_in_buf = payload;
	req.emr_in_length = MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN;
	req.emr_out_buf = payload;
	req.emr_out_length =
	    MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE);

	MCDI_IN_SET_DWORD(req, GET_PHY_MEDIA_INFO_IN_PAGE, mcdi_page);

	efx_mcdi_execute(enp, &req);

	if (req.emr_rc != 0) {
		rc = req.emr_rc;
		goto fail1;
	}

	if (req.emr_out_length_used !=
	    MC_CMD_GET_PHY_MEDIA_INFO_OUT_LEN(EFX_PHY_MEDIA_INFO_PAGE_SIZE)) {
		rc = EMSGSIZE;
		goto fail2;
	}

	if (MCDI_OUT_DWORD(req, GET_PHY_MEDIA_INFO_OUT_DATALEN) !=
	    EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
		rc = EIO;
		goto fail3;
	}

	memcpy(data,
	    MCDI_OUT2(req, uint8_t, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
	    len);

	return (0);

fail3:
	EFSYS_PROBE(fail3);
fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

/*
 * 2-wire device address of the base information in accordance with SFF-8472
 * Diagnostic Monitoring Interface for Optical Transceivers section
 * 4 Memory Organization.
 */
#define	EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE	0xA0

/*
 * 2-wire device address of the digital diagnostics monitoring interface
 * in accordance with SFF-8472 Diagnostic Monitoring Interface for Optical
 * Transceivers section 4 Memory Organization.
 */
#define	EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM	0xA2

/*
 * Hard wired 2-wire device address for QSFP+ in accordance with SFF-8436
 * QSFP+ 10 Gbs 4X PLUGGABLE TRANSCEIVER section 7.4 Device Addressing and
 * Operation.
 */
#define	EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP	0xA0

	__checkReturn		efx_rc_t
efx_mcdi_phy_module_get_info(
	__in			efx_nic_t *enp,
	__in			uint8_t dev_addr,
	__in			uint8_t offset,
	__in			uint8_t len,
	__out_bcount(len)	uint8_t *data)
{
	efx_port_t *epp = &(enp->en_port);
	efx_rc_t rc;
	uint32_t mcdi_lower_page;
	uint32_t mcdi_upper_page;

	EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);

	/*
	 * Map device address to MC_CMD_GET_PHY_MEDIA_INFO pages.
	 * Offset plus length interface allows to access page 0 only.
	 * I.e. non-zero upper pages are not accessible.
	 * See SFF-8472 section 4 Memory Organization and SFF-8436 section 7.6
	 * QSFP+ Memory Map for details on how information is structured
	 * and accessible.
	 */
	switch (epp->ep_fixed_port_type) {
	case EFX_PHY_MEDIA_SFP_PLUS:
		/*
		 * In accordance with SFF-8472 Diagnostic Monitoring
		 * Interface for Optical Transceivers section 4 Memory
		 * Organization two 2-wire addresses are defined.
		 */
		switch (dev_addr) {
		/* Base information */
		case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_BASE:
			/*
			 * MCDI page 0 should be used to access lower
			 * page 0 (0x00 - 0x7f) at the device address 0xA0.
			 */
			mcdi_lower_page = 0;
			/*
			 * MCDI page 1 should be used to access  upper
			 * page 0 (0x80 - 0xff) at the device address 0xA0.
			 */
			mcdi_upper_page = 1;
			break;
		/* Diagnostics */
		case EFX_PHY_MEDIA_INFO_DEV_ADDR_SFP_DDM:
			/*
			 * MCDI page 2 should be used to access lower
			 * page 0 (0x00 - 0x7f) at the device address 0xA2.
			 */
			mcdi_lower_page = 2;
			/*
			 * MCDI page 3 should be used to access upper
			 * page 0 (0x80 - 0xff) at the device address 0xA2.
			 */
			mcdi_upper_page = 3;
			break;
		default:
			rc = ENOTSUP;
			goto fail1;
		}
		break;
	case EFX_PHY_MEDIA_QSFP_PLUS:
		switch (dev_addr) {
		case EFX_PHY_MEDIA_INFO_DEV_ADDR_QSFP:
			/*
			 * MCDI page -1 should be used to access lower page 0
			 * (0x00 - 0x7f).
			 */
			mcdi_lower_page = (uint32_t)-1;
			/*
			 * MCDI page 0 should be used to access upper page 0
			 * (0x80h - 0xff).
			 */
			mcdi_upper_page = 0;
			break;
		default:
			rc = ENOTSUP;
			goto fail1;
		}
		break;
	default:
		rc = ENOTSUP;
		goto fail1;
	}

	if (offset < EFX_PHY_MEDIA_INFO_PAGE_SIZE) {
		uint8_t read_len =
		    MIN(len, EFX_PHY_MEDIA_INFO_PAGE_SIZE - offset);

		rc = efx_mcdi_get_phy_media_info(enp,
		    mcdi_lower_page, offset, read_len, data);
		if (rc != 0)
			goto fail2;

		data += read_len;
		len -= read_len;

		offset = 0;
	} else {
		offset -= EFX_PHY_MEDIA_INFO_PAGE_SIZE;
	}

	if (len > 0) {
		EFSYS_ASSERT3U(len, <=, EFX_PHY_MEDIA_INFO_PAGE_SIZE);
		EFSYS_ASSERT3U(offset, <, EFX_PHY_MEDIA_INFO_PAGE_SIZE);

		rc = efx_mcdi_get_phy_media_info(enp,
		    mcdi_upper_page, offset, len, data);
		if (rc != 0)
			goto fail3;
	}

	return (0);

fail3:
	EFSYS_PROBE(fail3);
fail2:
	EFSYS_PROBE(fail2);
fail1:
	EFSYS_PROBE1(fail1, efx_rc_t, rc);

	return (rc);
}

#endif	/* EFSYS_OPT_MCDI */