diff options
Diffstat (limited to 'examples/ip_pipeline/config')
| -rw-r--r-- | examples/ip_pipeline/config/edge_router_downstream.cfg | 85 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/edge_router_downstream.sh | 10 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/edge_router_upstream.cfg | 110 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/edge_router_upstream.sh | 38 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/ip_pipeline.cfg | 9 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/ip_pipeline.sh | 5 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/l2fwd.cfg | 55 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/l3fwd.cfg | 63 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/l3fwd.sh | 9 | ||||
| -rw-r--r-- | examples/ip_pipeline/config/tm_profile.cfg | 105 |
10 files changed, 489 insertions, 0 deletions
diff --git a/examples/ip_pipeline/config/edge_router_downstream.cfg b/examples/ip_pipeline/config/edge_router_downstream.cfg new file mode 100644 index 00000000..85bbab8f --- /dev/null +++ b/examples/ip_pipeline/config/edge_router_downstream.cfg @@ -0,0 +1,85 @@ +; BSD LICENSE +; +; Copyright(c) 2015 Intel Corporation. All rights reserved. +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; * Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; * Neither the name of Intel Corporation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + + +; An edge router typically sits between two networks such as the provider +; core network and the provider access network. A typical packet processing +; pipeline for the downstream traffic (i.e. traffic from core to access +; network) contains the following functional blocks: Packet RX & Routing, +; Traffic management and Packet TX. The input packets are assumed to be +; IPv4, while the output packets are Q-in-Q IPv4. + +; A simple implementation for this functional pipeline is presented below. + +; Packet Rx & Traffic Management Packet Tx +; Routing (Pass-Through) (Pass-Through) +; _____________________ SWQ0 ______________________ SWQ4 _____________________ +; RXQ0.0 --->| |----->| |----->| |---> TXQ0.0 +; | | SWQ1 | | SWQ5 | | +; RXQ1.0 --->| |----->| |----->| |---> TXQ1.0 +; | (P1) | SWQ2 | (P2) | SWQ6 | (P3) | +; RXQ2.0 --->| |----->| |----->| |---> TXQ2.0 +; | | SWQ3 | | SWQ7 | | +; RXQ3.0 --->| |----->| |----->| |---> TXQ3.0 +; |_____________________| |______________________| |_____________________| +; | _|_ ^ _|_ ^ _|_ ^ _|_ ^ +; | |___|||___|||___|||___|| +; +--> SINK0 |___|||___|||___|||___|| +; (route miss) |__| |__| |__| |__| +; TM0 TM1 TM2 TM3 + +[PIPELINE0] +type = MASTER +core = 0 + +[PIPELINE1] +type = ROUTING +core = 1 +pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0 +pktq_out = SWQ0 SWQ1 SWQ2 SWQ3 SINK0 +encap = ethernet_qinq +qinq_sched = test +ip_hdr_offset = 270; mbuf (128) + headroom (128) + ethernet header (14) = 270 + +[PIPELINE2] +type = PASS-THROUGH +core = 2 +pktq_in = SWQ0 SWQ1 SWQ2 SWQ3 TM0 TM1 TM2 TM3 +pktq_out = TM0 TM1 TM2 TM3 SWQ4 SWQ5 SWQ6 SWQ7 + +[PIPELINE3] +type = PASS-THROUGH +core = 3 +pktq_in = SWQ4 SWQ5 SWQ6 SWQ7 +pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0 + +[MEMPOOL0] +pool_size = 2M diff --git a/examples/ip_pipeline/config/edge_router_downstream.sh b/examples/ip_pipeline/config/edge_router_downstream.sh new file mode 100644 index 00000000..ce46beb5 --- /dev/null +++ b/examples/ip_pipeline/config/edge_router_downstream.sh @@ -0,0 +1,10 @@ +################################################################################ +# Routing: Ether QinQ, ARP off +################################################################################ +p 1 route add default 4 #SINK0 +p 1 route add 0.0.0.0 10 port 0 ether a0:b0:c0:d0:e0:f0 qinq 256 257 +p 1 route add 0.64.0.0 10 port 1 ether a1:b1:c1:d1:e1:f1 qinq 258 259 +p 1 route add 0.128.0.0 10 port 2 ether a2:b2:c2:d2:e2:f2 qinq 260 261 +p 1 route add 0.192.0.0 10 port 3 ether a3:b3:c3:d3:e3:f3 qinq 262 263 + +p 1 route ls diff --git a/examples/ip_pipeline/config/edge_router_upstream.cfg b/examples/ip_pipeline/config/edge_router_upstream.cfg new file mode 100644 index 00000000..a08c5cce --- /dev/null +++ b/examples/ip_pipeline/config/edge_router_upstream.cfg @@ -0,0 +1,110 @@ +; BSD LICENSE +; +; Copyright(c) 2015 Intel Corporation. All rights reserved. +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; * Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; * Neither the name of Intel Corporation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +; An edge router typically sits between two networks such as the provider +; core network and the provider access network. A typical packet processing +; pipeline for the upstream traffic (i.e. traffic from access to core +; network) contains the following functional blocks: Packet RX & Firewall, +; Flow classification, Metering, Routing and Packet TX. The input packets +; are assumed to be Q-in-Q IPv4, while the output packets are MPLS IPv4 +; (with variable number of labels per route). + +; A simple implementation for this functional pipeline is presented below. + +; Packet Rx & Pass-Through Flow-Classification Flow-Actions Routing +: Firewall +; __________ SWQ0 __________ SWQ4 __________ SWQ8 __________ SWQ12 __________ +; RXQ0.0 --->| |------>| |------>| |------>| |------>| |------> TXQ0.0 +; | | SWQ1 | | SWQ5 | | SWQ9 | | SWQ13 | | +; RXQ1.0 --->| |------>| |------>| |------>| |------>| |------> TXQ1.0 +; | (P1) | SWQ2 | (P2) | SWQ6 | (P3) | SWQ10 | (P4) | SWQ14 | (P5) | +; RXQ2.0 --->| |------>| |------>| |------>| |------>| |------> TXQ2.0 +; | | SWQ3 | | SWQ7 | | SWQ11 | | SWQ15 | | +; RXQ3.0 --->| |------>| |------>| |------>| |------>| |------> TXQ3.0 +; |__________| |__________| |__________| |__________| |__________| +; | | | +; +--> SINK0 (Default) +--> SINK1 (Default) +--> SINK2 (Route Miss) + + +[PIPELINE0] +type = MASTER +core = 0 + +[PIPELINE1] +type = FIREWALL +core = 1 +pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0 +pktq_out = SWQ0 SWQ1 SWQ2 SWQ3 SINK0 +n_rules = 4096 +pkt_type = qinq_ipv4 + +[PIPELINE2] +type = PASS-THROUGH +core = 2 +pktq_in = SWQ0 SWQ1 SWQ2 SWQ3 +pktq_out = SWQ4 SWQ5 SWQ6 SWQ7 +dma_size = 8 +dma_dst_offset = 128; mbuf (128) +dma_src_offset = 268; mbuf (128) + headroom (128) + 1st ethertype offset (12) = 268 +dma_src_mask = 00000FFF00000FFF; qinq +dma_hash_offset = 136; dma_dst_offset + dma_size = 136 + +[PIPELINE3] +type = FLOW_CLASSIFICATION +core = 2 +pktq_in = SWQ4 SWQ5 SWQ6 SWQ7 +pktq_out = SWQ8 SWQ9 SWQ10 SWQ11 SINK1 +n_flows = 65536 +key_size = 8; dma_size +key_offset = 128; dma_dst_offset +hash_offset = 136; dma_hash_offset +flowid_offset = 192; mbuf (128) + 64 + +[PIPELINE4] +type = FLOW_ACTIONS +core = 3 +pktq_in = SWQ8 SWQ9 SWQ10 SWQ11 +pktq_out = SWQ12 SWQ13 SWQ14 SWQ15 +n_flows = 65536 +n_meters_per_flow = 1 +flow_id_offset = 192; flowid_offset +ip_hdr_offset = 278; mbuf (128) + headroom (128) + ethernet (14) + qinq (8) = 278 +color_offset = 196; flowid_offset + sizeof(flow_id) + +[PIPELINE5] +type = ROUTING +core = 4 +pktq_in = SWQ12 SWQ13 SWQ14 SWQ15 +pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0 SINK2 +encap = ethernet_mpls +mpls_color_mark = yes +ip_hdr_offset = 278; mbuf (128) + headroom (128) + ethernet (14) + qinq (8) = 278 +color_offset = 196; flowid_offset + sizeof(flow_id) diff --git a/examples/ip_pipeline/config/edge_router_upstream.sh b/examples/ip_pipeline/config/edge_router_upstream.sh new file mode 100644 index 00000000..eeba600c --- /dev/null +++ b/examples/ip_pipeline/config/edge_router_upstream.sh @@ -0,0 +1,38 @@ +################################################ +# Firewall Rules:4 for 4 ports +################################################ +p 1 firewall add ipv4 1 0.0.0.0 8 0.0.0.0 10 0 0 0 0 6 1 0 +p 1 firewall add ipv4 1 0.0.0.0 8 0.64.0.0 10 0 0 0 0 6 1 1 +p 1 firewall add ipv4 1 0.0.0.0 8 0.128.0.0 10 0 0 0 0 6 1 2 +p 1 firewall add ipv4 1 0.0.0.0 8 0.192.0.0 10 0 0 0 0 6 1 3 +p 1 firewall add default 4 #SINK0 + + +################################################################################ +# Flow classification +################################################################################ +p 3 flow add default 4 #SINK1 +p 3 flow add qinq all 65536 4 + +################################################################################ +# Flow Actions - Metering +################################################################################ +p 4 flows 65536 meter 0 trtcm 1250000000 1250000000 100000000 100000000 +p 4 flows 65536 ports 4 + +################################################################################ +# Routing: Ether MPLS, ARP off +################################################################################ +p 5 route add default 4 #SINK2 +p 5 route add 0.0.0.0 10 port 0 ether a0:b0:c0:d0:e0:f0 mpls 0:1 +p 5 route add 0.64.0.0 10 port 1 ether a1:b1:c1:d1:e1:f1 mpls 10:11 +p 5 route add 0.128.0.0 10 port 2 ether a2:b2:c2:d2:e2:f2 mpls 20:21 +p 5 route add 0.192.0.0 10 port 3 ether a3:b3:c3:d3:e3:f3 mpls 30:31 + +################################################################################ +# List all configurations +################################################################################ +p 1 firewall ls +#p 3 flow ls +#p 4 flow actions ls +p 5 route ls diff --git a/examples/ip_pipeline/config/ip_pipeline.cfg b/examples/ip_pipeline/config/ip_pipeline.cfg new file mode 100644 index 00000000..095ed25e --- /dev/null +++ b/examples/ip_pipeline/config/ip_pipeline.cfg @@ -0,0 +1,9 @@ +[PIPELINE0] +type = MASTER +core = 0 + +[PIPELINE1] +type = PASS-THROUGH +core = 1 +pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0 +pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0 diff --git a/examples/ip_pipeline/config/ip_pipeline.sh b/examples/ip_pipeline/config/ip_pipeline.sh new file mode 100644 index 00000000..4fca2597 --- /dev/null +++ b/examples/ip_pipeline/config/ip_pipeline.sh @@ -0,0 +1,5 @@ +# +#run config/ip_pipeline.sh +# + +p 1 ping diff --git a/examples/ip_pipeline/config/l2fwd.cfg b/examples/ip_pipeline/config/l2fwd.cfg new file mode 100644 index 00000000..c743a143 --- /dev/null +++ b/examples/ip_pipeline/config/l2fwd.cfg @@ -0,0 +1,55 @@ +; BSD LICENSE +; +; Copyright(c) 2015 Intel Corporation. All rights reserved. +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; * Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; * Neither the name of Intel Corporation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +; +; The pass-through pipeline below connects the input ports to the output ports +; as follows: RXQ0.0 -> TXQ1.0, RXQ1.0 -> TXQ0.0, RXQ2.0 -> TXQ3.0 and +; RXQ3.0 -> TXQ2.0. +; ________________ +; RXQ0.0 --->|................|---> TXQ1.0 +; | | +; RXQ1.0 --->|................|---> TXQ0.0 +; | Pass-through | +; RXQ2.0 --->|................|---> TXQ3.0 +; | | +; RXQ3.0 --->|................|---> TXQ2.0 +; |________________| +; + +[PIPELINE0] +type = MASTER +core = 0 + +[PIPELINE1] +type = PASS-THROUGH +core = 1 +pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0 +pktq_out = TXQ1.0 TXQ0.0 TXQ3.0 TXQ2.0 diff --git a/examples/ip_pipeline/config/l3fwd.cfg b/examples/ip_pipeline/config/l3fwd.cfg new file mode 100644 index 00000000..5449dc32 --- /dev/null +++ b/examples/ip_pipeline/config/l3fwd.cfg @@ -0,0 +1,63 @@ +; BSD LICENSE +; +; Copyright(c) 2015 Intel Corporation. All rights reserved. +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; * Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; * Neither the name of Intel Corporation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +; _______________ +; RXQ0.0 --->| |---> TXQ0.0 +; | | +; RXQ1.0 --->| |---> TXQ1.0 +; | Routing | +; RXQ2.0 --->| |---> TXQ2.0 +; | | +; RXQ3.0 --->| |---> TXQ3.0 +; |_______________| +; | +; +-----------> SINK0 (route miss) +; +; Input packet: Ethernet/IPv4 +; +; Packet buffer layout: +; # Field Name Offset (Bytes) Size (Bytes) +; 0 Mbuf 0 128 +; 1 Headroom 128 128 +; 2 Ethernet header 256 14 +; 3 IPv4 header 270 20 + +[PIPELINE0] +type = MASTER +core = 0 + +[PIPELINE1] +type = ROUTING +core = 1 +pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0 +pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0 SINK0 +encap = ethernet; encap = ethernet / ethernet_qinq / ethernet_mpls +ip_hdr_offset = 270 diff --git a/examples/ip_pipeline/config/l3fwd.sh b/examples/ip_pipeline/config/l3fwd.sh new file mode 100644 index 00000000..27740103 --- /dev/null +++ b/examples/ip_pipeline/config/l3fwd.sh @@ -0,0 +1,9 @@ +################################################################################ +# Routing: encap = ethernet, arp = off +################################################################################ +p 1 route add default 4 #SINK0 +p 1 route add 0.0.0.0 10 port 0 ether a0:b0:c0:d0:e0:f0 +p 1 route add 0.64.0.0 10 port 1 ether a1:b1:c1:d1:e1:f1 +p 1 route add 0.128.0.0 10 port 2 ether a2:b2:c2:d2:e2:f2 +p 1 route add 0.192.0.0 10 port 3 ether a3:b3:c3:d3:e3:f3 +p 1 route ls diff --git a/examples/ip_pipeline/config/tm_profile.cfg b/examples/ip_pipeline/config/tm_profile.cfg new file mode 100644 index 00000000..2dfb215e --- /dev/null +++ b/examples/ip_pipeline/config/tm_profile.cfg @@ -0,0 +1,105 @@ +; BSD LICENSE +; +; Copyright(c) 2010-2014 Intel Corporation. All rights reserved. +; All rights reserved. +; +; Redistribution and use in source and binary forms, with or without +; modification, are permitted provided that the following conditions +; are met: +; +; * Redistributions of source code must retain the above copyright +; notice, this list of conditions and the following disclaimer. +; * Redistributions in binary form must reproduce the above copyright +; notice, this list of conditions and the following disclaimer in +; the documentation and/or other materials provided with the +; distribution. +; * Neither the name of Intel Corporation nor the names of its +; contributors may be used to endorse or promote products derived +; from this software without specific prior written permission. +; +; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +; "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +; LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +; A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +; OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +; SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +; LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +; DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +; THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +; (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +; This file enables the following hierarchical scheduler configuration for each +; 10GbE output port: +; * Single subport (subport 0): +; - Subport rate set to 100% of port rate +; - Each of the 4 traffic classes has rate set to 100% of port rate +; * 4K pipes per subport 0 (pipes 0 .. 4095) with identical configuration: +; - Pipe rate set to 1/4K of port rate +; - Each of the 4 traffic classes has rate set to 100% of pipe rate +; - Within each traffic class, the byte-level WRR weights for the 4 queues +; are set to 1:1:1:1 +; +; For more details, please refer to chapter "Quality of Service (QoS) Framework" +; of Data Plane Development Kit (DPDK) Programmer's Guide. + +; Port configuration +[port] +frame overhead = 24 ; frame overhead = Preamble (7) + SFD (1) + FCS (4) + IFG (12) +mtu = 1522; mtu = Q-in-Q MTU (FCS not included) +number of subports per port = 1 +number of pipes per subport = 4096 +queue sizes = 64 64 64 64 + +; Subport configuration +[subport 0] +tb rate = 1250000000 ; Bytes per second +tb size = 1000000 ; Bytes + +tc 0 rate = 1250000000 ; Bytes per second +tc 1 rate = 1250000000 ; Bytes per second +tc 2 rate = 1250000000 ; Bytes per second +tc 3 rate = 1250000000 ; Bytes per second +tc period = 10 ; Milliseconds + +pipe 0-4095 = 0 ; These pipes are configured with pipe profile 0 + +; Pipe configuration +[pipe profile 0] +tb rate = 305175 ; Bytes per second +tb size = 1000000 ; Bytes + +tc 0 rate = 305175 ; Bytes per second +tc 1 rate = 305175 ; Bytes per second +tc 2 rate = 305175 ; Bytes per second +tc 3 rate = 305175 ; Bytes per second +tc period = 40 ; Milliseconds + +tc 3 oversubscription weight = 1 + +tc 0 wrr weights = 1 1 1 1 +tc 1 wrr weights = 1 1 1 1 +tc 2 wrr weights = 1 1 1 1 +tc 3 wrr weights = 1 1 1 1 + +; RED params per traffic class and color (Green / Yellow / Red) +[red] +tc 0 wred min = 48 40 32 +tc 0 wred max = 64 64 64 +tc 0 wred inv prob = 10 10 10 +tc 0 wred weight = 9 9 9 + +tc 1 wred min = 48 40 32 +tc 1 wred max = 64 64 64 +tc 1 wred inv prob = 10 10 10 +tc 1 wred weight = 9 9 9 + +tc 2 wred min = 48 40 32 +tc 2 wred max = 64 64 64 +tc 2 wred inv prob = 10 10 10 +tc 2 wred weight = 9 9 9 + +tc 3 wred min = 48 40 32 +tc 3 wred max = 64 64 64 +tc 3 wred inv prob = 10 10 10 +tc 3 wred weight = 9 9 9 |