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# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2017 Cavium, Inc
#
#include "common_linuxapp"
CONFIG_RTE_MACHINE="armv8a"
CONFIG_RTE_ARCH="arm64"
CONFIG_RTE_ARCH_ARM64=y
CONFIG_RTE_ARCH_64=y
CONFIG_RTE_FORCE_INTRINSICS=y
# Maximum available cache line size in arm64 implementations.
# Setting to maximum available cache line size in generic config
# to address minimum DMA alignment across all arm64 implementations.
CONFIG_RTE_CACHE_LINE_SIZE=128
# Accelarate rte_memcpy. Be sure to run unit test (memcpy_perf_autotest)
# to determine the best threshold in code. Refer to notes in source file
# (lib/librte_eal/common/include/arch/arm/rte_memcpy_64.h) for more info.
CONFIG_RTE_ARCH_ARM64_MEMCPY=n
#CONFIG_RTE_ARM64_MEMCPY_ALIGNED_THRESHOLD=2048
#CONFIG_RTE_ARM64_MEMCPY_UNALIGNED_THRESHOLD=512
# Leave below RTE_ARM64_MEMCPY_xxx options commented out, unless there're
# strong reasons.
#CONFIG_RTE_ARM64_MEMCPY_SKIP_GCC_VER_CHECK=n
#CONFIG_RTE_ARM64_MEMCPY_ALIGN_MASK=0xF
#CONFIG_RTE_ARM64_MEMCPY_STRICT_ALIGN=n
CONFIG_RTE_RING_USE_C11_MEM_MODEL=y
CONFIG_RTE_LIBRTE_FM10K_PMD=n
CONFIG_RTE_LIBRTE_SFC_EFX_PMD=n
CONFIG_RTE_LIBRTE_AVP_PMD=n
CONFIG_RTE_SCHED_VECTOR=n
#
# ARMv8 Specific driver compilation flags
#
#
# Compile NXP DPAA Bus
#
CONFIG_RTE_LIBRTE_DPAA_BUS=y
CONFIG_RTE_LIBRTE_DPAA_HWDEBUG=n
#
# Compile NXP DPAA2 FSL-MC Bus
#
CONFIG_RTE_LIBRTE_FSLMC_BUS=y
#
# Compile NXP DPAA Mempool
#
CONFIG_RTE_LIBRTE_DPAA_MEMPOOL=y
#
# Compile NXP DPAA2 Mempool
#
CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
#
# Compile bust-oriented NXP DPAA PMD
#
CONFIG_RTE_LIBRTE_DPAA_PMD=y
#
# Compile burst-oriented NXP DPAA2 PMD driver
#
CONFIG_RTE_LIBRTE_DPAA2_PMD=y
#
# Compile schedule-oriented NXP DPAA Event Dev PMD
#
CONFIG_RTE_LIBRTE_PMD_DPAA_EVENTDEV=y
#
# Compile schedule-oriented NXP DPAA2 EVENTDEV driver
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_EVENTDEV=y
#
# Compile NXP DPAA caam - crypto driver
#
CONFIG_RTE_LIBRTE_PMD_DPAA_SEC=y
CONFIG_RTE_LIBRTE_DPAA_MAX_CRYPTODEV=4
CONFIG_RTE_DPAA_SEC_PMD_MAX_NB_SESSIONS=2048
#
# Compile NXP DPAA2 crypto sec driver for CAAM HW
#
CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048
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