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/* SPDX-License-Identifier: BSD-3-Clause
* Copyright(c) 2018 Netronome Systems, Inc.
* All rights reserved.
*/
#ifndef __NFP_NFFW_H__
#define __NFP_NFFW_H__
#include "nfp-common/nfp_platform.h"
#include "nfp_cpp.h"
/*
* Init-CSR owner IDs for firmware map to firmware IDs which start at 4.
* Lower IDs are reserved for target and loader IDs.
*/
#define NFFW_FWID_EXT 3 /* For active MEs that we didn't load. */
#define NFFW_FWID_BASE 4
#define NFFW_FWID_ALL 255
/* Init-CSR owner IDs for firmware map to firmware IDs which start at 4.
* Lower IDs are reserved for target and loader IDs.
*/
#define NFFW_FWID_EXT 3 /* For active MEs that we didn't load. */
#define NFFW_FWID_BASE 4
#define NFFW_FWID_ALL 255
/**
* NFFW_INFO_VERSION history:
* 0: This was never actually used (before versioning), but it refers to
* the previous struct which had FWINFO_CNT = MEINFO_CNT = 120 that later
* changed to 200.
* 1: First versioned struct, with
* FWINFO_CNT = 120
* MEINFO_CNT = 120
* 2: FWINFO_CNT = 200
* MEINFO_CNT = 200
*/
#define NFFW_INFO_VERSION_CURRENT 2
/* Enough for all current chip families */
#define NFFW_MEINFO_CNT_V1 120
#define NFFW_FWINFO_CNT_V1 120
#define NFFW_MEINFO_CNT_V2 200
#define NFFW_FWINFO_CNT_V2 200
struct nffw_meinfo {
uint32_t ctxmask__fwid__meid;
};
struct nffw_fwinfo {
uint32_t loaded__mu_da__mip_off_hi;
uint32_t mip_cppid; /* 0 means no MIP */
uint32_t mip_offset_lo;
};
struct nfp_nffw_info_v1 {
struct nffw_meinfo meinfo[NFFW_MEINFO_CNT_V1];
struct nffw_fwinfo fwinfo[NFFW_FWINFO_CNT_V1];
};
struct nfp_nffw_info_v2 {
struct nffw_meinfo meinfo[NFFW_MEINFO_CNT_V2];
struct nffw_fwinfo fwinfo[NFFW_FWINFO_CNT_V2];
};
struct nfp_nffw_info_data {
uint32_t flags[2];
union {
struct nfp_nffw_info_v1 v1;
struct nfp_nffw_info_v2 v2;
} info;
};
struct nfp_nffw_info {
struct nfp_cpp *cpp;
struct nfp_resource *res;
struct nfp_nffw_info_data fwinf;
};
struct nfp_nffw_info *nfp_nffw_info_open(struct nfp_cpp *cpp);
void nfp_nffw_info_close(struct nfp_nffw_info *state);
#endif
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