aboutsummaryrefslogtreecommitdiffstats
path: root/examples/ip_pipeline/config/action.cfg
blob: 994ae94a3af631fe4aa92aa8781b44ed9165dae0 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
;   BSD LICENSE
;
;   Copyright(c) 2016 Intel Corporation. All rights reserved.
;   All rights reserved.
;
;   Redistribution and use in source and binary forms, with or without
;   modification, are permitted provided that the following conditions
;   are met:
;
;     * Redistributions of source code must retain the above copyright
;       notice, this list of conditions and the following disclaimer.
;     * Redistributions in binary form must reproduce the above copyright
;       notice, this list of conditions and the following disclaimer in
;       the documentation and/or other materials provided with the
;       distribution.
;     * Neither the name of Intel Corporation nor the names of its
;       contributors may be used to endorse or promote products derived
;       from this software without specific prior written permission.
;
;   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
;   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
;   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
;   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
;   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
;   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
;   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
;   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
;   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
;   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

;             ________________
; RXQ0.0 --->|                |---> TXQ0.0
;            |                |
; RXQ1.0 --->|                |---> TXQ1.0
;            |      Flow      |
; RXQ2.0 --->|     Actions    |---> TXQ2.0
;            |                |
; RXQ3.0 --->|                |---> TXQ3.0
;            |________________|
;
;
; Input packet: Ethernet/IPv4
;
; Packet buffer layout:
; #	Field Name		Offset (Bytes)	Size (Bytes)
; 0	Mbuf			0 		128
; 1	Headroom		128 		128
; 2	Ethernet header		256 		14
; 3	IPv4 header		270 		20

[EAL]
log_level = 0

[PIPELINE0]
type = MASTER
core = 0

[PIPELINE1]
type = FLOW_ACTIONS
core = 1
pktq_in = RXQ0.0 RXQ1.0 RXQ2.0 RXQ3.0
pktq_out = TXQ0.0 TXQ1.0 TXQ2.0 TXQ3.0
n_flows = 65536
n_meters_per_flow = 4
flow_id_offset = 286; ipdaddr
ip_hdr_offset = 270
color_offset = 128