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author | Michal Cmarada <michal.cmarada@pantheon.tech> | 2018-06-15 13:09:56 +0200 |
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committer | Marek Gradzki <mgradzki@cisco.com> | 2018-06-19 18:54:51 +0000 |
commit | 3edc384ac6cbeb68d36dbb4a51aa027c3bd3257d (patch) | |
tree | 78e4ae88f89e08756ae469d068c45e2e7a059c2f /acl | |
parent | b44b5a2a1ee8ba193265708272be97fd6f11d010 (diff) |
HC2VPP-288 - add SRv6 module (writers only)
Changes:
- add new module for SRv6
- add models for SRv6 configuration:
from https://datatracker.ietf.org/doc/draft-raza-spring-srv6-yang/
- hc2vpp-ietf-srv6-base@2018-03-01.yang
- hc2vpp-ietf-srv6-static@2018-03-01.yang
- ietf-srv6-types@2018-03-01.yang
- implements Configuration of local sids and their end functions.
- implements support for FIB table management (HC2VPP-345)
Models hc2vpp-ietf-srv6-base and hc2vpp-ietf-srv6-static
are changed (HC2VPP-332):
- imports for routing models (HC2VPP-298)
- presence in end function containers was added to fix
mandatory child verification if parent container is not present
Change-Id: Ib74e48023b671383f076b84773e26ce7c5ae282a
Signed-off-by: Michal Cmarada <michal.cmarada@pantheon.tech>
Signed-off-by: Jan Srnicek <jan.srnicek@pantheon.tech>
Diffstat (limited to 'acl')
0 files changed, 0 insertions, 0 deletions